Lines Matching +full:7 +full:- +full:bit
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
19 #include "ufshcd-pltfrm.h"
62 PARAM_WRITE_D0_D4(0x00000800, ((_data_800) << 16) | BIT(8) | (_addr)), \
64 PARAM_POLL(0xd4, BIT(8), BIT(8))
71 PARAM_POLL(0xd4, BIT(8), BIT(8))
75 PARAM_WRITE_D0_D4(0x00000804, ((_data_804) << 16) | BIT(8) | (_addr)), \
77 PARAM_POLL(0xd4, BIT(8), BIT(8))
112 PARAM_SET(SET_PHY_INDEX_LO, ((_data16 & 0xff) << 16) | BIT(8) | 0x18), \
114 PARAM_SET(SET_PHY_INDEX_HI, (((_data16 >> 8) & 0xff) << 16) | BIT(8) | 0x19), \
165 PARAM_POLL(0xd4, BIT(8), BIT(8)),
170 PARAM_POLL(0xd4, BIT(8) | BIT(6) | BIT(0), BIT(8) | BIT(6) | BIT(0)),
178 PARAM_POLL(0xd4, BIT(27), BIT(27)),
180 PARAM_POLL(0xd4, BIT(0), BIT(0)),
184 PARAM_INDIRECT_WRITE(7, 0x5d, 0x0014),
185 PARAM_INDIRECT_WRITE(7, 0x5e, 0x0014),
186 PARAM_INDIRECT_WRITE(7, 0x0d, 0x0003),
187 PARAM_INDIRECT_WRITE(7, 0x0e, 0x0007),
188 PARAM_INDIRECT_WRITE(7, 0x5f, 0x0003),
189 PARAM_INDIRECT_WRITE(7, 0x60, 0x0003),
190 PARAM_INDIRECT_WRITE(7, 0x5b, 0x00a6),
191 PARAM_INDIRECT_WRITE(7, 0x5c, 0x0003),
193 PARAM_INDIRECT_POLL(7, 0x3c, 0, BIT(7)),
194 PARAM_INDIRECT_POLL(7, 0x4c, 0, BIT(4)),
208 PARAM_INDIRECT_WRITE(7, 0x0d, 0x0002),
209 PARAM_INDIRECT_WRITE(7, 0x0e, 0x0007),
213 PARAM_SET_PHY(0x401c, BIT(2)),
241 PARAM_INDIRECT_WRITE(7, 0x70, 0x0016),
242 PARAM_INDIRECT_WRITE(7, 0x71, 0x0016),
243 PARAM_INDIRECT_WRITE(7, 0x72, 0x0014),
244 PARAM_INDIRECT_WRITE(7, 0x73, 0x0014),
245 PARAM_INDIRECT_WRITE(7, 0x74, 0x0000),
246 PARAM_INDIRECT_WRITE(7, 0x75, 0x0000),
247 PARAM_INDIRECT_WRITE(7, 0x76, 0x0010),
248 PARAM_INDIRECT_WRITE(7, 0x77, 0x0010),
249 PARAM_INDIRECT_WRITE(7, 0x78, 0x00ff),
250 PARAM_INDIRECT_WRITE(7, 0x79, 0x0000),
252 PARAM_INDIRECT_WRITE(7, 0x19, 0x0007),
254 PARAM_INDIRECT_WRITE(7, 0x1a, 0x0007),
256 PARAM_INDIRECT_WRITE(7, 0x24, 0x000c),
258 PARAM_INDIRECT_WRITE(7, 0x25, 0x000c),
260 PARAM_INDIRECT_WRITE(7, 0x62, 0x0000),
261 PARAM_INDIRECT_WRITE(7, 0x63, 0x0000),
262 PARAM_INDIRECT_WRITE(7, 0x5d, 0x0014),
263 PARAM_INDIRECT_WRITE(7, 0x5e, 0x0017),
264 PARAM_INDIRECT_WRITE(7, 0x5d, 0x0004),
265 PARAM_INDIRECT_WRITE(7, 0x5e, 0x0017),
266 PARAM_INDIRECT_POLL(7, 0x55, 0, BIT(6)),
267 PARAM_INDIRECT_POLL(7, 0x41, 0, BIT(7)),
287 WARN_ON(p->index >= MAX_INDEX); in ufs_renesas_reg_control()
289 switch (p->mode) { in ufs_renesas_reg_control()
291 ufshcd_writel(hba, save[p->index], p->reg); in ufs_renesas_reg_control()
294 save[p->index] |= p->u.set; in ufs_renesas_reg_control()
297 save[p->index] = ufshcd_readl(hba, p->reg) & p->mask; in ufs_renesas_reg_control()
300 ret = readl_poll_timeout_atomic(hba->mmio_base + p->reg, in ufs_renesas_reg_control()
302 (val & p->mask) == p->u.expected, in ufs_renesas_reg_control()
305 dev_err(hba->dev, "%s: poll failed %d (%08x, %08x, %08x)\n", in ufs_renesas_reg_control()
306 __func__, ret, val, p->mask, p->u.expected); in ufs_renesas_reg_control()
309 if (p->u.delay_us > 1000) in ufs_renesas_reg_control()
310 mdelay(DIV_ROUND_UP(p->u.delay_us, 1000)); in ufs_renesas_reg_control()
312 udelay(p->u.delay_us); in ufs_renesas_reg_control()
315 ufshcd_writel(hba, p->u.val, p->reg); in ufs_renesas_reg_control()
336 if (priv->initialized) in ufs_renesas_hce_enable_notify()
342 priv->initialized = true; in ufs_renesas_hce_enable_notify()
351 pm_runtime_get_sync(hba->dev); in ufs_renesas_setup_clocks()
353 pm_runtime_put(hba->dev); in ufs_renesas_setup_clocks()
362 priv = devm_kmalloc(hba->dev, sizeof(*priv), GFP_KERNEL); in ufs_renesas_init()
364 return -ENOMEM; in ufs_renesas_init()
367 hba->quirks |= UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS | UFSHCD_QUIRK_HIBERN_FASTAUTO; in ufs_renesas_init()
381 { .compatible = "renesas,r8a779f0-ufs" },
404 .name = "ufshcd-renesas",