Lines Matching +full:0 +full:x1900
13 #define MAX_U32 (~(u32)0)
14 #define MPHY_TX_FSM_STATE 0x41
15 #define TX_FSM_HIBERN8 0x1
21 #define UFS_HW_VER_MAJOR_MASK (0x000F << UFS_HW_VER_MAJOR_SHFT)
23 #define UFS_HW_VER_MINOR_MASK (0x0FFF << UFS_HW_VER_MINOR_SHFT)
24 #define UFS_HW_VER_STEP_SHFT (0)
25 #define UFS_HW_VER_STEP_MASK (0xFFFF << UFS_HW_VER_STEP_SHFT)
35 REG_UFS_SYS1CLK_1US = 0xC0,
36 REG_UFS_TX_SYMBOL_CLK_NS_US = 0xC4,
37 REG_UFS_LOCAL_PORT_ID_REG = 0xC8,
38 REG_UFS_PA_ERR_CODE = 0xCC,
39 REG_UFS_RETRY_TIMER_REG = 0xD0,
40 REG_UFS_PA_LINK_STARTUP_TIMER = 0xD8,
41 REG_UFS_CFG1 = 0xDC,
42 REG_UFS_CFG2 = 0xE0,
43 REG_UFS_HW_VERSION = 0xE4,
45 UFS_TEST_BUS = 0xE8,
46 UFS_TEST_BUS_CTRL_0 = 0xEC,
47 UFS_TEST_BUS_CTRL_1 = 0xF0,
48 UFS_TEST_BUS_CTRL_2 = 0xF4,
49 UFS_UNIPRO_CFG = 0xF8,
53 * added in HW Version 3.0.0
55 UFS_AH8_CFG = 0xFC,
60 UFS_DBG_RD_REG_UAWM = 0x100,
61 UFS_DBG_RD_REG_UARM = 0x200,
62 UFS_DBG_RD_REG_TXUC = 0x300,
63 UFS_DBG_RD_REG_RXUC = 0x400,
64 UFS_DBG_RD_REG_DFC = 0x500,
65 UFS_DBG_RD_REG_TRLUT = 0x600,
66 UFS_DBG_RD_REG_TMRLUT = 0x700,
67 UFS_UFS_DBG_RD_REG_OCSC = 0x800,
69 UFS_UFS_DBG_RD_DESC_RAM = 0x1500,
70 UFS_UFS_DBG_RD_PRDT_RAM = 0x1700,
71 UFS_UFS_DBG_RD_RESP_RAM = 0x1800,
72 UFS_UFS_DBG_RD_EDTL_RAM = 0x1900,
75 #define UFS_CNTLR_2_x_x_VEN_REGS_OFFSET(x) (0x000 + x)
76 #define UFS_CNTLR_3_x_x_VEN_REGS_OFFSET(x) (0x400 + x)
79 #define QUNIPRO_SEL 0x1
80 #define UTP_DBG_RAMS_EN 0x20000
86 #define UAWM_HW_CGC_EN (1 << 0)
96 #define TEST_BUS_SUB_SEL_MASK 0x1F /* All XXX_SEL fields are 5 bits wide */
111 MASK_UFS_PHY_SOFT_RESET = 0x2,
112 MASK_TX_SYMBOL_CLK_1US_REG = 0x3FF,
113 MASK_CLK_NS_REG = 0xFFFC00,
117 #define UFS_QCOM_DBG_PRINT_REGS_EN BIT(0)
126 #define PA_VS_CONFIG_REG1 0x9000
127 #define DME_VS_CORE_CLK_CTRL 0xD002
130 #define DME_VS_CORE_CLK_CTRL_MAX_CORE_CLK_1US_CYCLES_MASK 0xFF
158 0 << OFFSET_UFS_PHY_SOFT_RESET, REG_UFS_CFG1); in ufs_qcom_deassert_reset()
188 #define UFS_QCOM_CAP_QUNIPRO 0x1
194 #define UFS_QCOM_CAP_RETAIN_SEC_CFG_AFTER_PWR_COLLAPSE 0x2
229 if (host->hw_ver.major <= 0x02) in ufs_qcom_get_debug_reg_offset()
257 return 0; in ufs_qcom_ice_init()
261 return 0; in ufs_qcom_ice_enable()
265 return 0; in ufs_qcom_ice_resume()