Lines Matching +full:ld +full:- +full:pulse +full:- +full:delay +full:- +full:us
1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/arm-smccc.h>
12 #include <linux/delay.h>
25 #include "ufshcd-pltfrm.h"
28 #include "ufs-mediatek.h"
31 #include "ufs-mediatek-trace.h"
45 { .compatible = "mediatek,mt8183-ufshci" },
91 return !!(host->caps & UFS_MTK_CAP_BOOST_CRYPT_ENGINE); in ufs_mtk_is_boost_crypt_enabled()
98 return !!(host->caps & UFS_MTK_CAP_VA09_PWR_CTRL); in ufs_mtk_is_va09_supported()
105 return !!(host->caps & UFS_MTK_CAP_BROKEN_VCC); in ufs_mtk_is_broken_vcc()
112 return (host->caps & UFS_MTK_CAP_PMC_VIA_FASTAUTO); in ufs_mtk_is_pmc_via_fastauto()
157 dev_info(hba->dev, "%s: crypto enable failed, err: %lu\n", in ufs_mtk_crypto_enable()
159 hba->caps &= ~UFSHCD_CAP_CRYPTO; in ufs_mtk_crypto_enable()
167 reset_control_assert(host->hci_reset); in ufs_mtk_host_reset()
168 reset_control_assert(host->crypto_reset); in ufs_mtk_host_reset()
169 reset_control_assert(host->unipro_reset); in ufs_mtk_host_reset()
173 reset_control_deassert(host->unipro_reset); in ufs_mtk_host_reset()
174 reset_control_deassert(host->crypto_reset); in ufs_mtk_host_reset()
175 reset_control_deassert(host->hci_reset); in ufs_mtk_host_reset()
182 *rc = devm_reset_control_get(hba->dev, str); in ufs_mtk_init_reset_control()
184 dev_info(hba->dev, "Failed to get reset control %s: %ld\n", in ufs_mtk_init_reset_control()
194 ufs_mtk_init_reset_control(hba, &host->hci_reset, in ufs_mtk_init_reset()
196 ufs_mtk_init_reset_control(hba, &host->unipro_reset, in ufs_mtk_init_reset()
198 ufs_mtk_init_reset_control(hba, &host->crypto_reset, in ufs_mtk_init_reset()
208 if (host->unipro_lpm) { in ufs_mtk_hce_enable_notify()
209 hba->vps->hba_enable_delay_us = 0; in ufs_mtk_hce_enable_notify()
211 hba->vps->hba_enable_delay_us = 600; in ufs_mtk_hce_enable_notify()
215 if (hba->caps & UFSHCD_CAP_CRYPTO) in ufs_mtk_hce_enable_notify()
218 if (host->caps & UFS_MTK_CAP_DISABLE_AH8) { in ufs_mtk_hce_enable_notify()
221 hba->capabilities &= ~MASK_AUTO_HIBERN8_SUPPORT; in ufs_mtk_hce_enable_notify()
222 hba->ahit = 0; in ufs_mtk_hce_enable_notify()
240 struct device *dev = hba->dev; in ufs_mtk_bind_mphy()
241 struct device_node *np = dev->of_node; in ufs_mtk_bind_mphy()
244 host->mphy = devm_of_phy_get_by_index(dev, np, 0); in ufs_mtk_bind_mphy()
246 if (host->mphy == ERR_PTR(-EPROBE_DEFER)) { in ufs_mtk_bind_mphy()
251 err = -EPROBE_DEFER; in ufs_mtk_bind_mphy()
255 } else if (IS_ERR(host->mphy)) { in ufs_mtk_bind_mphy()
256 err = PTR_ERR(host->mphy); in ufs_mtk_bind_mphy()
257 if (err != -ENODEV) { in ufs_mtk_bind_mphy()
264 host->mphy = NULL; in ufs_mtk_bind_mphy()
269 if (err == -ENODEV) in ufs_mtk_bind_mphy()
282 if (host->ref_clk_enabled == on) in ufs_mtk_setup_ref_clk()
290 ufshcd_delay_us(host->ref_clk_gating_wait_us, 10); in ufs_mtk_setup_ref_clk()
307 dev_err(hba->dev, "missing ack of refclk req, reg: 0x%x\n", value); in ufs_mtk_setup_ref_clk()
309 ufs_mtk_ref_clk_notify(host->ref_clk_enabled, POST_CHANGE, res); in ufs_mtk_setup_ref_clk()
311 return -ETIMEDOUT; in ufs_mtk_setup_ref_clk()
314 host->ref_clk_enabled = on; in ufs_mtk_setup_ref_clk()
316 ufshcd_delay_us(host->ref_clk_ungating_wait_us, 10); in ufs_mtk_setup_ref_clk()
328 if (hba->dev_info.clk_gating_wait_us) { in ufs_mtk_setup_ref_clk_wait_us()
329 host->ref_clk_gating_wait_us = in ufs_mtk_setup_ref_clk_wait_us()
330 hba->dev_info.clk_gating_wait_us; in ufs_mtk_setup_ref_clk_wait_us()
332 host->ref_clk_gating_wait_us = gating_us; in ufs_mtk_setup_ref_clk_wait_us()
335 host->ref_clk_ungating_wait_us = REFCLK_DEFAULT_WAIT_US; in ufs_mtk_setup_ref_clk_wait_us()
342 if (((host->ip_ver >> 16) & 0xFF) >= 0x36) { in ufs_mtk_dbg_sel()
390 dev_info(hba->dev, "wait idle tmo: 0x%x\n", val); in ufs_mtk_wait_idle_state()
409 /* Sleep for max. 200us */ in ufs_mtk_wait_link_state()
416 return -ETIMEDOUT; in ufs_mtk_wait_link_state()
422 struct phy *mphy = host->mphy; in ufs_mtk_mphy_power_on()
426 if (!mphy || !(on ^ host->mphy_powered_on)) in ufs_mtk_mphy_power_on()
431 ret = regulator_enable(host->reg_va09); in ufs_mtk_mphy_power_on()
434 /* wait 200 us to stablize VA09 */ in ufs_mtk_mphy_power_on()
443 ret = regulator_disable(host->reg_va09); in ufs_mtk_mphy_power_on()
450 dev_info(hba->dev, in ufs_mtk_mphy_power_on()
455 host->mphy_powered_on = on; in ufs_mtk_mphy_power_on()
486 cfg = host->crypt; in ufs_mtk_boost_crypt()
487 volt = cfg->vcore_volt; in ufs_mtk_boost_crypt()
488 reg = cfg->reg_vcore; in ufs_mtk_boost_crypt()
490 ret = clk_prepare_enable(cfg->clk_crypt_mux); in ufs_mtk_boost_crypt()
492 dev_info(hba->dev, "clk_prepare_enable(): %d\n", in ufs_mtk_boost_crypt()
500 dev_info(hba->dev, in ufs_mtk_boost_crypt()
505 ret = clk_set_parent(cfg->clk_crypt_mux, in ufs_mtk_boost_crypt()
506 cfg->clk_crypt_perf); in ufs_mtk_boost_crypt()
508 dev_info(hba->dev, in ufs_mtk_boost_crypt()
514 ret = clk_set_parent(cfg->clk_crypt_mux, in ufs_mtk_boost_crypt()
515 cfg->clk_crypt_lp); in ufs_mtk_boost_crypt()
517 dev_info(hba->dev, in ufs_mtk_boost_crypt()
524 dev_info(hba->dev, in ufs_mtk_boost_crypt()
529 clk_disable_unprepare(cfg->clk_crypt_mux); in ufs_mtk_boost_crypt()
537 ret = ufs_mtk_get_host_clk(hba->dev, name, clk); in ufs_mtk_init_host_clk()
539 dev_info(hba->dev, "%s: failed to get %s: %d", __func__, in ufs_mtk_init_host_clk()
550 struct device *dev = hba->dev; in ufs_mtk_init_boost_crypt()
554 host->crypt = devm_kzalloc(dev, sizeof(*(host->crypt)), in ufs_mtk_init_boost_crypt()
556 if (!host->crypt) in ufs_mtk_init_boost_crypt()
559 reg = devm_regulator_get_optional(dev, "dvfsrc-vcore"); in ufs_mtk_init_boost_crypt()
561 dev_info(dev, "failed to get dvfsrc-vcore: %ld", in ufs_mtk_init_boost_crypt()
566 if (of_property_read_u32(dev->of_node, "boost-crypt-vcore-min", in ufs_mtk_init_boost_crypt()
568 dev_info(dev, "failed to get boost-crypt-vcore-min"); in ufs_mtk_init_boost_crypt()
572 cfg = host->crypt; in ufs_mtk_init_boost_crypt()
574 &cfg->clk_crypt_mux)) in ufs_mtk_init_boost_crypt()
578 &cfg->clk_crypt_lp)) in ufs_mtk_init_boost_crypt()
582 &cfg->clk_crypt_perf)) in ufs_mtk_init_boost_crypt()
585 cfg->reg_vcore = reg; in ufs_mtk_init_boost_crypt()
586 cfg->vcore_volt = volt; in ufs_mtk_init_boost_crypt()
587 host->caps |= UFS_MTK_CAP_BOOST_CRYPT_ENGINE; in ufs_mtk_init_boost_crypt()
597 host->reg_va09 = regulator_get(hba->dev, "va09"); in ufs_mtk_init_va09_pwr_ctrl()
598 if (IS_ERR(host->reg_va09)) in ufs_mtk_init_va09_pwr_ctrl()
599 dev_info(hba->dev, "failed to get va09"); in ufs_mtk_init_va09_pwr_ctrl()
601 host->caps |= UFS_MTK_CAP_VA09_PWR_CTRL; in ufs_mtk_init_va09_pwr_ctrl()
607 struct device_node *np = hba->dev->of_node; in ufs_mtk_init_host_caps()
609 if (of_property_read_bool(np, "mediatek,ufs-boost-crypt")) in ufs_mtk_init_host_caps()
612 if (of_property_read_bool(np, "mediatek,ufs-support-va09")) in ufs_mtk_init_host_caps()
615 if (of_property_read_bool(np, "mediatek,ufs-disable-ah8")) in ufs_mtk_init_host_caps()
616 host->caps |= UFS_MTK_CAP_DISABLE_AH8; in ufs_mtk_init_host_caps()
618 if (of_property_read_bool(np, "mediatek,ufs-broken-vcc")) in ufs_mtk_init_host_caps()
619 host->caps |= UFS_MTK_CAP_BROKEN_VCC; in ufs_mtk_init_host_caps()
621 if (of_property_read_bool(np, "mediatek,ufs-pmc-via-fastauto")) in ufs_mtk_init_host_caps()
622 host->caps |= UFS_MTK_CAP_PMC_VIA_FASTAUTO; in ufs_mtk_init_host_caps()
624 dev_info(hba->dev, "caps: 0x%x", host->caps); in ufs_mtk_init_host_caps()
631 if (!host || !host->pm_qos_init) in ufs_mtk_boost_pm_qos()
634 cpu_latency_qos_update_request(&host->pm_qos_req, in ufs_mtk_boost_pm_qos()
649 phy_power_on(host->mphy); in ufs_mtk_pwr_ctrl()
657 phy_power_off(host->mphy); in ufs_mtk_pwr_ctrl()
662 * ufs_mtk_setup_clocks - enables/disable clocks
667 * Returns 0 on success, non-zero on failure.
691 * Gate ref-clk and poweroff mphy if link state is in in ufs_mtk_setup_clocks()
692 * OFF or Hibern8 by either Auto-Hibern8 or in ufs_mtk_setup_clocks()
716 if (host->hw_ver.major) in ufs_mtk_get_controller_version()
720 host->hw_ver.major = 2; in ufs_mtk_get_controller_version()
725 host->hw_ver.major = 3; in ufs_mtk_get_controller_version()
730 if (hba->ufs_version < ufshci_version(3, 0)) in ufs_mtk_get_controller_version()
731 hba->ufs_version = ufshci_version(3, 0); in ufs_mtk_get_controller_version()
738 return hba->ufs_version; in ufs_mtk_get_ufs_hci_version()
742 * ufs_mtk_init_clocks - Init mtk driver private clocks
749 struct list_head *head = &hba->clk_list_head; in ufs_mtk_init_clocks()
750 struct ufs_mtk_clk *mclk = &host->mclk; in ufs_mtk_init_clocks()
759 if (!strcmp(clki->name, "ufs_sel")) { in ufs_mtk_init_clocks()
760 host->mclk.ufs_sel_clki = clki; in ufs_mtk_init_clocks()
761 } else if (!strcmp(clki->name, "ufs_sel_max_src")) { in ufs_mtk_init_clocks()
762 host->mclk.ufs_sel_max_clki = clki; in ufs_mtk_init_clocks()
763 clk_disable_unprepare(clki->clk); in ufs_mtk_init_clocks()
764 list_del(&clki->list); in ufs_mtk_init_clocks()
765 } else if (!strcmp(clki->name, "ufs_sel_min_src")) { in ufs_mtk_init_clocks()
766 host->mclk.ufs_sel_min_clki = clki; in ufs_mtk_init_clocks()
767 clk_disable_unprepare(clki->clk); in ufs_mtk_init_clocks()
768 list_del(&clki->list); in ufs_mtk_init_clocks()
772 if (!mclk->ufs_sel_clki || !mclk->ufs_sel_max_clki || in ufs_mtk_init_clocks()
773 !mclk->ufs_sel_min_clki) { in ufs_mtk_init_clocks()
774 hba->caps &= ~UFSHCD_CAP_CLK_SCALING; in ufs_mtk_init_clocks()
775 dev_info(hba->dev, in ufs_mtk_init_clocks()
776 "%s: Clk-scaling not ready. Feature disabled.", in ufs_mtk_init_clocks()
784 struct ufs_vreg_info *info = &hba->vreg_info; in ufs_mtk_vreg_fix_vcc()
785 struct device_node *np = hba->dev->of_node; in ufs_mtk_vreg_fix_vcc()
786 struct device *dev = hba->dev; in ufs_mtk_vreg_fix_vcc()
791 if (hba->vreg_info.vcc) in ufs_mtk_vreg_fix_vcc()
794 if (of_property_read_bool(np, "mediatek,ufs-vcc-by-num")) { in ufs_mtk_vreg_fix_vcc()
797 snprintf(vcc_name, MAX_VCC_NAME, "vcc-opt%lu", res.a1); in ufs_mtk_vreg_fix_vcc()
799 return -ENODEV; in ufs_mtk_vreg_fix_vcc()
800 } else if (of_property_read_bool(np, "mediatek,ufs-vcc-by-ver")) { in ufs_mtk_vreg_fix_vcc()
801 ver = (hba->dev_info.wspecversion & 0xF00) >> 8; in ufs_mtk_vreg_fix_vcc()
802 snprintf(vcc_name, MAX_VCC_NAME, "vcc-ufs%u", ver); in ufs_mtk_vreg_fix_vcc()
807 err = ufshcd_populate_vreg(dev, vcc_name, &info->vcc); in ufs_mtk_vreg_fix_vcc()
811 err = ufshcd_get_vreg(dev, info->vcc); in ufs_mtk_vreg_fix_vcc()
815 err = regulator_enable(info->vcc->reg); in ufs_mtk_vreg_fix_vcc()
817 info->vcc->enabled = true; in ufs_mtk_vreg_fix_vcc()
826 struct ufs_vreg_info *info = &hba->vreg_info; in ufs_mtk_vreg_fix_vccqx()
829 if (hba->dev_info.wspecversion >= 0x0300) { in ufs_mtk_vreg_fix_vccqx()
830 vreg_on = &info->vccq; in ufs_mtk_vreg_fix_vccqx()
831 vreg_off = &info->vccq2; in ufs_mtk_vreg_fix_vccqx()
833 vreg_on = &info->vccq2; in ufs_mtk_vreg_fix_vccqx()
834 vreg_off = &info->vccq; in ufs_mtk_vreg_fix_vccqx()
838 (*vreg_on)->always_on = true; in ufs_mtk_vreg_fix_vccqx()
841 regulator_disable((*vreg_off)->reg); in ufs_mtk_vreg_fix_vccqx()
842 devm_kfree(hba->dev, (*vreg_off)->name); in ufs_mtk_vreg_fix_vccqx()
843 devm_kfree(hba->dev, *vreg_off); in ufs_mtk_vreg_fix_vccqx()
849 * ufs_mtk_init - find other essential mmio bases
855 * Returns -EPROBE_DEFER if binding fails, returns negative error
861 struct device *dev = hba->dev; in ufs_mtk_init()
867 err = -ENOMEM; in ufs_mtk_init()
872 host->hba = hba; in ufs_mtk_init()
877 err = -EINVAL; in ufs_mtk_init()
891 hba->caps |= UFSHCD_CAP_RPM_AUTOSUSPEND; in ufs_mtk_init()
893 /* Enable clock-gating */ in ufs_mtk_init()
894 hba->caps |= UFSHCD_CAP_CLK_GATING; in ufs_mtk_init()
897 hba->caps |= UFSHCD_CAP_CRYPTO; in ufs_mtk_init()
900 hba->caps |= UFSHCD_CAP_WB_EN; in ufs_mtk_init()
903 hba->caps |= UFSHCD_CAP_CLK_SCALING; in ufs_mtk_init()
905 hba->quirks |= UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL; in ufs_mtk_init()
906 hba->vps->wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(80); in ufs_mtk_init()
908 if (host->caps & UFS_MTK_CAP_DISABLE_AH8) in ufs_mtk_init()
909 hba->caps |= UFSHCD_CAP_HIBERN8_WITH_CLK_GATING; in ufs_mtk_init()
923 host->ip_ver = ufshcd_readl(hba, REG_UFS_MTK_IP_VER); in ufs_mtk_init()
925 /* Initialize pm-qos request */ in ufs_mtk_init()
926 cpu_latency_qos_add_request(&host->pm_qos_req, PM_QOS_DEFAULT_VALUE); in ufs_mtk_init()
927 host->pm_qos_init = true; in ufs_mtk_init()
943 if (dev_req_params->hs_rate == hba->pwr_info.hs_rate) in ufs_mtk_pmc_via_fastauto()
946 if (dev_req_params->pwr_tx != FAST_MODE && in ufs_mtk_pmc_via_fastauto()
947 dev_req_params->gear_tx < UFS_HS_G4) in ufs_mtk_pmc_via_fastauto()
950 if (dev_req_params->pwr_rx != FAST_MODE && in ufs_mtk_pmc_via_fastauto()
951 dev_req_params->gear_rx < UFS_HS_G4) in ufs_mtk_pmc_via_fastauto()
985 dev_req_params->lane_tx); in ufs_mtk_pre_pwr_change()
987 dev_req_params->lane_rx); in ufs_mtk_pre_pwr_change()
989 dev_req_params->hs_rate); in ufs_mtk_pre_pwr_change()
998 dev_err(hba->dev, "%s: HSG1B FASTAUTO failed ret=%d\n", in ufs_mtk_pre_pwr_change()
1003 if (host->hw_ver.major >= 3) { in ufs_mtk_pre_pwr_change()
1005 dev_req_params->gear_tx, in ufs_mtk_pre_pwr_change()
1027 ret = -EINVAL; in ufs_mtk_pwr_change_notify()
1044 * Forcibly set as non-LPM mode if UIC commands is failed in ufs_mtk_unipro_set_lpm()
1045 * to use default hba_enable_delay_us value for re-enabling in ufs_mtk_unipro_set_lpm()
1048 host->unipro_lpm = lpm; in ufs_mtk_unipro_set_lpm()
1091 if (ufshcd_is_auto_hibern8_supported(hba) && hba->ahit) in ufs_mtk_setup_clk_gating()
1093 hba->ahit); in ufs_mtk_setup_clk_gating()
1096 ufshcd_clkgate_delay_set(hba->dev, ah_ms + 5); in ufs_mtk_setup_clk_gating()
1107 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 10) | in ufs_mtk_post_link()
1128 ret = -EINVAL; in ufs_mtk_link_startup_notify()
1146 * more than or equal to 1us of positive or negative RST_n in ufs_mtk_device_reset()
1147 * pulse width. in ufs_mtk_device_reset()
1149 * To be on safe side, keep the reset low for at least 10us. in ufs_mtk_device_reset()
1158 dev_info(hba->dev, "device reset done\n"); in ufs_mtk_device_reset()
1211 if (hba->vreg_info.vccq) in ufs_mtk_vccqx_set_lpm()
1212 vccqx = hba->vreg_info.vccq; in ufs_mtk_vccqx_set_lpm()
1214 vccqx = hba->vreg_info.vccq2; in ufs_mtk_vccqx_set_lpm()
1216 regulator_set_mode(vccqx->reg, in ufs_mtk_vccqx_set_lpm()
1225 (unsigned long)hba->dev_info.wspecversion, in ufs_mtk_vsx_set_lpm()
1231 if (!hba->vreg_info.vccq && !hba->vreg_info.vccq2) in ufs_mtk_dev_vreg_set_lpm()
1234 /* Skip if VCC is assumed always-on */ in ufs_mtk_dev_vreg_set_lpm()
1235 if (!hba->vreg_info.vcc) in ufs_mtk_dev_vreg_set_lpm()
1243 if (lpm && hba->vreg_info.vcc->enabled) in ufs_mtk_dev_vreg_set_lpm()
1259 /* disable auto-hibern8 */ in ufs_mtk_auto_hibern8_disable()
1262 /* wait host return to idle state when auto-hibern8 off */ in ufs_mtk_auto_hibern8_disable()
1267 dev_warn(hba->dev, "exit h8 state fail, ret=%d\n", ret); in ufs_mtk_auto_hibern8_disable()
1292 * ufshcd_suspend() re-enabling regulators while vreg is still in ufs_mtk_suspend()
1293 * in low-power mode. in ufs_mtk_suspend()
1313 return -EAGAIN; in ufs_mtk_suspend()
1321 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) in ufs_mtk_resume()
1351 REG_UFS_REJECT_MON - REG_UFS_MPHYCTRL + 4, in ufs_mtk_dbg_register_dump()
1361 struct ufs_dev_info *dev_info = &hba->dev_info; in ufs_mtk_apply_dev_quirks()
1362 u16 mid = dev_info->wmanufacturerid; in ufs_mtk_apply_dev_quirks()
1390 if (ufs_mtk_is_broken_vcc(hba) && hba->vreg_info.vcc && in ufs_mtk_fixup_dev_quirks()
1391 (hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_AFTER_LPM)) { in ufs_mtk_fixup_dev_quirks()
1392 hba->vreg_info.vcc->always_on = true; in ufs_mtk_fixup_dev_quirks()
1394 * VCC will be kept always-on thus we don't in ufs_mtk_fixup_dev_quirks()
1395 * need any delay during regulator operations in ufs_mtk_fixup_dev_quirks()
1397 hba->dev_quirks &= ~(UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM | in ufs_mtk_fixup_dev_quirks()
1416 dev_info(hba->dev, in ufs_mtk_event_notify()
1424 dev_info(hba->dev, "%s\n", ufs_uic_pa_err_str[bit]); in ufs_mtk_event_notify()
1429 dev_info(hba->dev, "%s\n", ufs_uic_dl_err_str[bit]); in ufs_mtk_event_notify()
1438 hba->clk_scaling.min_gear = UFS_HS_G4; in ufs_mtk_config_scaling_param()
1440 hba->vps->devfreq_profile.polling_ms = 200; in ufs_mtk_config_scaling_param()
1441 hba->vps->ondemand_data.upthreshold = 50; in ufs_mtk_config_scaling_param()
1442 hba->vps->ondemand_data.downdifferential = 20; in ufs_mtk_config_scaling_param()
1446 * ufs_mtk_clk_scale - Internal clk scaling operation
1460 struct ufs_mtk_clk *mclk = &host->mclk; in ufs_mtk_clk_scale()
1461 struct ufs_clk_info *clki = mclk->ufs_sel_clki; in ufs_mtk_clk_scale()
1464 ret = clk_prepare_enable(clki->clk); in ufs_mtk_clk_scale()
1466 dev_info(hba->dev, in ufs_mtk_clk_scale()
1472 ret = clk_set_parent(clki->clk, mclk->ufs_sel_max_clki->clk); in ufs_mtk_clk_scale()
1473 clki->curr_freq = clki->max_freq; in ufs_mtk_clk_scale()
1475 ret = clk_set_parent(clki->clk, mclk->ufs_sel_min_clki->clk); in ufs_mtk_clk_scale()
1476 clki->curr_freq = clki->min_freq; in ufs_mtk_clk_scale()
1480 dev_info(hba->dev, in ufs_mtk_clk_scale()
1484 clk_disable_unprepare(clki->clk); in ufs_mtk_clk_scale()
1486 trace_ufs_mtk_clk_scale(clki->name, scale_up, clk_get_rate(clki->clk)); in ufs_mtk_clk_scale()
1507 * struct ufs_hba_mtk_vops - UFS MTK specific variant operations
1532 * ufs_mtk_probe - probe routine of the driver
1535 * Return zero for success and non-zero for failure
1540 struct device *dev = &pdev->dev; in ufs_mtk_probe()
1546 "ti,syscon-reset"); in ufs_mtk_probe()
1548 dev_notice(dev, "find ti,syscon-reset fail\n"); in ufs_mtk_probe()
1556 link = device_link_add(dev, &reset_pdev->dev, in ufs_mtk_probe()
1558 put_device(&reset_pdev->dev); in ufs_mtk_probe()
1564 if (link->status == DL_STATE_DORMANT) { in ufs_mtk_probe()
1565 err = -EPROBE_DEFER; in ufs_mtk_probe()
1582 * ufs_mtk_remove - set driver_data of the device to NULL
1591 pm_runtime_get_sync(&(pdev)->dev); in ufs_mtk_remove()
1658 .name = "ufshcd-mtk",