398 	wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
400 	wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
404 static __u16 rd_reg16(struct slgt_info *info, unsigned int addr);
1323 	value = rd_reg16(info, TCR);  in set_break()
2030 	while (rd_reg16(info, SSR) & IRQ_RXDATA) {  in isr_rxdata()
2031 		reg = rd_reg16(info, RDR);  in isr_rxdata()
2060 	unsigned short status = rd_reg16(info, SSR);  in isr_serial()
2203 		unsigned short val = rd_reg16(info, TCR);  in isr_txeom()
2634 			wr_reg16(info, RCR, rd_reg16(info, RCR) | BIT3);  in rx_enable()
2685 		unsigned short val = rd_reg16(info, SCR);  in wait_mgsl_event()
2751 				(unsigned short)(rd_reg16(info, SCR) & ~IRQ_RXIDLE));  in wait_mgsl_event()
2781 	val = rd_reg16(info, TCR);  in set_interface()
3763 static __u16 rd_reg16(struct slgt_info *info, unsigned int addr)  in rd_reg16()  function
3821 	wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT2));  in enable_loopback()
3869 	val = rd_reg16(info, RCR) & ~BIT1;          /* clear enable bit */  in rx_stop()
3894 	val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */  in rx_start()
3903 		wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14));  in rx_start()
3911 		wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14));  in rx_start()
3927 	wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | BIT1));  in rx_start()
3937 			 (unsigned short)((rd_reg16(info, TCR) | BIT1) & ~BIT2));  in tx_start()
3980 	val = rd_reg16(info, TCR) & ~BIT1;          /* clear enable bit */  in tx_stop()
4343 		wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | val));  in sync_mode()
4391 	tcr = rd_reg16(info, TCR);  in tx_set_idle()
4427 	unsigned short status = rd_reg16(info, SSR);  in get_gtsignals()
4864 		if ((rd_reg16(info, TIR) != patterns[i]) ||  in register_test()
4865 		    (rd_reg16(info, BDR) != patterns[(i+1)%count])) {  in register_test()
4891 		(unsigned short)(rd_reg16(info, TCR) | BIT1));  in irq_test()