Lines Matching +full:serial +full:- +full:output
1 /* SPDX-License-Identifier: GPL-2.0 */
15 SCSMR, /* Serial Mode Register */
17 SCSCR, /* Serial Control Register */
18 SCxSR, /* Serial Status Register */
26 SCSPTR, /* Serial Port Register */
28 SCPCR, /* Serial Port Control Register */
29 SCPDR, /* Serial Port Data Register */
34 SEMR, /* Serial extended mode register */
40 /* SCSMR (Serial Mode Register) */
42 #define SCSMR_CSYNC BIT(7) /* - Clocked synchronous mode */
43 #define SCSMR_ASYNC 0 /* - Asynchronous mode */
44 #define SCSMR_CHR BIT(6) /* 7-bit Character Length */
50 /* Serial Mode Register, SCIFA/SCIFB only bits */
62 /* Serial Control Register, SCIFA/SCIFB only bits */
66 /* Serial Control Register, HSCIF-only bits */
69 /* SCxSR (Serial Status Register) on SCI */
85 /* SCxSR (Serial Status Register) on SCIF, SCIFA, SCIFB, HSCIF */
121 /* SCSPTR (Serial Port Register), optional */
122 #define SCSPTR_RTSIO BIT(7) /* Serial Port RTS# Pin Input/Output */
123 #define SCSPTR_RTSDT BIT(6) /* Serial Port RTS# Pin Data */
124 #define SCSPTR_CTSIO BIT(5) /* Serial Port CTS# Pin Input/Output */
125 #define SCSPTR_CTSDT BIT(4) /* Serial Port CTS# Pin Data */
126 #define SCSPTR_SCKIO BIT(3) /* Serial Port Clock Pin Input/Output */
127 #define SCSPTR_SCKDT BIT(2) /* Serial Port Clock Pin Data */
128 #define SCSPTR_SPB2IO BIT(1) /* Serial Port Break Input/Output */
129 #define SCSPTR_SPB2DT BIT(0) /* Serial Port Break Data */
138 /* SCPCR (Serial Port Control Register), SCIFA/SCIFB only */
139 #define SCPCR_RTSC BIT(4) /* Serial Port RTS# Pin / Output Pin */
140 #define SCPCR_CTSC BIT(3) /* Serial Port CTS# Pin / Input Pin */
141 #define SCPCR_SCKC BIT(2) /* Serial Port SCK Pin / Output Pin */
142 #define SCPCR_RXDC BIT(1) /* Serial Port RXD Pin / Input Pin */
143 #define SCPCR_TXDC BIT(0) /* Serial Port TXD Pin / Output Pin */
145 /* SCPDR (Serial Port Data Register), SCIFA/SCIFB only */
146 #define SCPDR_RTSD BIT(4) /* Serial Port RTS# Output Pin Data */
147 #define SCPDR_CTSD BIT(3) /* Serial Port CTS# Input Pin Data */
148 #define SCPDR_SCKD BIT(2) /* Serial Port SCK Output Pin Data */
149 #define SCPDR_RXDD BIT(1) /* Serial Port RXD Input Pin Data */
150 #define SCPDR_TXDD BIT(0) /* Serial Port TXD Output Pin Data */
161 #define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND)
162 #define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_DR | SCIF_RDF)
163 #define SCxSR_TDxE(port) (((port)->type == PORT_SCI) ? SCI_TDRE : SCIF_TDFE)
164 #define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER)
165 #define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER)
166 #define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK)
168 #define SCxSR_ERRORS(port) (to_sci_port(port)->params->error_mask)
171 (((port)->type == PORT_SCI) ? SCI_RDxF_CLEAR : SCIF_RDxF_CLEAR)
173 (to_sci_port(port)->params->error_clear)
175 (((port)->type == PORT_SCI) ? SCI_TDxE_CLEAR : SCIF_TDxE_CLEAR)
177 (((port)->type == PORT_SCI) ? SCI_BREAK_CLEAR : SCIF_BREAK_CLEAR)