Lines Matching +full:rs485 +full:- +full:rx +full:- +full:active +full:- +full:high
1 // SPDX-License-Identifier: GPL-2.0+
3 * SC16IS7xx tty serial driver - Copyright (C) 2014 GridPoint
33 #define SC16IS7XX_RHR_REG (0x00) /* RX FIFO */
44 #define SC16IS7XX_RXLVL_REG (0x09) /* RX FIFO level */
46 * - only on 75x/76x
49 * - only on 75x/76x
52 * - only on 75x/76x
55 * - only on 75x/76x
65 #define SC16IS7XX_DLH_REG (0x01) /* Divisor Latch High */
75 #define SC16IS7XX_IER_RDI_BIT (1 << 0) /* Enable RX data interrupt */
78 #define SC16IS7XX_IER_RLSI_BIT (1 << 2) /* Enable RX line status
83 /* IER register bits - write only if (EFR[4] == 1) */
91 #define SC16IS7XX_FCR_RXRESET_BIT (1 << 1) /* Reset RX FIFO */
93 #define SC16IS7XX_FCR_RXLVLL_BIT (1 << 6) /* RX Trigger level LSB */
94 #define SC16IS7XX_FCR_RXLVLH_BIT (1 << 7) /* RX Trigger level MSB */
96 /* FCR register bits - write only if (EFR[4] == 1) */
104 #define SC16IS7XX_IIR_RDI_SRC 0x04 /* RX data interrupt */
105 #define SC16IS7XX_IIR_RLSE_SRC 0x06 /* RX line status error */
106 #define SC16IS7XX_IIR_RTOI_SRC 0x0c /* RX time-out interrupt */
108 * - only on 75x/76x
111 * - only on 75x/76x
115 * from active (LOW)
116 * to inactive (HIGH)
123 * 00 -> 5 bit words
124 * 01 -> 6 bit words
125 * 10 -> 7 bit words
126 * 11 -> 8 bit words
131 * 0 -> 1 stop bit
132 * 1 -> 1-1.5 stop bits if
138 #define SC16IS7XX_LCR_FORCEPARITY_BIT (1 << 5) /* 9-bit multidrop parity */
152 * - only on 75x/76x
158 * - write enabled
162 * - write enabled
166 * - write enabled
185 * - only on 75x/76x
189 * - only on 75x/76x
193 * - only on 75x/76x
197 * - only on 75x/76x
200 * - only on 75x/76x
203 * - only on 75x/76x
212 * no built-in hardware check to make sure this condition is met. Also, the TCR
227 * trigger level setting defined in FCR. If TLR has non-zero trigger level value
231 * When TLR is used for RX trigger level control, FCR[7:6] should be left at the
243 #define SC16IS7XX_EFCR_9BIT_MODE_BIT (1 << 0) /* Enable 9-bit or Multidrop
244 * mode (RS485) */
247 #define SC16IS7XX_EFCR_AUTO_RS485_BIT (1 << 4) /* Auto RS485 RTS direction */
251 * - Only 750/760
253 * - Only 760
268 * 00 -> no transmitter flow
270 * 01 -> transmitter generates
272 * 10 -> transmitter generates
274 * 11 -> transmitter generates
282 * 00 -> no received flow
284 * 01 -> receiver compares
286 * 10 -> receiver compares
288 * 11 -> receiver compares
365 return one->line; in sc16is7xx_line()
370 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_port_read()
374 regmap_read(s->regmap, (reg << SC16IS7XX_REG_SHIFT) | line, &val); in sc16is7xx_port_read()
381 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_port_write()
384 regmap_write(s->regmap, (reg << SC16IS7XX_REG_SHIFT) | line, val); in sc16is7xx_port_write()
389 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_fifo_read()
393 regcache_cache_bypass(s->regmap, true); in sc16is7xx_fifo_read()
394 regmap_raw_read(s->regmap, addr, s->buf, rxlen); in sc16is7xx_fifo_read()
395 regcache_cache_bypass(s->regmap, false); in sc16is7xx_fifo_read()
400 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_fifo_write()
405 * Don't send zero-length data, at least on SPI it confuses the chip in sc16is7xx_fifo_write()
411 regcache_cache_bypass(s->regmap, true); in sc16is7xx_fifo_write()
412 regmap_raw_write(s->regmap, addr, s->buf, to_send); in sc16is7xx_fifo_write()
413 regcache_cache_bypass(s->regmap, false); in sc16is7xx_fifo_write()
419 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_port_update()
422 regmap_update_bits(s->regmap, (reg << SC16IS7XX_REG_SHIFT) | line, in sc16is7xx_port_update()
513 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_set_baud()
516 unsigned long clk = port->uartclk, div = clk / 16 / baud; in sc16is7xx_set_baud()
536 mutex_lock(&s->efr_lock); in sc16is7xx_set_baud()
545 regcache_cache_bypass(s->regmap, true); in sc16is7xx_set_baud()
550 regcache_cache_bypass(s->regmap, false); in sc16is7xx_set_baud()
555 mutex_unlock(&s->efr_lock); in sc16is7xx_set_baud()
566 regcache_cache_bypass(s->regmap, true); in sc16is7xx_set_baud()
569 regcache_cache_bypass(s->regmap, false); in sc16is7xx_set_baud()
580 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_handle_rx()
584 if (unlikely(rxlen >= sizeof(s->buf))) { in sc16is7xx_handle_rx()
585 dev_warn_ratelimited(port->dev, in sc16is7xx_handle_rx()
586 "ttySC%i: Possible RX FIFO overrun: %d\n", in sc16is7xx_handle_rx()
587 port->line, rxlen); in sc16is7xx_handle_rx()
588 port->icount.buf_overrun++; in sc16is7xx_handle_rx()
589 /* Ensure sanity of RX level */ in sc16is7xx_handle_rx()
590 rxlen = sizeof(s->buf); in sc16is7xx_handle_rx()
603 s->buf[0] = sc16is7xx_port_read(port, SC16IS7XX_RHR_REG); in sc16is7xx_handle_rx()
612 port->icount.rx++; in sc16is7xx_handle_rx()
617 port->icount.brk++; in sc16is7xx_handle_rx()
621 port->icount.parity++; in sc16is7xx_handle_rx()
623 port->icount.frame++; in sc16is7xx_handle_rx()
625 port->icount.overrun++; in sc16is7xx_handle_rx()
627 lsr &= port->read_status_mask; in sc16is7xx_handle_rx()
639 ch = s->buf[i]; in sc16is7xx_handle_rx()
643 if (lsr & port->ignore_status_mask) in sc16is7xx_handle_rx()
649 rxlen -= bytes_read; in sc16is7xx_handle_rx()
652 tty_flip_buffer_push(&port->state->port); in sc16is7xx_handle_rx()
657 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_handle_tx()
658 struct circ_buf *xmit = &port->state->xmit; in sc16is7xx_handle_tx()
662 if (unlikely(port->x_char)) { in sc16is7xx_handle_tx()
663 sc16is7xx_port_write(port, SC16IS7XX_THR_REG, port->x_char); in sc16is7xx_handle_tx()
664 port->icount.tx++; in sc16is7xx_handle_tx()
665 port->x_char = 0; in sc16is7xx_handle_tx()
670 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_handle_tx()
672 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_handle_tx()
682 dev_err_ratelimited(port->dev, in sc16is7xx_handle_tx()
690 port->icount.tx += to_send; in sc16is7xx_handle_tx()
694 s->buf[i] = xmit->buf[xmit->tail]; in sc16is7xx_handle_tx()
695 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); in sc16is7xx_handle_tx()
701 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_handle_tx()
707 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_handle_tx()
724 struct uart_port *port = &one->port; in sc16is7xx_update_mlines()
725 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_update_mlines()
729 lockdep_assert_held_once(&s->efr_lock); in sc16is7xx_update_mlines()
732 changed = status ^ one->old_mctrl; in sc16is7xx_update_mlines()
737 one->old_mctrl = status; in sc16is7xx_update_mlines()
739 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_update_mlines()
741 port->icount.rng++; in sc16is7xx_update_mlines()
743 port->icount.dsr++; in sc16is7xx_update_mlines()
749 wake_up_interruptible(&port->state->port.delta_msr_wait); in sc16is7xx_update_mlines()
750 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_update_mlines()
755 struct uart_port *port = &s->p[portno].port; in sc16is7xx_port_irq()
785 dev_err_ratelimited(port->dev, in sc16is7xx_port_irq()
787 port->line, iir); in sc16is7xx_port_irq()
798 mutex_lock(&s->efr_lock); in sc16is7xx_irq()
804 for (i = 0; i < s->devtype->nr_uart; ++i) in sc16is7xx_irq()
810 mutex_unlock(&s->efr_lock); in sc16is7xx_irq()
817 struct uart_port *port = &(to_sc16is7xx_one(ws, tx_work)->port); in sc16is7xx_tx_proc()
818 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_tx_proc()
821 if ((port->rs485.flags & SER_RS485_ENABLED) && in sc16is7xx_tx_proc()
822 (port->rs485.delay_rts_before_send > 0)) in sc16is7xx_tx_proc()
823 msleep(port->rs485.delay_rts_before_send); in sc16is7xx_tx_proc()
825 mutex_lock(&s->efr_lock); in sc16is7xx_tx_proc()
827 mutex_unlock(&s->efr_lock); in sc16is7xx_tx_proc()
829 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_tx_proc()
831 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_tx_proc()
839 struct serial_rs485 *rs485 = &port->rs485; in sc16is7xx_reconf_rs485() local
842 spin_lock_irqsave(&port->lock, irqflags); in sc16is7xx_reconf_rs485()
843 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_reconf_rs485()
846 if (rs485->flags & SER_RS485_RTS_AFTER_SEND) in sc16is7xx_reconf_rs485()
849 spin_unlock_irqrestore(&port->lock, irqflags); in sc16is7xx_reconf_rs485()
860 spin_lock_irqsave(&one->port.lock, irqflags); in sc16is7xx_reg_proc()
861 config = one->config; in sc16is7xx_reg_proc()
862 memset(&one->config, 0, sizeof(one->config)); in sc16is7xx_reg_proc()
863 spin_unlock_irqrestore(&one->port.lock, irqflags); in sc16is7xx_reg_proc()
869 if (one->port.mctrl & TIOCM_RTS) in sc16is7xx_reg_proc()
872 if (one->port.mctrl & TIOCM_DTR) in sc16is7xx_reg_proc()
875 if (one->port.mctrl & TIOCM_LOOP) in sc16is7xx_reg_proc()
877 sc16is7xx_port_update(&one->port, SC16IS7XX_MCR_REG, in sc16is7xx_reg_proc()
885 sc16is7xx_port_update(&one->port, SC16IS7XX_IER_REG, in sc16is7xx_reg_proc()
889 sc16is7xx_reconf_rs485(&one->port); in sc16is7xx_reg_proc()
894 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_clear()
897 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_clear()
899 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_clear()
900 one->config.ier_mask |= bit; in sc16is7xx_ier_clear()
901 one->config.ier_val &= ~bit; in sc16is7xx_ier_clear()
902 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_clear()
907 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_set()
910 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_set()
912 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_set()
913 one->config.ier_mask |= bit; in sc16is7xx_ier_set()
914 one->config.ier_val |= bit; in sc16is7xx_ier_set()
915 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_set()
931 struct sc16is7xx_port *s = dev_get_drvdata(one->port.dev); in sc16is7xx_ms_proc()
933 if (one->port.state) { in sc16is7xx_ms_proc()
934 mutex_lock(&s->efr_lock); in sc16is7xx_ms_proc()
936 mutex_unlock(&s->efr_lock); in sc16is7xx_ms_proc()
938 kthread_queue_delayed_work(&s->kworker, &one->ms_work, HZ); in sc16is7xx_ms_proc()
945 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_enable_ms()
947 lockdep_assert_held_once(&port->lock); in sc16is7xx_enable_ms()
949 kthread_queue_delayed_work(&s->kworker, &one->ms_work, 0); in sc16is7xx_enable_ms()
954 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_start_tx()
957 kthread_queue_work(&s->kworker, &one->tx_work); in sc16is7xx_start_tx()
966 * value set in MCR register. Stop reading data from RX FIFO so the in sc16is7xx_throttle()
967 * AutoRTS feature will de-activate RTS output. in sc16is7xx_throttle()
969 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_throttle()
971 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_throttle()
978 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_unthrottle()
980 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_unthrottle()
997 return one->old_mctrl; in sc16is7xx_get_mctrl()
1002 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_set_mctrl()
1005 one->config.flags |= SC16IS7XX_RECONF_MD; in sc16is7xx_set_mctrl()
1006 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_set_mctrl()
1020 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_set_termios()
1026 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_set_termios()
1029 termios->c_cflag &= ~CMSPAR; in sc16is7xx_set_termios()
1032 switch (termios->c_cflag & CSIZE) { in sc16is7xx_set_termios()
1047 termios->c_cflag &= ~CSIZE; in sc16is7xx_set_termios()
1048 termios->c_cflag |= CS8; in sc16is7xx_set_termios()
1053 if (termios->c_cflag & PARENB) { in sc16is7xx_set_termios()
1055 if (!(termios->c_cflag & PARODD)) in sc16is7xx_set_termios()
1060 if (termios->c_cflag & CSTOPB) in sc16is7xx_set_termios()
1064 port->read_status_mask = SC16IS7XX_LSR_OE_BIT; in sc16is7xx_set_termios()
1065 if (termios->c_iflag & INPCK) in sc16is7xx_set_termios()
1066 port->read_status_mask |= SC16IS7XX_LSR_PE_BIT | in sc16is7xx_set_termios()
1068 if (termios->c_iflag & (BRKINT | PARMRK)) in sc16is7xx_set_termios()
1069 port->read_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1072 port->ignore_status_mask = 0; in sc16is7xx_set_termios()
1073 if (termios->c_iflag & IGNBRK) in sc16is7xx_set_termios()
1074 port->ignore_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1075 if (!(termios->c_cflag & CREAD)) in sc16is7xx_set_termios()
1076 port->ignore_status_mask |= SC16IS7XX_LSR_BRK_ERROR_MASK; in sc16is7xx_set_termios()
1079 mutex_lock(&s->efr_lock); in sc16is7xx_set_termios()
1085 regcache_cache_bypass(s->regmap, true); in sc16is7xx_set_termios()
1086 sc16is7xx_port_write(port, SC16IS7XX_XON1_REG, termios->c_cc[VSTART]); in sc16is7xx_set_termios()
1087 sc16is7xx_port_write(port, SC16IS7XX_XOFF1_REG, termios->c_cc[VSTOP]); in sc16is7xx_set_termios()
1089 port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS); in sc16is7xx_set_termios()
1090 if (termios->c_cflag & CRTSCTS) { in sc16is7xx_set_termios()
1093 port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in sc16is7xx_set_termios()
1095 if (termios->c_iflag & IXON) in sc16is7xx_set_termios()
1097 if (termios->c_iflag & IXOFF) in sc16is7xx_set_termios()
1104 regcache_cache_bypass(s->regmap, false); in sc16is7xx_set_termios()
1109 mutex_unlock(&s->efr_lock); in sc16is7xx_set_termios()
1113 port->uartclk / 16 / 4 / 0xffff, in sc16is7xx_set_termios()
1114 port->uartclk / 16); in sc16is7xx_set_termios()
1119 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_set_termios()
1122 uart_update_timeout(port, termios->c_cflag, baud); in sc16is7xx_set_termios()
1124 if (UART_ENABLE_MS(port, termios->c_cflag)) in sc16is7xx_set_termios()
1127 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_set_termios()
1131 struct serial_rs485 *rs485) in sc16is7xx_config_rs485() argument
1133 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_config_rs485()
1136 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_config_rs485()
1142 if (rs485->delay_rts_after_send) in sc16is7xx_config_rs485()
1143 return -EINVAL; in sc16is7xx_config_rs485()
1146 one->config.flags |= SC16IS7XX_RECONF_RS485; in sc16is7xx_config_rs485()
1147 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_config_rs485()
1155 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_startup()
1172 regcache_cache_bypass(s->regmap, true); in sc16is7xx_startup()
1190 regcache_cache_bypass(s->regmap, false); in sc16is7xx_startup()
1199 one->irda_mode ? in sc16is7xx_startup()
1202 /* Enable the Rx and Tx FIFO */ in sc16is7xx_startup()
1208 /* Enable RX, CTS change and modem lines interrupts */ in sc16is7xx_startup()
1214 spin_lock_irqsave(&port->lock, flags); in sc16is7xx_startup()
1216 spin_unlock_irqrestore(&port->lock, flags); in sc16is7xx_startup()
1223 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_shutdown()
1226 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_shutdown()
1230 /* Disable TX/RX */ in sc16is7xx_shutdown()
1239 kthread_flush_worker(&s->kworker); in sc16is7xx_shutdown()
1244 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_type()
1246 return (port->type == PORT_SC16IS7XX) ? s->devtype->name : NULL; in sc16is7xx_type()
1258 port->type = PORT_SC16IS7XX; in sc16is7xx_config_port()
1264 if ((s->type != PORT_UNKNOWN) && (s->type != PORT_SC16IS7XX)) in sc16is7xx_verify_port()
1265 return -EINVAL; in sc16is7xx_verify_port()
1266 if (s->irq != port->irq) in sc16is7xx_verify_port()
1267 return -EINVAL; in sc16is7xx_verify_port()
1310 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_get()
1320 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_set()
1330 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_input()
1341 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_output()
1359 .delay_rts_after_send = 1, /* Not supported but keep returning -EINVAL */
1383 return -EPROBE_DEFER; in sc16is7xx_probe()
1386 s = devm_kzalloc(dev, struct_size(s, p, devtype->nr_uart), GFP_KERNEL); in sc16is7xx_probe()
1389 return -ENOMEM; in sc16is7xx_probe()
1393 device_property_read_u32(dev, "clock-frequency", &uartclk); in sc16is7xx_probe()
1395 s->clk = devm_clk_get_optional(dev, NULL); in sc16is7xx_probe()
1396 if (IS_ERR(s->clk)) in sc16is7xx_probe()
1397 return PTR_ERR(s->clk); in sc16is7xx_probe()
1399 ret = clk_prepare_enable(s->clk); in sc16is7xx_probe()
1403 freq = clk_get_rate(s->clk); in sc16is7xx_probe()
1412 return -EINVAL; in sc16is7xx_probe()
1415 s->regmap = regmap; in sc16is7xx_probe()
1416 s->devtype = devtype; in sc16is7xx_probe()
1418 mutex_init(&s->efr_lock); in sc16is7xx_probe()
1420 kthread_init_worker(&s->kworker); in sc16is7xx_probe()
1421 s->kworker_task = kthread_run(kthread_worker_fn, &s->kworker, in sc16is7xx_probe()
1423 if (IS_ERR(s->kworker_task)) { in sc16is7xx_probe()
1424 ret = PTR_ERR(s->kworker_task); in sc16is7xx_probe()
1427 sched_set_fifo(s->kworker_task); in sc16is7xx_probe()
1430 if (devtype->nr_gpio) { in sc16is7xx_probe()
1432 s->gpio.owner = THIS_MODULE; in sc16is7xx_probe()
1433 s->gpio.parent = dev; in sc16is7xx_probe()
1434 s->gpio.label = dev_name(dev); in sc16is7xx_probe()
1435 s->gpio.direction_input = sc16is7xx_gpio_direction_input; in sc16is7xx_probe()
1436 s->gpio.get = sc16is7xx_gpio_get; in sc16is7xx_probe()
1437 s->gpio.direction_output = sc16is7xx_gpio_direction_output; in sc16is7xx_probe()
1438 s->gpio.set = sc16is7xx_gpio_set; in sc16is7xx_probe()
1439 s->gpio.base = -1; in sc16is7xx_probe()
1440 s->gpio.ngpio = devtype->nr_gpio; in sc16is7xx_probe()
1441 s->gpio.can_sleep = 1; in sc16is7xx_probe()
1442 ret = gpiochip_add_data(&s->gpio, s); in sc16is7xx_probe()
1449 regmap_write(s->regmap, SC16IS7XX_IOCONTROL_REG << SC16IS7XX_REG_SHIFT, in sc16is7xx_probe()
1452 for (i = 0; i < devtype->nr_uart; ++i) { in sc16is7xx_probe()
1453 s->p[i].line = i; in sc16is7xx_probe()
1455 s->p[i].port.dev = dev; in sc16is7xx_probe()
1456 s->p[i].port.irq = irq; in sc16is7xx_probe()
1457 s->p[i].port.type = PORT_SC16IS7XX; in sc16is7xx_probe()
1458 s->p[i].port.fifosize = SC16IS7XX_FIFO_SIZE; in sc16is7xx_probe()
1459 s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY; in sc16is7xx_probe()
1460 s->p[i].port.iobase = i; in sc16is7xx_probe()
1461 s->p[i].port.iotype = UPIO_PORT; in sc16is7xx_probe()
1462 s->p[i].port.uartclk = freq; in sc16is7xx_probe()
1463 s->p[i].port.rs485_config = sc16is7xx_config_rs485; in sc16is7xx_probe()
1464 s->p[i].port.rs485_supported = sc16is7xx_rs485_supported; in sc16is7xx_probe()
1465 s->p[i].port.ops = &sc16is7xx_ops; in sc16is7xx_probe()
1466 s->p[i].old_mctrl = 0; in sc16is7xx_probe()
1467 s->p[i].port.line = sc16is7xx_alloc_line(); in sc16is7xx_probe()
1469 if (s->p[i].port.line >= SC16IS7XX_MAX_DEVS) { in sc16is7xx_probe()
1470 ret = -ENOMEM; in sc16is7xx_probe()
1475 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_IER_REG, 0); in sc16is7xx_probe()
1476 /* Disable TX/RX */ in sc16is7xx_probe()
1477 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFCR_REG, in sc16is7xx_probe()
1482 if (devtype->has_mctrl) in sc16is7xx_probe()
1483 sc16is7xx_port_write(&s->p[i].port, in sc16is7xx_probe()
1488 kthread_init_work(&s->p[i].tx_work, sc16is7xx_tx_proc); in sc16is7xx_probe()
1489 kthread_init_work(&s->p[i].reg_work, sc16is7xx_reg_proc); in sc16is7xx_probe()
1490 kthread_init_delayed_work(&s->p[i].ms_work, sc16is7xx_ms_proc); in sc16is7xx_probe()
1492 uart_add_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1495 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, in sc16is7xx_probe()
1498 regcache_cache_bypass(s->regmap, true); in sc16is7xx_probe()
1501 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFR_REG, in sc16is7xx_probe()
1504 regcache_cache_bypass(s->regmap, false); in sc16is7xx_probe()
1507 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, 0x00); in sc16is7xx_probe()
1510 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_probe()
1513 if (dev->of_node) { in sc16is7xx_probe()
1518 of_property_for_each_u32(dev->of_node, "irda-mode-ports", in sc16is7xx_probe()
1520 if (u < devtype->nr_uart) in sc16is7xx_probe()
1521 s->p[u].irda_mode = true; in sc16is7xx_probe()
1528 * back to a non-shared falling-edge trigger. in sc16is7xx_probe()
1544 for (i--; i >= 0; i--) { in sc16is7xx_probe()
1545 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1546 clear_bit(s->p[i].port.line, &sc16is7xx_lines); in sc16is7xx_probe()
1550 if (devtype->nr_gpio) in sc16is7xx_probe()
1551 gpiochip_remove(&s->gpio); in sc16is7xx_probe()
1555 kthread_stop(s->kworker_task); in sc16is7xx_probe()
1558 clk_disable_unprepare(s->clk); in sc16is7xx_probe()
1569 if (s->devtype->nr_gpio) in sc16is7xx_remove()
1570 gpiochip_remove(&s->gpio); in sc16is7xx_remove()
1573 for (i = 0; i < s->devtype->nr_uart; i++) { in sc16is7xx_remove()
1574 kthread_cancel_delayed_work_sync(&s->p[i].ms_work); in sc16is7xx_remove()
1575 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_remove()
1576 clear_bit(s->p[i].port.line, &sc16is7xx_lines); in sc16is7xx_remove()
1577 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_remove()
1580 kthread_flush_worker(&s->kworker); in sc16is7xx_remove()
1581 kthread_stop(s->kworker_task); in sc16is7xx_remove()
1583 clk_disable_unprepare(s->clk); in sc16is7xx_remove()
1614 spi->bits_per_word = 8; in sc16is7xx_spi_probe()
1616 spi->mode = spi->mode ? : SPI_MODE_0; in sc16is7xx_spi_probe()
1617 spi->max_speed_hz = spi->max_speed_hz ? : 15000000; in sc16is7xx_spi_probe()
1622 if (spi->dev.of_node) { in sc16is7xx_spi_probe()
1623 devtype = device_get_match_data(&spi->dev); in sc16is7xx_spi_probe()
1625 return -ENODEV; in sc16is7xx_spi_probe()
1629 devtype = (struct sc16is7xx_devtype *)id_entry->driver_data; in sc16is7xx_spi_probe()
1633 (devtype->nr_uart - 1); in sc16is7xx_spi_probe()
1636 return sc16is7xx_probe(&spi->dev, devtype, regmap, spi->irq); in sc16is7xx_spi_probe()
1641 sc16is7xx_remove(&spi->dev); in sc16is7xx_spi_remove()
1677 if (i2c->dev.of_node) { in sc16is7xx_i2c_probe()
1678 devtype = device_get_match_data(&i2c->dev); in sc16is7xx_i2c_probe()
1680 return -ENODEV; in sc16is7xx_i2c_probe()
1682 devtype = (struct sc16is7xx_devtype *)id->driver_data; in sc16is7xx_i2c_probe()
1686 (devtype->nr_uart - 1); in sc16is7xx_i2c_probe()
1689 return sc16is7xx_probe(&i2c->dev, devtype, regmap, i2c->irq); in sc16is7xx_i2c_probe()
1694 sc16is7xx_remove(&client->dev); in sc16is7xx_i2c_remove()
1734 pr_err("failed to init sc16is7xx i2c --> %d\n", ret); in sc16is7xx_init()
1742 pr_err("failed to init sc16is7xx spi --> %d\n", ret); in sc16is7xx_init()