124 	write_zsreg(uap, R1,  in pmz_load_zsregs()
128 	write_zsreg(uap, R4, regs[R4]);  in pmz_load_zsregs()
131 	write_zsreg(uap, R10, regs[R10]);  in pmz_load_zsregs()
134 	write_zsreg(uap, R3, regs[R3] & ~RxENABLE);  in pmz_load_zsregs()
135 	write_zsreg(uap, R5, regs[R5] & ~TxENABLE);  in pmz_load_zsregs()
138 	write_zsreg(uap, R15, regs[R15] | EN85C30);  in pmz_load_zsregs()
139 	write_zsreg(uap, R7, regs[R7P]);  in pmz_load_zsregs()
142 	write_zsreg(uap, R15, regs[R15] & ~EN85C30);  in pmz_load_zsregs()
145 	write_zsreg(uap, R6, regs[R6]);  in pmz_load_zsregs()
146 	write_zsreg(uap, R7, regs[R7]);  in pmz_load_zsregs()
149 	write_zsreg(uap, R14, regs[R14] & ~BRENAB);  in pmz_load_zsregs()
152 	write_zsreg(uap, R11, regs[R11]);  in pmz_load_zsregs()
155 	write_zsreg(uap, R12, regs[R12]);  in pmz_load_zsregs()
156 	write_zsreg(uap, R13, regs[R13]);  in pmz_load_zsregs()
159 	write_zsreg(uap, R14, regs[R14]);  in pmz_load_zsregs()
162 	write_zsreg(uap, R0, RES_EXT_INT);  in pmz_load_zsregs()
163 	write_zsreg(uap, R0, RES_EXT_INT);  in pmz_load_zsregs()
166 	write_zsreg(uap, R3, regs[R3]);  in pmz_load_zsregs()
167 	write_zsreg(uap, R5, regs[R5]);  in pmz_load_zsregs()
170 	write_zsreg(uap, R1, regs[R1]);  in pmz_load_zsregs()
173 	write_zsreg(uap, R9, regs[R9]);  in pmz_load_zsregs()
205 	write_zsreg(uap, R1, uap->curregs[1]);  in pmz_interrupt_control()
230 			write_zsreg(uap, R0, ERR_RES);  in pmz_receive_chars()
320 	write_zsreg(uap, R0, RES_EXT_INT);  in pmz_status_handle()
422 	write_zsreg(uap, R0, RES_Tx_P);  in pmz_transmit_chars()
449 		write_zsreg(uap_a, R0, RES_H_IUS);  in pmz_interrupt()
474 		write_zsreg(uap_b, R0, RES_H_IUS);  in pmz_interrupt()
557 	write_zsreg(uap, R5, uap->curregs[R5]);  in pmz_set_mctrl()
669 		write_zsreg(uap, R15, uap->curregs[R15]);  in pmz_enable_ms()
695 		write_zsreg(uap, R5, uap->curregs[R5]);  in pmz_break_ctl()
769 	write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);  in pmz_fix_zero_bug_scc()
772 	write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV);  in pmz_fix_zero_bug_scc()
775 	write_zsreg(uap, 4, X1CLK | MONSYNC);  in pmz_fix_zero_bug_scc()
776 	write_zsreg(uap, 3, Rx8);  in pmz_fix_zero_bug_scc()
777 	write_zsreg(uap, 5, Tx8 | RTS);  in pmz_fix_zero_bug_scc()
778 	write_zsreg(uap, 9, NV);	/* Didn't we already do this? */  in pmz_fix_zero_bug_scc()
779 	write_zsreg(uap, 11, RCBR | TCBR);  in pmz_fix_zero_bug_scc()
780 	write_zsreg(uap, 12, 0);  in pmz_fix_zero_bug_scc()
781 	write_zsreg(uap, 13, 0);  in pmz_fix_zero_bug_scc()
782 	write_zsreg(uap, 14, (LOOPBAK | BRSRC));  in pmz_fix_zero_bug_scc()
783 	write_zsreg(uap, 14, (LOOPBAK | BRSRC | BRENAB));  in pmz_fix_zero_bug_scc()
784 	write_zsreg(uap, 3, Rx8 | RxENABLE);  in pmz_fix_zero_bug_scc()
785 	write_zsreg(uap, 0, RES_EXT_INT);  in pmz_fix_zero_bug_scc()
786 	write_zsreg(uap, 0, RES_EXT_INT);  in pmz_fix_zero_bug_scc()
787 	write_zsreg(uap, 0, RES_EXT_INT);	/* to kill some time */  in pmz_fix_zero_bug_scc()
794 	write_zsreg(uap, 9, NV);  in pmz_fix_zero_bug_scc()
795 	write_zsreg(uap, 4, X16CLK | SB_MASK);  in pmz_fix_zero_bug_scc()
796 	write_zsreg(uap, 3, Rx8);  in pmz_fix_zero_bug_scc()
800 		write_zsreg(uap, 0, RES_EXT_INT);  in pmz_fix_zero_bug_scc()
801 		write_zsreg(uap, 0, ERR_RES);  in pmz_fix_zero_bug_scc()
825 	write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);  in __pmz_startup()
828 	write_zsreg(uap, 9, 0);  in __pmz_startup()
832 	write_zsreg(uap, R1, 0);  in __pmz_startup()
833 	write_zsreg(uap, R0, ERR_RES);  in __pmz_startup()
834 	write_zsreg(uap, R0, ERR_RES);  in __pmz_startup()
835 	write_zsreg(uap, R0, RES_H_IUS);  in __pmz_startup()
836 	write_zsreg(uap, R0, RES_H_IUS);  in __pmz_startup()
857 	write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE);  in __pmz_startup()
858 	write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE);  in __pmz_startup()
872 	write_zsreg(uap, R5, uap->curregs[R5]);  in pmz_irda_reset()
879 	write_zsreg(uap, R5, uap->curregs[R5]);  in pmz_irda_reset()
1145 	write_zsreg(uap, R5, uap->curregs[R5]);  in pmz_irda_setup()
1195 	write_zsreg(uap, R5, uap->curregs[R5]);  in pmz_irda_setup()
1904 	write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB);  in pmz_console_write()
1905 	write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR);  in pmz_console_write()
1910 	write_zsreg(uap, R1, uap->curregs[1]);  in pmz_console_write()