190 void msm_write(struct uart_port *port, unsigned int val, unsigned int off)  in msm_write()  function
206 	msm_write(port, 0x06, MSM_UART_MREG);  in msm_serial_set_mnd_regs_tcxo()
207 	msm_write(port, 0xF1, MSM_UART_NREG);  in msm_serial_set_mnd_regs_tcxo()
208 	msm_write(port, 0x0F, MSM_UART_DREG);  in msm_serial_set_mnd_regs_tcxo()
209 	msm_write(port, 0x1A, MSM_UART_MNDREG);  in msm_serial_set_mnd_regs_tcxo()
218 	msm_write(port, 0x18, MSM_UART_MREG);  in msm_serial_set_mnd_regs_tcxoby4()
219 	msm_write(port, 0xF6, MSM_UART_NREG);  in msm_serial_set_mnd_regs_tcxoby4()
220 	msm_write(port, 0x0F, MSM_UART_DREG);  in msm_serial_set_mnd_regs_tcxoby4()
221 	msm_write(port, 0x0A, MSM_UART_MNDREG);  in msm_serial_set_mnd_regs_tcxoby4()
265 	msm_write(port, val, UARTDM_DMEN);  in msm_stop_dma()
405 	msm_write(port, MSM_UART_CR_CMD_RESET_TX_READY, MSM_UART_CR);  in msm_wait_for_xmitr()
413 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_stop_tx()
426 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_start_tx()
432 	msm_write(port, count, UARTDM_NCF_TX);  in msm_reset_dm_count()
459 	msm_write(port, val, UARTDM_DMEN);  in msm_complete_tx_dma()
462 		msm_write(port, MSM_UART_CR_CMD_RESET_TX, MSM_UART_CR);  in msm_complete_tx_dma()
463 		msm_write(port, MSM_UART_CR_TX_ENABLE, MSM_UART_CR);  in msm_complete_tx_dma()
475 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_complete_tx_dma()
523 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_handle_tx_dma()
531 		msm_write(port, val, UARTDM_DMEN);  in msm_handle_tx_dma()
536 		msm_write(port, val, UARTDM_DMEN);  in msm_handle_tx_dma()
563 	msm_write(port, val, UARTDM_DMEN);  in msm_complete_rx_dma()
568 		msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);  in msm_complete_rx_dma()
653 	msm_write(uart, msm_port->imr, MSM_UART_IMR);  in msm_start_rx_dma()
659 	msm_write(uart, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);  in msm_start_rx_dma()
660 	msm_write(uart, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);  in msm_start_rx_dma()
666 		msm_write(uart, val, UARTDM_DMEN);  in msm_start_rx_dma()
668 	msm_write(uart, UARTDM_RX_SIZE, UARTDM_DMRX);  in msm_start_rx_dma()
671 		msm_write(uart, val, UARTDM_DMEN);  in msm_start_rx_dma()
682 	msm_write(uart, MSM_UART_CR_CMD_RESET_RX, MSM_UART_CR);  in msm_start_rx_dma()
683 	msm_write(uart, MSM_UART_CR_RX_ENABLE, MSM_UART_CR);  in msm_start_rx_dma()
685 	msm_write(uart, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);  in msm_start_rx_dma()
686 	msm_write(uart, 0xFFFFFF, UARTDM_DMRX);  in msm_start_rx_dma()
687 	msm_write(uart, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);  in msm_start_rx_dma()
691 	msm_write(uart, msm_port->imr, MSM_UART_IMR);  in msm_start_rx_dma()
700 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_stop_rx()
711 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_enable_ms()
725 		msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);  in msm_handle_rx_dm()
780 		msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);  in msm_handle_rx_dm()
781 	msm_write(port, 0xFFFFFF, UARTDM_DMRX);  in msm_handle_rx_dm()
782 	msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);  in msm_handle_rx_dm()
801 		msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);  in msm_handle_rx()
945 	msm_write(port, MSM_UART_CR_CMD_RESET_CTS, MSM_UART_CR);  in msm_handle_delta_cts()
961 	msm_write(port, 0, MSM_UART_IMR); /* disable interrupt */  in msm_uart_irq()
965 		msm_write(port, MSM_UART_CR_CMD_RESET_RXBREAK_START, MSM_UART_CR);  in msm_uart_irq()
971 			msm_write(port, val, MSM_UART_CR);  in msm_uart_irq()
973 			msm_write(port, val, MSM_UART_CR);  in msm_uart_irq()
990 	msm_write(port, msm_port->imr, MSM_UART_IMR); /* restore interrupt */  in msm_uart_irq()
1012 	msm_write(port, MSM_UART_CR_CMD_RESET_RX, MSM_UART_CR);  in msm_reset()
1013 	msm_write(port, MSM_UART_CR_CMD_RESET_TX, MSM_UART_CR);  in msm_reset()
1014 	msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);  in msm_reset()
1015 	msm_write(port, MSM_UART_CR_CMD_RESET_BREAK_INT, MSM_UART_CR);  in msm_reset()
1016 	msm_write(port, MSM_UART_CR_CMD_RESET_CTS, MSM_UART_CR);  in msm_reset()
1017 	msm_write(port, MSM_UART_CR_CMD_RESET_RFR, MSM_UART_CR);  in msm_reset()
1020 	msm_write(port, mr, MSM_UART_MR1);  in msm_reset()
1024 		msm_write(port, 0, UARTDM_DMEN);  in msm_reset()
1035 		msm_write(port, mr, MSM_UART_MR1);  in msm_set_mctrl()
1036 		msm_write(port, MSM_UART_CR_CMD_RESET_RFR, MSM_UART_CR);  in msm_set_mctrl()
1039 		msm_write(port, mr, MSM_UART_MR1);  in msm_set_mctrl()
1046 		msm_write(port, MSM_UART_CR_CMD_START_BREAK, MSM_UART_CR);  in msm_break_ctl()
1048 		msm_write(port, MSM_UART_CR_CMD_STOP_BREAK, MSM_UART_CR);  in msm_break_ctl()
1145 	msm_write(port, entry->code, MSM_UART_CSR);  in msm_set_baud_rate()
1159 	msm_write(port, watermark, MSM_UART_IPR);  in msm_set_baud_rate()
1163 	msm_write(port, watermark, MSM_UART_RFWR);  in msm_set_baud_rate()
1166 	msm_write(port, 10, MSM_UART_TFWR);  in msm_set_baud_rate()
1168 	msm_write(port, MSM_UART_CR_CMD_PROTECTION_EN, MSM_UART_CR);  in msm_set_baud_rate()
1172 	msm_write(port, MSM_UART_CR_TX_ENABLE | MSM_UART_CR_RX_ENABLE, MSM_UART_CR);  in msm_set_baud_rate()
1178 	msm_write(port, msm_port->imr, MSM_UART_IMR);  in msm_set_baud_rate()
1181 		msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);  in msm_set_baud_rate()
1182 		msm_write(port, 0xFFFFFF, UARTDM_DMRX);  in msm_set_baud_rate()
1183 		msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);  in msm_set_baud_rate()
1226 	msm_write(port, data, MSM_UART_MR1);  in msm_startup()
1255 	msm_write(port, 0, MSM_UART_IMR); /* disable interrupts */  in msm_shutdown()
1322 	msm_write(port, mr, MSM_UART_MR2);  in msm_set_termios()
1331 	msm_write(port, mr, MSM_UART_MR1);  in msm_set_termios()
1470 			msm_write(port, MSM_UART_CR_CMD_FORCE_STALE, MSM_UART_CR);  in msm_poll_get_char_dm()
1474 			msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);  in msm_poll_get_char_dm()
1475 			msm_write(port, 0xFFFFFF, UARTDM_DMRX);  in msm_poll_get_char_dm()
1476 			msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);  in msm_poll_get_char_dm()
1498 	msm_write(port, 0, MSM_UART_IMR);  in msm_poll_get_char()
1506 	msm_write(port, imr, MSM_UART_IMR);  in msm_poll_get_char()
1518 	msm_write(port, 0, MSM_UART_IMR);  in msm_poll_put_char()
1528 	msm_write(port, c, msm_port->is_uartdm ? UARTDM_TF : MSM_UART_TF);  in msm_poll_put_char()
1535 	msm_write(port, imr, MSM_UART_IMR);  in msm_poll_put_char()