40 #define UCR1  0x80 /* Control Register 1 */  macro
279 	case UCR1:  in imx_uart_writel()
303 	case UCR1:  in imx_uart_readl()
363 	ucr->ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_ucrs_save()
372 	imx_uart_writel(sport, ucr->ucr1, UCR1);  in imx_uart_ucrs_restore()
406 	ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_start_rx()
420 	imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_start_rx()
439 	ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_stop_tx()
440 	imx_uart_writel(sport, ucr1 & ~UCR1_TRDYEN, UCR1);  in imx_uart_stop_tx()
494 	ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_stop_rx()
505 	imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_stop_rx()
548 		ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_transmit_buffer()
552 			imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_transmit_buffer()
554 			imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_transmit_buffer()
589 	ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_dma_tx_callback()
591 	imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_dma_tx_callback()
665 	ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_dma_tx()
667 	imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_dma_tx()
737 		ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_start_tx()
738 		imx_uart_writel(sport, ucr1 | UCR1_TRDYEN, UCR1);  in imx_uart_start_tx()
745 			ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_start_tx()
748 			imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_start_tx()
939 	ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_int()
1090 	ucr1 = imx_uart_readl(sport, UCR1) & ~UCR1_SNDBRK;  in imx_uart_break_ctl()
1095 	imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_break_ctl()
1366 	ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_enable_dma()
1368 	imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_enable_dma()
1378 	ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_disable_dma()
1380 	imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_disable_dma()
1441 	ucr1 = imx_uart_readl(sport, UCR1) & ~UCR1_RRDYEN;  in imx_uart_startup()
1446 	imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_startup()
1492 		ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_startup()
1494 		imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_startup()
1553 	ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_shutdown()
1555 	imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_shutdown()
1585 		ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_flush_buffer()
1587 		imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_flush_buffer()
1854 	ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_poll_init()
1866 	imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_poll_init()
1870 	imx_uart_writel(sport, ucr1 | UCR1_RRDYEN, UCR1);  in imx_uart_poll_init()
2003 	imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_console_write()
2030 	if (imx_uart_readl(sport, UCR1) & UCR1_UARTEN) {  in imx_uart_console_get_options()
2320 	sport->ucr1 = readl(sport->port.membase + UCR1);  in imx_uart_probe()
2349 	ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_probe()
2351 	imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_probe()
2458 	imx_uart_writel(sport, sport->saved_reg[0], UCR1);  in imx_uart_restore_context()
2472 	sport->saved_reg[0] = imx_uart_readl(sport, UCR1);  in imx_uart_save_context()
2500 		u32 ucr1 = imx_uart_readl(sport, UCR1);  in imx_uart_enable_wakeup()
2507 		imx_uart_writel(sport, ucr1, UCR1);  in imx_uart_enable_wakeup()