Lines Matching refs:uap
277 static unsigned int pl011_reg_to_offset(const struct uart_amba_port *uap, in pl011_reg_to_offset() argument
280 return uap->reg_offset[reg]; in pl011_reg_to_offset()
283 static unsigned int pl011_read(const struct uart_amba_port *uap, in pl011_read() argument
286 void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg); in pl011_read()
288 return (uap->port.iotype == UPIO_MEM32) ? in pl011_read()
292 static void pl011_write(unsigned int val, const struct uart_amba_port *uap, in pl011_write() argument
295 void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg); in pl011_write()
297 if (uap->port.iotype == UPIO_MEM32) in pl011_write()
308 static int pl011_fifo_to_tty(struct uart_amba_port *uap) in pl011_fifo_to_tty() argument
315 status = pl011_read(uap, REG_FR); in pl011_fifo_to_tty()
320 ch = pl011_read(uap, REG_DR) | UART_DUMMY_DR_RX; in pl011_fifo_to_tty()
322 uap->port.icount.rx++; in pl011_fifo_to_tty()
327 uap->port.icount.brk++; in pl011_fifo_to_tty()
328 if (uart_handle_break(&uap->port)) in pl011_fifo_to_tty()
331 uap->port.icount.parity++; in pl011_fifo_to_tty()
333 uap->port.icount.frame++; in pl011_fifo_to_tty()
335 uap->port.icount.overrun++; in pl011_fifo_to_tty()
337 ch &= uap->port.read_status_mask; in pl011_fifo_to_tty()
347 spin_unlock(&uap->port.lock); in pl011_fifo_to_tty()
348 sysrq = uart_handle_sysrq_char(&uap->port, ch & 255); in pl011_fifo_to_tty()
349 spin_lock(&uap->port.lock); in pl011_fifo_to_tty()
352 uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag); in pl011_fifo_to_tty()
397 static void pl011_dma_probe(struct uart_amba_port *uap) in pl011_dma_probe() argument
400 struct amba_pl011_data *plat = dev_get_platdata(uap->port.dev); in pl011_dma_probe()
401 struct device *dev = uap->port.dev; in pl011_dma_probe()
403 .dst_addr = uap->port.mapbase + in pl011_dma_probe()
404 pl011_reg_to_offset(uap, REG_DR), in pl011_dma_probe()
407 .dst_maxburst = uap->fifosize >> 1, in pl011_dma_probe()
413 uap->dma_probed = true; in pl011_dma_probe()
417 uap->dma_probed = false; in pl011_dma_probe()
423 dev_info(uap->port.dev, "no DMA platform data\n"); in pl011_dma_probe()
434 dev_err(uap->port.dev, "no TX DMA channel!\n"); in pl011_dma_probe()
440 uap->dmatx.chan = chan; in pl011_dma_probe()
442 dev_info(uap->port.dev, "DMA channel TX %s\n", in pl011_dma_probe()
443 dma_chan_name(uap->dmatx.chan)); in pl011_dma_probe()
452 dev_err(uap->port.dev, "no RX DMA channel!\n"); in pl011_dma_probe()
459 .src_addr = uap->port.mapbase + in pl011_dma_probe()
460 pl011_reg_to_offset(uap, REG_DR), in pl011_dma_probe()
463 .src_maxburst = uap->fifosize >> 2, in pl011_dma_probe()
477 dev_info(uap->port.dev, in pl011_dma_probe()
483 uap->dmarx.chan = chan; in pl011_dma_probe()
485 uap->dmarx.auto_poll_rate = false; in pl011_dma_probe()
489 uap->dmarx.auto_poll_rate = false; in pl011_dma_probe()
490 uap->dmarx.poll_rate = plat->dma_rx_poll_rate; in pl011_dma_probe()
497 uap->dmarx.auto_poll_rate = true; in pl011_dma_probe()
498 uap->dmarx.poll_rate = 100; in pl011_dma_probe()
502 uap->dmarx.poll_timeout = in pl011_dma_probe()
505 uap->dmarx.poll_timeout = 3000; in pl011_dma_probe()
507 uap->dmarx.auto_poll_rate = of_property_read_bool( in pl011_dma_probe()
509 if (uap->dmarx.auto_poll_rate) { in pl011_dma_probe()
514 uap->dmarx.poll_rate = x; in pl011_dma_probe()
516 uap->dmarx.poll_rate = 100; in pl011_dma_probe()
519 uap->dmarx.poll_timeout = x; in pl011_dma_probe()
521 uap->dmarx.poll_timeout = 3000; in pl011_dma_probe()
524 dev_info(uap->port.dev, "DMA channel RX %s\n", in pl011_dma_probe()
525 dma_chan_name(uap->dmarx.chan)); in pl011_dma_probe()
529 static void pl011_dma_remove(struct uart_amba_port *uap) in pl011_dma_remove() argument
531 if (uap->dmatx.chan) in pl011_dma_remove()
532 dma_release_channel(uap->dmatx.chan); in pl011_dma_remove()
533 if (uap->dmarx.chan) in pl011_dma_remove()
534 dma_release_channel(uap->dmarx.chan); in pl011_dma_remove()
538 static int pl011_dma_tx_refill(struct uart_amba_port *uap);
539 static void pl011_start_tx_pio(struct uart_amba_port *uap);
547 struct uart_amba_port *uap = data; in pl011_dma_tx_callback() local
548 struct pl011_dmatx_data *dmatx = &uap->dmatx; in pl011_dma_tx_callback()
552 spin_lock_irqsave(&uap->port.lock, flags); in pl011_dma_tx_callback()
553 if (uap->dmatx.queued) in pl011_dma_tx_callback()
557 dmacr = uap->dmacr; in pl011_dma_tx_callback()
558 uap->dmacr = dmacr & ~UART011_TXDMAE; in pl011_dma_tx_callback()
559 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_callback()
570 if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) || in pl011_dma_tx_callback()
571 uart_circ_empty(&uap->port.state->xmit)) { in pl011_dma_tx_callback()
572 uap->dmatx.queued = false; in pl011_dma_tx_callback()
573 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_tx_callback()
577 if (pl011_dma_tx_refill(uap) <= 0) in pl011_dma_tx_callback()
582 pl011_start_tx_pio(uap); in pl011_dma_tx_callback()
584 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_tx_callback()
595 static int pl011_dma_tx_refill(struct uart_amba_port *uap) in pl011_dma_tx_refill() argument
597 struct pl011_dmatx_data *dmatx = &uap->dmatx; in pl011_dma_tx_refill()
601 struct circ_buf *xmit = &uap->port.state->xmit; in pl011_dma_tx_refill()
611 if (count < (uap->fifosize >> 1)) { in pl011_dma_tx_refill()
612 uap->dmatx.queued = false; in pl011_dma_tx_refill()
644 uap->dmatx.queued = false; in pl011_dma_tx_refill()
645 dev_dbg(uap->port.dev, "unable to map TX DMA\n"); in pl011_dma_tx_refill()
653 uap->dmatx.queued = false; in pl011_dma_tx_refill()
658 dev_dbg(uap->port.dev, "TX DMA busy\n"); in pl011_dma_tx_refill()
664 desc->callback_param = uap; in pl011_dma_tx_refill()
672 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_refill()
673 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_refill()
674 uap->dmatx.queued = true; in pl011_dma_tx_refill()
681 uap->port.icount.tx += count; in pl011_dma_tx_refill()
684 uart_write_wakeup(&uap->port); in pl011_dma_tx_refill()
697 static bool pl011_dma_tx_irq(struct uart_amba_port *uap) in pl011_dma_tx_irq() argument
699 if (!uap->using_tx_dma) in pl011_dma_tx_irq()
707 if (uap->dmatx.queued) { in pl011_dma_tx_irq()
708 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_irq()
709 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_irq()
710 uap->im &= ~UART011_TXIM; in pl011_dma_tx_irq()
711 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
719 if (pl011_dma_tx_refill(uap) > 0) { in pl011_dma_tx_irq()
720 uap->im &= ~UART011_TXIM; in pl011_dma_tx_irq()
721 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_irq()
731 static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) in pl011_dma_tx_stop() argument
733 if (uap->dmatx.queued) { in pl011_dma_tx_stop()
734 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_stop()
735 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_stop()
747 static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) in pl011_dma_tx_start() argument
751 if (!uap->using_tx_dma) in pl011_dma_tx_start()
754 if (!uap->port.x_char) { in pl011_dma_tx_start()
758 if (!uap->dmatx.queued) { in pl011_dma_tx_start()
759 if (pl011_dma_tx_refill(uap) > 0) { in pl011_dma_tx_start()
760 uap->im &= ~UART011_TXIM; in pl011_dma_tx_start()
761 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_tx_start()
764 } else if (!(uap->dmacr & UART011_TXDMAE)) { in pl011_dma_tx_start()
765 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_start()
766 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
775 dmacr = uap->dmacr; in pl011_dma_tx_start()
776 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_start()
777 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
779 if (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) { in pl011_dma_tx_start()
788 pl011_write(uap->port.x_char, uap, REG_DR); in pl011_dma_tx_start()
789 uap->port.icount.tx++; in pl011_dma_tx_start()
790 uap->port.x_char = 0; in pl011_dma_tx_start()
793 uap->dmacr = dmacr; in pl011_dma_tx_start()
794 pl011_write(dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
804 __releases(&uap->port.lock) in pl011_dma_flush_buffer()
805 __acquires(&uap->port.lock) in pl011_dma_flush_buffer()
807 struct uart_amba_port *uap = in pl011_dma_flush_buffer() local
810 if (!uap->using_tx_dma) in pl011_dma_flush_buffer()
813 dmaengine_terminate_async(uap->dmatx.chan); in pl011_dma_flush_buffer()
815 if (uap->dmatx.queued) { in pl011_dma_flush_buffer()
816 dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, in pl011_dma_flush_buffer()
818 uap->dmatx.queued = false; in pl011_dma_flush_buffer()
819 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_flush_buffer()
820 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_flush_buffer()
826 static int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap) in pl011_dma_rx_trigger_dma() argument
828 struct dma_chan *rxchan = uap->dmarx.chan; in pl011_dma_rx_trigger_dma()
829 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_trigger_dma()
837 sgbuf = uap->dmarx.use_buf_b ? in pl011_dma_rx_trigger_dma()
838 &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_trigger_dma()
848 uap->dmarx.running = false; in pl011_dma_rx_trigger_dma()
855 desc->callback_param = uap; in pl011_dma_rx_trigger_dma()
859 uap->dmacr |= UART011_RXDMAE; in pl011_dma_rx_trigger_dma()
860 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_trigger_dma()
861 uap->dmarx.running = true; in pl011_dma_rx_trigger_dma()
863 uap->im &= ~UART011_RXIM; in pl011_dma_rx_trigger_dma()
864 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_trigger_dma()
874 static void pl011_dma_rx_chars(struct uart_amba_port *uap, in pl011_dma_rx_chars() argument
878 struct tty_port *port = &uap->port.state->port; in pl011_dma_rx_chars()
880 &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_chars()
884 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_chars()
887 if (uap->dmarx.poll_rate) { in pl011_dma_rx_chars()
906 uap->port.icount.rx += dma_count; in pl011_dma_rx_chars()
908 dev_warn(uap->port.dev, in pl011_dma_rx_chars()
913 if (uap->dmarx.poll_rate) in pl011_dma_rx_chars()
923 UART011_FEIS, uap, REG_ICR); in pl011_dma_rx_chars()
936 fifotaken = pl011_fifo_to_tty(uap); in pl011_dma_rx_chars()
939 dev_vdbg(uap->port.dev, in pl011_dma_rx_chars()
945 static void pl011_dma_rx_irq(struct uart_amba_port *uap) in pl011_dma_rx_irq() argument
947 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_irq()
961 dev_err(uap->port.dev, "unable to pause DMA transfer\n"); in pl011_dma_rx_irq()
965 dev_err(uap->port.dev, "unable to pause DMA transfer\n"); in pl011_dma_rx_irq()
968 uap->dmacr &= ~UART011_RXDMAE; in pl011_dma_rx_irq()
969 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_irq()
970 uap->dmarx.running = false; in pl011_dma_rx_irq()
981 pl011_dma_rx_chars(uap, pending, dmarx->use_buf_b, true); in pl011_dma_rx_irq()
985 if (pl011_dma_rx_trigger_dma(uap)) { in pl011_dma_rx_irq()
986 dev_dbg(uap->port.dev, "could not retrigger RX DMA job " in pl011_dma_rx_irq()
988 uap->im |= UART011_RXIM; in pl011_dma_rx_irq()
989 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_irq()
995 struct uart_amba_port *uap = data; in pl011_dma_rx_callback() local
996 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_callback()
1012 spin_lock_irq(&uap->port.lock); in pl011_dma_rx_callback()
1023 uap->dmarx.running = false; in pl011_dma_rx_callback()
1025 ret = pl011_dma_rx_trigger_dma(uap); in pl011_dma_rx_callback()
1027 pl011_dma_rx_chars(uap, pending, lastbuf, false); in pl011_dma_rx_callback()
1028 spin_unlock_irq(&uap->port.lock); in pl011_dma_rx_callback()
1034 dev_dbg(uap->port.dev, "could not retrigger RX DMA job " in pl011_dma_rx_callback()
1036 uap->im |= UART011_RXIM; in pl011_dma_rx_callback()
1037 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_callback()
1046 static inline void pl011_dma_rx_stop(struct uart_amba_port *uap) in pl011_dma_rx_stop() argument
1049 uap->dmacr &= ~UART011_RXDMAE; in pl011_dma_rx_stop()
1050 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_stop()
1060 struct uart_amba_port *uap = from_timer(uap, t, dmarx.timer); in pl011_dma_rx_poll() local
1061 struct tty_port *port = &uap->port.state->port; in pl011_dma_rx_poll()
1062 struct pl011_dmarx_data *dmarx = &uap->dmarx; in pl011_dma_rx_poll()
1063 struct dma_chan *rxchan = uap->dmarx.chan; in pl011_dma_rx_poll()
1071 sgbuf = dmarx->use_buf_b ? &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a; in pl011_dma_rx_poll()
1089 > uap->dmarx.poll_timeout) { in pl011_dma_rx_poll()
1091 spin_lock_irqsave(&uap->port.lock, flags); in pl011_dma_rx_poll()
1092 pl011_dma_rx_stop(uap); in pl011_dma_rx_poll()
1093 uap->im |= UART011_RXIM; in pl011_dma_rx_poll()
1094 pl011_write(uap->im, uap, REG_IMSC); in pl011_dma_rx_poll()
1095 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_dma_rx_poll()
1097 uap->dmarx.running = false; in pl011_dma_rx_poll()
1099 del_timer(&uap->dmarx.timer); in pl011_dma_rx_poll()
1101 mod_timer(&uap->dmarx.timer, in pl011_dma_rx_poll()
1102 jiffies + msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_dma_rx_poll()
1106 static void pl011_dma_startup(struct uart_amba_port *uap) in pl011_dma_startup() argument
1110 if (!uap->dma_probed) in pl011_dma_startup()
1111 pl011_dma_probe(uap); in pl011_dma_startup()
1113 if (!uap->dmatx.chan) in pl011_dma_startup()
1116 uap->dmatx.buf = kmalloc(PL011_DMA_BUFFER_SIZE, GFP_KERNEL | __GFP_DMA); in pl011_dma_startup()
1117 if (!uap->dmatx.buf) { in pl011_dma_startup()
1118 dev_err(uap->port.dev, "no memory for DMA TX buffer\n"); in pl011_dma_startup()
1119 uap->port.fifosize = uap->fifosize; in pl011_dma_startup()
1123 sg_init_one(&uap->dmatx.sg, uap->dmatx.buf, PL011_DMA_BUFFER_SIZE); in pl011_dma_startup()
1126 uap->port.fifosize = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1127 uap->using_tx_dma = true; in pl011_dma_startup()
1129 if (!uap->dmarx.chan) in pl011_dma_startup()
1133 ret = pl011_sgbuf_init(uap->dmarx.chan, &uap->dmarx.sgbuf_a, in pl011_dma_startup()
1136 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", in pl011_dma_startup()
1141 ret = pl011_sgbuf_init(uap->dmarx.chan, &uap->dmarx.sgbuf_b, in pl011_dma_startup()
1144 dev_err(uap->port.dev, "failed to init DMA %s: %d\n", in pl011_dma_startup()
1146 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_a, in pl011_dma_startup()
1151 uap->using_rx_dma = true; in pl011_dma_startup()
1155 uap->dmacr |= UART011_DMAONERR; in pl011_dma_startup()
1156 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_startup()
1163 if (uap->vendor->dma_threshold) in pl011_dma_startup()
1165 uap, REG_ST_DMAWM); in pl011_dma_startup()
1167 if (uap->using_rx_dma) { in pl011_dma_startup()
1168 if (pl011_dma_rx_trigger_dma(uap)) in pl011_dma_startup()
1169 dev_dbg(uap->port.dev, "could not trigger initial " in pl011_dma_startup()
1171 if (uap->dmarx.poll_rate) { in pl011_dma_startup()
1172 timer_setup(&uap->dmarx.timer, pl011_dma_rx_poll, 0); in pl011_dma_startup()
1173 mod_timer(&uap->dmarx.timer, in pl011_dma_startup()
1175 msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_dma_startup()
1176 uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE; in pl011_dma_startup()
1177 uap->dmarx.last_jiffies = jiffies; in pl011_dma_startup()
1182 static void pl011_dma_shutdown(struct uart_amba_port *uap) in pl011_dma_shutdown() argument
1184 if (!(uap->using_tx_dma || uap->using_rx_dma)) in pl011_dma_shutdown()
1188 while (pl011_read(uap, REG_FR) & uap->vendor->fr_busy) in pl011_dma_shutdown()
1191 spin_lock_irq(&uap->port.lock); in pl011_dma_shutdown()
1192 uap->dmacr &= ~(UART011_DMAONERR | UART011_RXDMAE | UART011_TXDMAE); in pl011_dma_shutdown()
1193 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_shutdown()
1194 spin_unlock_irq(&uap->port.lock); in pl011_dma_shutdown()
1196 if (uap->using_tx_dma) { in pl011_dma_shutdown()
1198 dmaengine_terminate_all(uap->dmatx.chan); in pl011_dma_shutdown()
1199 if (uap->dmatx.queued) { in pl011_dma_shutdown()
1200 dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, in pl011_dma_shutdown()
1202 uap->dmatx.queued = false; in pl011_dma_shutdown()
1205 kfree(uap->dmatx.buf); in pl011_dma_shutdown()
1206 uap->using_tx_dma = false; in pl011_dma_shutdown()
1209 if (uap->using_rx_dma) { in pl011_dma_shutdown()
1210 dmaengine_terminate_all(uap->dmarx.chan); in pl011_dma_shutdown()
1212 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_a, DMA_FROM_DEVICE); in pl011_dma_shutdown()
1213 pl011_sgbuf_free(uap->dmarx.chan, &uap->dmarx.sgbuf_b, DMA_FROM_DEVICE); in pl011_dma_shutdown()
1214 if (uap->dmarx.poll_rate) in pl011_dma_shutdown()
1215 del_timer_sync(&uap->dmarx.timer); in pl011_dma_shutdown()
1216 uap->using_rx_dma = false; in pl011_dma_shutdown()
1220 static inline bool pl011_dma_rx_available(struct uart_amba_port *uap) in pl011_dma_rx_available() argument
1222 return uap->using_rx_dma; in pl011_dma_rx_available()
1225 static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) in pl011_dma_rx_running() argument
1227 return uap->using_rx_dma && uap->dmarx.running; in pl011_dma_rx_running()
1232 static inline void pl011_dma_remove(struct uart_amba_port *uap) in pl011_dma_remove() argument
1236 static inline void pl011_dma_startup(struct uart_amba_port *uap) in pl011_dma_startup() argument
1240 static inline void pl011_dma_shutdown(struct uart_amba_port *uap) in pl011_dma_shutdown() argument
1244 static inline bool pl011_dma_tx_irq(struct uart_amba_port *uap) in pl011_dma_tx_irq() argument
1249 static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) in pl011_dma_tx_stop() argument
1253 static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) in pl011_dma_tx_start() argument
1258 static inline void pl011_dma_rx_irq(struct uart_amba_port *uap) in pl011_dma_rx_irq() argument
1262 static inline void pl011_dma_rx_stop(struct uart_amba_port *uap) in pl011_dma_rx_stop() argument
1266 static inline int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap) in pl011_dma_rx_trigger_dma() argument
1271 static inline bool pl011_dma_rx_available(struct uart_amba_port *uap) in pl011_dma_rx_available() argument
1276 static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) in pl011_dma_rx_running() argument
1284 static void pl011_rs485_tx_stop(struct uart_amba_port *uap) in pl011_rs485_tx_stop() argument
1290 const int MAX_TX_DRAIN_ITERS = uap->port.fifosize * 2; in pl011_rs485_tx_stop()
1291 struct uart_port *port = &uap->port; in pl011_rs485_tx_stop()
1303 udelay(uap->rs485_tx_drain_interval); in pl011_rs485_tx_stop()
1310 cr = pl011_read(uap, REG_CR); in pl011_rs485_tx_stop()
1320 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_stop()
1322 uap->rs485_tx_started = false; in pl011_rs485_tx_stop()
1327 struct uart_amba_port *uap = in pl011_stop_tx() local
1330 uap->im &= ~UART011_TXIM; in pl011_stop_tx()
1331 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_tx()
1332 pl011_dma_tx_stop(uap); in pl011_stop_tx()
1334 if ((port->rs485.flags & SER_RS485_ENABLED) && uap->rs485_tx_started) in pl011_stop_tx()
1335 pl011_rs485_tx_stop(uap); in pl011_stop_tx()
1338 static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq);
1341 static void pl011_start_tx_pio(struct uart_amba_port *uap) in pl011_start_tx_pio() argument
1343 if (pl011_tx_chars(uap, false)) { in pl011_start_tx_pio()
1344 uap->im |= UART011_TXIM; in pl011_start_tx_pio()
1345 pl011_write(uap->im, uap, REG_IMSC); in pl011_start_tx_pio()
1351 struct uart_amba_port *uap = in pl011_start_tx() local
1354 if (!pl011_dma_tx_start(uap)) in pl011_start_tx()
1355 pl011_start_tx_pio(uap); in pl011_start_tx()
1360 struct uart_amba_port *uap = in pl011_stop_rx() local
1363 uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM| in pl011_stop_rx()
1365 pl011_write(uap->im, uap, REG_IMSC); in pl011_stop_rx()
1367 pl011_dma_rx_stop(uap); in pl011_stop_rx()
1381 struct uart_amba_port *uap = in pl011_enable_ms() local
1384 uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM; in pl011_enable_ms()
1385 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_ms()
1388 static void pl011_rx_chars(struct uart_amba_port *uap) in pl011_rx_chars() argument
1389 __releases(&uap->port.lock) in pl011_rx_chars()
1390 __acquires(&uap->port.lock) in pl011_rx_chars()
1392 pl011_fifo_to_tty(uap); in pl011_rx_chars()
1394 spin_unlock(&uap->port.lock); in pl011_rx_chars()
1395 tty_flip_buffer_push(&uap->port.state->port); in pl011_rx_chars()
1400 if (pl011_dma_rx_available(uap)) { in pl011_rx_chars()
1401 if (pl011_dma_rx_trigger_dma(uap)) { in pl011_rx_chars()
1402 dev_dbg(uap->port.dev, "could not trigger RX DMA job " in pl011_rx_chars()
1404 uap->im |= UART011_RXIM; in pl011_rx_chars()
1405 pl011_write(uap->im, uap, REG_IMSC); in pl011_rx_chars()
1409 if (uap->dmarx.poll_rate) { in pl011_rx_chars()
1410 uap->dmarx.last_jiffies = jiffies; in pl011_rx_chars()
1411 uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE; in pl011_rx_chars()
1412 mod_timer(&uap->dmarx.timer, in pl011_rx_chars()
1414 msecs_to_jiffies(uap->dmarx.poll_rate)); in pl011_rx_chars()
1419 spin_lock(&uap->port.lock); in pl011_rx_chars()
1422 static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c, in pl011_tx_char() argument
1426 pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_tx_char()
1429 pl011_write(c, uap, REG_DR); in pl011_tx_char()
1430 uap->port.icount.tx++; in pl011_tx_char()
1435 static void pl011_rs485_tx_start(struct uart_amba_port *uap) in pl011_rs485_tx_start() argument
1437 struct uart_port *port = &uap->port; in pl011_rs485_tx_start()
1441 cr = pl011_read(uap, REG_CR); in pl011_rs485_tx_start()
1453 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_start()
1458 uap->rs485_tx_started = true; in pl011_rs485_tx_start()
1462 static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq) in pl011_tx_chars() argument
1464 struct circ_buf *xmit = &uap->port.state->xmit; in pl011_tx_chars()
1465 int count = uap->fifosize >> 1; in pl011_tx_chars()
1467 if (uap->port.x_char) { in pl011_tx_chars()
1468 if (!pl011_tx_char(uap, uap->port.x_char, from_irq)) in pl011_tx_chars()
1470 uap->port.x_char = 0; in pl011_tx_chars()
1473 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) { in pl011_tx_chars()
1474 pl011_stop_tx(&uap->port); in pl011_tx_chars()
1478 if ((uap->port.rs485.flags & SER_RS485_ENABLED) && in pl011_tx_chars()
1479 !uap->rs485_tx_started) in pl011_tx_chars()
1480 pl011_rs485_tx_start(uap); in pl011_tx_chars()
1483 if (pl011_dma_tx_irq(uap)) in pl011_tx_chars()
1490 if (!pl011_tx_char(uap, xmit->buf[xmit->tail], from_irq)) in pl011_tx_chars()
1497 uart_write_wakeup(&uap->port); in pl011_tx_chars()
1500 pl011_stop_tx(&uap->port); in pl011_tx_chars()
1506 static void pl011_modem_status(struct uart_amba_port *uap) in pl011_modem_status() argument
1510 status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY; in pl011_modem_status()
1512 delta = status ^ uap->old_status; in pl011_modem_status()
1513 uap->old_status = status; in pl011_modem_status()
1519 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD); in pl011_modem_status()
1521 if (delta & uap->vendor->fr_dsr) in pl011_modem_status()
1522 uap->port.icount.dsr++; in pl011_modem_status()
1524 if (delta & uap->vendor->fr_cts) in pl011_modem_status()
1525 uart_handle_cts_change(&uap->port, in pl011_modem_status()
1526 status & uap->vendor->fr_cts); in pl011_modem_status()
1528 wake_up_interruptible(&uap->port.state->port.delta_msr_wait); in pl011_modem_status()
1531 static void check_apply_cts_event_workaround(struct uart_amba_port *uap) in check_apply_cts_event_workaround() argument
1533 if (!uap->vendor->cts_event_workaround) in check_apply_cts_event_workaround()
1537 pl011_write(0x00, uap, REG_ICR); in check_apply_cts_event_workaround()
1544 pl011_read(uap, REG_ICR); in check_apply_cts_event_workaround()
1545 pl011_read(uap, REG_ICR); in check_apply_cts_event_workaround()
1550 struct uart_amba_port *uap = dev_id; in pl011_int() local
1555 spin_lock_irqsave(&uap->port.lock, flags); in pl011_int()
1556 status = pl011_read(uap, REG_RIS) & uap->im; in pl011_int()
1559 check_apply_cts_event_workaround(uap); in pl011_int()
1563 uap, REG_ICR); in pl011_int()
1566 if (pl011_dma_rx_running(uap)) in pl011_int()
1567 pl011_dma_rx_irq(uap); in pl011_int()
1569 pl011_rx_chars(uap); in pl011_int()
1573 pl011_modem_status(uap); in pl011_int()
1575 pl011_tx_chars(uap, true); in pl011_int()
1580 status = pl011_read(uap, REG_RIS) & uap->im; in pl011_int()
1585 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_int()
1592 struct uart_amba_port *uap = in pl011_tx_empty() local
1596 unsigned int status = pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr; in pl011_tx_empty()
1598 return status & (uap->vendor->fr_busy | UART01x_FR_TXFF) ? in pl011_tx_empty()
1604 struct uart_amba_port *uap = in pl011_get_mctrl() local
1607 unsigned int status = pl011_read(uap, REG_FR); in pl011_get_mctrl()
1614 TIOCMBIT(uap->vendor->fr_dsr, TIOCM_DSR); in pl011_get_mctrl()
1615 TIOCMBIT(uap->vendor->fr_cts, TIOCM_CTS); in pl011_get_mctrl()
1616 TIOCMBIT(uap->vendor->fr_ri, TIOCM_RNG); in pl011_get_mctrl()
1623 struct uart_amba_port *uap = in pl011_set_mctrl() local
1627 cr = pl011_read(uap, REG_CR); in pl011_set_mctrl()
1647 pl011_write(cr, uap, REG_CR); in pl011_set_mctrl()
1652 struct uart_amba_port *uap = in pl011_break_ctl() local
1657 spin_lock_irqsave(&uap->port.lock, flags); in pl011_break_ctl()
1658 lcr_h = pl011_read(uap, REG_LCRH_TX); in pl011_break_ctl()
1663 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_break_ctl()
1664 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_break_ctl()
1671 struct uart_amba_port *uap = in pl011_quiesce_irqs() local
1674 pl011_write(pl011_read(uap, REG_MIS), uap, REG_ICR); in pl011_quiesce_irqs()
1688 pl011_write(pl011_read(uap, REG_IMSC) & ~UART011_TXIM, uap, in pl011_quiesce_irqs()
1694 struct uart_amba_port *uap = in pl011_get_poll_char() local
1704 status = pl011_read(uap, REG_FR); in pl011_get_poll_char()
1708 return pl011_read(uap, REG_DR); in pl011_get_poll_char()
1714 struct uart_amba_port *uap = in pl011_put_poll_char() local
1717 while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_put_poll_char()
1720 pl011_write(ch, uap, REG_DR); in pl011_put_poll_char()
1727 struct uart_amba_port *uap = in pl011_hwinit() local
1737 retval = clk_prepare_enable(uap->clk); in pl011_hwinit()
1741 uap->port.uartclk = clk_get_rate(uap->clk); in pl011_hwinit()
1746 uap, REG_ICR); in pl011_hwinit()
1752 uap->im = pl011_read(uap, REG_IMSC); in pl011_hwinit()
1753 pl011_write(UART011_RTIM | UART011_RXIM, uap, REG_IMSC); in pl011_hwinit()
1755 if (dev_get_platdata(uap->port.dev)) { in pl011_hwinit()
1758 plat = dev_get_platdata(uap->port.dev); in pl011_hwinit()
1765 static bool pl011_split_lcrh(const struct uart_amba_port *uap) in pl011_split_lcrh() argument
1767 return pl011_reg_to_offset(uap, REG_LCRH_RX) != in pl011_split_lcrh()
1768 pl011_reg_to_offset(uap, REG_LCRH_TX); in pl011_split_lcrh()
1771 static void pl011_write_lcr_h(struct uart_amba_port *uap, unsigned int lcr_h) in pl011_write_lcr_h() argument
1773 pl011_write(lcr_h, uap, REG_LCRH_RX); in pl011_write_lcr_h()
1774 if (pl011_split_lcrh(uap)) { in pl011_write_lcr_h()
1781 pl011_write(0xff, uap, REG_MIS); in pl011_write_lcr_h()
1782 pl011_write(lcr_h, uap, REG_LCRH_TX); in pl011_write_lcr_h()
1786 static int pl011_allocate_irq(struct uart_amba_port *uap) in pl011_allocate_irq() argument
1788 pl011_write(uap->im, uap, REG_IMSC); in pl011_allocate_irq()
1790 return request_irq(uap->port.irq, pl011_int, IRQF_SHARED, "uart-pl011", uap); in pl011_allocate_irq()
1798 static void pl011_enable_interrupts(struct uart_amba_port *uap) in pl011_enable_interrupts() argument
1803 spin_lock_irqsave(&uap->port.lock, flags); in pl011_enable_interrupts()
1806 pl011_write(UART011_RTIS | UART011_RXIS, uap, REG_ICR); in pl011_enable_interrupts()
1814 for (i = 0; i < uap->fifosize * 2; ++i) { in pl011_enable_interrupts()
1815 if (pl011_read(uap, REG_FR) & UART01x_FR_RXFE) in pl011_enable_interrupts()
1818 pl011_read(uap, REG_DR); in pl011_enable_interrupts()
1821 uap->im = UART011_RTIM; in pl011_enable_interrupts()
1822 if (!pl011_dma_rx_running(uap)) in pl011_enable_interrupts()
1823 uap->im |= UART011_RXIM; in pl011_enable_interrupts()
1824 pl011_write(uap->im, uap, REG_IMSC); in pl011_enable_interrupts()
1825 spin_unlock_irqrestore(&uap->port.lock, flags); in pl011_enable_interrupts()
1830 struct uart_amba_port *uap = container_of(port, struct uart_amba_port, port); in pl011_unthrottle_rx() local
1832 pl011_enable_interrupts(uap); in pl011_unthrottle_rx()
1837 struct uart_amba_port *uap = in pl011_startup() local
1846 retval = pl011_allocate_irq(uap); in pl011_startup()
1850 pl011_write(uap->vendor->ifls, uap, REG_IFLS); in pl011_startup()
1852 spin_lock_irq(&uap->port.lock); in pl011_startup()
1854 cr = pl011_read(uap, REG_CR); in pl011_startup()
1861 pl011_write(cr, uap, REG_CR); in pl011_startup()
1863 spin_unlock_irq(&uap->port.lock); in pl011_startup()
1868 uap->old_status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY; in pl011_startup()
1871 pl011_dma_startup(uap); in pl011_startup()
1873 pl011_enable_interrupts(uap); in pl011_startup()
1878 clk_disable_unprepare(uap->clk); in pl011_startup()
1884 struct uart_amba_port *uap = in sbsa_uart_startup() local
1892 retval = pl011_allocate_irq(uap); in sbsa_uart_startup()
1897 uap->old_status = 0; in sbsa_uart_startup()
1899 pl011_enable_interrupts(uap); in sbsa_uart_startup()
1904 static void pl011_shutdown_channel(struct uart_amba_port *uap, in pl011_shutdown_channel() argument
1909 val = pl011_read(uap, lcrh); in pl011_shutdown_channel()
1911 pl011_write(val, uap, lcrh); in pl011_shutdown_channel()
1919 static void pl011_disable_uart(struct uart_amba_port *uap) in pl011_disable_uart() argument
1923 uap->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS); in pl011_disable_uart()
1924 spin_lock_irq(&uap->port.lock); in pl011_disable_uart()
1925 cr = pl011_read(uap, REG_CR); in pl011_disable_uart()
1928 pl011_write(cr, uap, REG_CR); in pl011_disable_uart()
1929 spin_unlock_irq(&uap->port.lock); in pl011_disable_uart()
1934 pl011_shutdown_channel(uap, REG_LCRH_RX); in pl011_disable_uart()
1935 if (pl011_split_lcrh(uap)) in pl011_disable_uart()
1936 pl011_shutdown_channel(uap, REG_LCRH_TX); in pl011_disable_uart()
1939 static void pl011_disable_interrupts(struct uart_amba_port *uap) in pl011_disable_interrupts() argument
1941 spin_lock_irq(&uap->port.lock); in pl011_disable_interrupts()
1944 uap->im = 0; in pl011_disable_interrupts()
1945 pl011_write(uap->im, uap, REG_IMSC); in pl011_disable_interrupts()
1946 pl011_write(0xffff, uap, REG_ICR); in pl011_disable_interrupts()
1948 spin_unlock_irq(&uap->port.lock); in pl011_disable_interrupts()
1953 struct uart_amba_port *uap = in pl011_shutdown() local
1956 pl011_disable_interrupts(uap); in pl011_shutdown()
1958 pl011_dma_shutdown(uap); in pl011_shutdown()
1960 if ((port->rs485.flags & SER_RS485_ENABLED) && uap->rs485_tx_started) in pl011_shutdown()
1961 pl011_rs485_tx_stop(uap); in pl011_shutdown()
1963 free_irq(uap->port.irq, uap); in pl011_shutdown()
1965 pl011_disable_uart(uap); in pl011_shutdown()
1970 clk_disable_unprepare(uap->clk); in pl011_shutdown()
1974 if (dev_get_platdata(uap->port.dev)) { in pl011_shutdown()
1977 plat = dev_get_platdata(uap->port.dev); in pl011_shutdown()
1982 if (uap->port.ops->flush_buffer) in pl011_shutdown()
1983 uap->port.ops->flush_buffer(port); in pl011_shutdown()
1988 struct uart_amba_port *uap = in sbsa_uart_shutdown() local
1991 pl011_disable_interrupts(uap); in sbsa_uart_shutdown()
1993 free_irq(uap->port.irq, uap); in sbsa_uart_shutdown()
1995 if (uap->port.ops->flush_buffer) in sbsa_uart_shutdown()
1996 uap->port.ops->flush_buffer(port); in sbsa_uart_shutdown()
2035 struct uart_amba_port *uap = in pl011_set_termios() local
2042 if (uap->vendor->oversampling) in pl011_set_termios()
2056 if (uap->dmarx.auto_poll_rate) in pl011_set_termios()
2057 uap->dmarx.poll_rate = DIV_ROUND_UP(10000000, baud); in pl011_set_termios()
2088 if (uap->fifosize > 1) in pl011_set_termios()
2105 uap->rs485_tx_drain_interval = DIV_ROUND_UP(bits * 1000 * 1000, baud); in pl011_set_termios()
2115 old_cr = pl011_read(uap, REG_CR); in pl011_set_termios()
2128 if (uap->vendor->oversampling) { in pl011_set_termios()
2141 if (uap->vendor->oversampling) { in pl011_set_termios()
2148 pl011_write(quot & 0x3f, uap, REG_FBRD); in pl011_set_termios()
2149 pl011_write(quot >> 6, uap, REG_IBRD); in pl011_set_termios()
2157 pl011_write_lcr_h(uap, lcr_h); in pl011_set_termios()
2158 pl011_write(old_cr, uap, REG_CR); in pl011_set_termios()
2167 struct uart_amba_port *uap = in sbsa_uart_set_termios() local
2171 tty_termios_encode_baud_rate(termios, uap->fixed_baud, uap->fixed_baud); in sbsa_uart_set_termios()
2179 uart_update_timeout(port, CS8, uap->fixed_baud); in sbsa_uart_set_termios()
2186 struct uart_amba_port *uap = in pl011_type() local
2188 return uap->port.type == PORT_AMBA ? uap->type : NULL; in pl011_type()
2220 struct uart_amba_port *uap = in pl011_rs485_config() local
2224 pl011_rs485_tx_stop(uap); in pl011_rs485_config()
2228 u32 cr = pl011_read(uap, REG_CR); in pl011_rs485_config()
2231 pl011_write(cr, uap, REG_CR); in pl011_rs485_config()
2298 struct uart_amba_port *uap = in pl011_console_putchar() local
2301 while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) in pl011_console_putchar()
2303 pl011_write(ch, uap, REG_DR); in pl011_console_putchar()
2309 struct uart_amba_port *uap = amba_ports[co->index]; in pl011_console_write() local
2314 clk_enable(uap->clk); in pl011_console_write()
2317 if (uap->port.sysrq) in pl011_console_write()
2320 locked = spin_trylock(&uap->port.lock); in pl011_console_write()
2322 spin_lock(&uap->port.lock); in pl011_console_write()
2327 if (!uap->vendor->always_enabled) { in pl011_console_write()
2328 old_cr = pl011_read(uap, REG_CR); in pl011_console_write()
2331 pl011_write(new_cr, uap, REG_CR); in pl011_console_write()
2334 uart_console_write(&uap->port, s, count, pl011_console_putchar); in pl011_console_write()
2341 while ((pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr) in pl011_console_write()
2342 & uap->vendor->fr_busy) in pl011_console_write()
2344 if (!uap->vendor->always_enabled) in pl011_console_write()
2345 pl011_write(old_cr, uap, REG_CR); in pl011_console_write()
2348 spin_unlock(&uap->port.lock); in pl011_console_write()
2351 clk_disable(uap->clk); in pl011_console_write()
2354 static void pl011_console_get_options(struct uart_amba_port *uap, int *baud, in pl011_console_get_options() argument
2357 if (pl011_read(uap, REG_CR) & UART01x_CR_UARTEN) { in pl011_console_get_options()
2360 lcr_h = pl011_read(uap, REG_LCRH_TX); in pl011_console_get_options()
2375 ibrd = pl011_read(uap, REG_IBRD); in pl011_console_get_options()
2376 fbrd = pl011_read(uap, REG_FBRD); in pl011_console_get_options()
2378 *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd); in pl011_console_get_options()
2380 if (uap->vendor->oversampling) { in pl011_console_get_options()
2381 if (pl011_read(uap, REG_CR) in pl011_console_get_options()
2390 struct uart_amba_port *uap; in pl011_console_setup() local
2404 uap = amba_ports[co->index]; in pl011_console_setup()
2405 if (!uap) in pl011_console_setup()
2409 pinctrl_pm_select_default_state(uap->port.dev); in pl011_console_setup()
2411 ret = clk_prepare(uap->clk); in pl011_console_setup()
2415 if (dev_get_platdata(uap->port.dev)) { in pl011_console_setup()
2418 plat = dev_get_platdata(uap->port.dev); in pl011_console_setup()
2423 uap->port.uartclk = clk_get_rate(uap->clk); in pl011_console_setup()
2425 if (uap->vendor->fixed_options) { in pl011_console_setup()
2426 baud = uap->fixed_baud; in pl011_console_setup()
2432 pl011_console_get_options(uap, &baud, &parity, &bits); in pl011_console_setup()
2435 return uart_set_options(&uap->port, co, baud, parity, bits, flow); in pl011_console_setup()
2673 static void pl011_unregister_port(struct uart_amba_port *uap) in pl011_unregister_port() argument
2679 if (amba_ports[i] == uap) in pl011_unregister_port()
2684 pl011_dma_remove(uap); in pl011_unregister_port()
2700 static int pl011_get_rs485_mode(struct uart_amba_port *uap) in pl011_get_rs485_mode() argument
2702 struct uart_port *port = &uap->port; in pl011_get_rs485_mode()
2712 static int pl011_setup_port(struct device *dev, struct uart_amba_port *uap, in pl011_setup_port() argument
2724 uap->port.dev = dev; in pl011_setup_port()
2725 uap->port.mapbase = mmiobase->start; in pl011_setup_port()
2726 uap->port.membase = base; in pl011_setup_port()
2727 uap->port.fifosize = uap->fifosize; in pl011_setup_port()
2728 uap->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_AMBA_PL011_CONSOLE); in pl011_setup_port()
2729 uap->port.flags = UPF_BOOT_AUTOCONF; in pl011_setup_port()
2730 uap->port.line = index; in pl011_setup_port()
2732 ret = pl011_get_rs485_mode(uap); in pl011_setup_port()
2736 amba_ports[index] = uap; in pl011_setup_port()
2741 static int pl011_register_port(struct uart_amba_port *uap) in pl011_register_port() argument
2746 pl011_write(0, uap, REG_IMSC); in pl011_register_port()
2747 pl011_write(0xffff, uap, REG_ICR); in pl011_register_port()
2752 dev_err(uap->port.dev, in pl011_register_port()
2755 if (amba_ports[i] == uap) in pl011_register_port()
2761 ret = uart_add_one_port(&amba_reg, &uap->port); in pl011_register_port()
2763 pl011_unregister_port(uap); in pl011_register_port()
2777 struct uart_amba_port *uap; in pl011_probe() local
2786 uap = devm_kzalloc(&dev->dev, sizeof(struct uart_amba_port), in pl011_probe()
2788 if (!uap) in pl011_probe()
2791 uap->clk = devm_clk_get(&dev->dev, NULL); in pl011_probe()
2792 if (IS_ERR(uap->clk)) in pl011_probe()
2793 return PTR_ERR(uap->clk); in pl011_probe()
2795 uap->reg_offset = vendor->reg_offset; in pl011_probe()
2796 uap->vendor = vendor; in pl011_probe()
2797 uap->fifosize = vendor->get_fifosize(dev); in pl011_probe()
2798 uap->port.iotype = vendor->access_32b ? UPIO_MEM32 : UPIO_MEM; in pl011_probe()
2799 uap->port.irq = dev->irq[0]; in pl011_probe()
2800 uap->port.ops = &amba_pl011_pops; in pl011_probe()
2801 uap->port.rs485_config = pl011_rs485_config; in pl011_probe()
2802 uap->port.rs485_supported = pl011_rs485_supported; in pl011_probe()
2803 snprintf(uap->type, sizeof(uap->type), "PL011 rev%u", amba_rev(dev)); in pl011_probe()
2808 uap->port.iotype = UPIO_MEM; in pl011_probe()
2811 uap->port.iotype = UPIO_MEM32; in pl011_probe()
2820 ret = pl011_setup_port(&dev->dev, uap, &dev->res, portnr); in pl011_probe()
2824 amba_set_drvdata(dev, uap); in pl011_probe()
2826 return pl011_register_port(uap); in pl011_probe()
2831 struct uart_amba_port *uap = amba_get_drvdata(dev); in pl011_remove() local
2833 uart_remove_one_port(&amba_reg, &uap->port); in pl011_remove()
2834 pl011_unregister_port(uap); in pl011_remove()
2840 struct uart_amba_port *uap = dev_get_drvdata(dev); in pl011_suspend() local
2842 if (!uap) in pl011_suspend()
2845 return uart_suspend_port(&amba_reg, &uap->port); in pl011_suspend()
2850 struct uart_amba_port *uap = dev_get_drvdata(dev); in pl011_resume() local
2852 if (!uap) in pl011_resume()
2855 return uart_resume_port(&amba_reg, &uap->port); in pl011_resume()
2863 struct uart_amba_port *uap; in sbsa_uart_probe() local
2886 uap = devm_kzalloc(&pdev->dev, sizeof(struct uart_amba_port), in sbsa_uart_probe()
2888 if (!uap) in sbsa_uart_probe()
2894 uap->port.irq = ret; in sbsa_uart_probe()
2899 uap->vendor = &vendor_qdt_qdf2400_e44; in sbsa_uart_probe()
2902 uap->vendor = &vendor_sbsa; in sbsa_uart_probe()
2904 uap->reg_offset = uap->vendor->reg_offset; in sbsa_uart_probe()
2905 uap->fifosize = 32; in sbsa_uart_probe()
2906 uap->port.iotype = uap->vendor->access_32b ? UPIO_MEM32 : UPIO_MEM; in sbsa_uart_probe()
2907 uap->port.ops = &sbsa_uart_pops; in sbsa_uart_probe()
2908 uap->fixed_baud = baudrate; in sbsa_uart_probe()
2910 snprintf(uap->type, sizeof(uap->type), "SBSA"); in sbsa_uart_probe()
2914 ret = pl011_setup_port(&pdev->dev, uap, r, portnr); in sbsa_uart_probe()
2918 platform_set_drvdata(pdev, uap); in sbsa_uart_probe()
2920 return pl011_register_port(uap); in sbsa_uart_probe()
2925 struct uart_amba_port *uap = platform_get_drvdata(pdev); in sbsa_uart_remove() local
2927 uart_remove_one_port(&amba_reg, &uap->port); in sbsa_uart_remove()
2928 pl011_unregister_port(uap); in sbsa_uart_remove()