258 	unsigned int		im;		/* interrupt mask */  member
710 		uap->im &= ~UART011_TXIM;  in pl011_dma_tx_irq()
711 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_tx_irq()
720 		uap->im &= ~UART011_TXIM;  in pl011_dma_tx_irq()
721 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_tx_irq()
760 				uap->im &= ~UART011_TXIM;  in pl011_dma_tx_start()
761 				pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_tx_start()
863 	uap->im &= ~UART011_RXIM;  in pl011_dma_rx_trigger_dma()
864 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_rx_trigger_dma()
988 		uap->im |= UART011_RXIM;  in pl011_dma_rx_irq()
989 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_rx_irq()
1036 		uap->im |= UART011_RXIM;  in pl011_dma_rx_callback()
1037 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_rx_callback()
1093 		uap->im |= UART011_RXIM;  in pl011_dma_rx_poll()
1094 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_dma_rx_poll()
1330 	uap->im &= ~UART011_TXIM;  in pl011_stop_tx()
1331 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_stop_tx()
1344 		uap->im |= UART011_TXIM;  in pl011_start_tx_pio()
1345 		pl011_write(uap->im, uap, REG_IMSC);  in pl011_start_tx_pio()
1363 	uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM|  in pl011_stop_rx()
1365 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_stop_rx()
1384 	uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM;  in pl011_enable_ms()
1385 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_enable_ms()
1404 			uap->im |= UART011_RXIM;  in pl011_rx_chars()
1405 			pl011_write(uap->im, uap, REG_IMSC);  in pl011_rx_chars()
1556 	status = pl011_read(uap, REG_RIS) & uap->im;  in pl011_int()
1580 			status = pl011_read(uap, REG_RIS) & uap->im;  in pl011_int()
1752 	uap->im = pl011_read(uap, REG_IMSC);  in pl011_hwinit()
1788 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_allocate_irq()
1821 	uap->im = UART011_RTIM;  in pl011_enable_interrupts()
1823 		uap->im |= UART011_RXIM;  in pl011_enable_interrupts()
1824 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_enable_interrupts()
1944 	uap->im = 0;  in pl011_disable_interrupts()
1945 	pl011_write(uap->im, uap, REG_IMSC);  in pl011_disable_interrupts()