Lines Matching refs:REG_DMACR
71 REG_DMACR, enumerator
99 [REG_DMACR] = UART011_DMACR,
187 [REG_DMACR] = UART011_DMACR,
559 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_callback()
673 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_refill()
709 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_irq()
735 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_stop()
766 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
777 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
794 pl011_write(dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
820 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_flush_buffer()
860 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_trigger_dma()
969 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_irq()
1050 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_stop()
1156 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_startup()
1193 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_shutdown()