52 	struct uart_port	port;  member
59 static void pl010_stop_tx(struct uart_port *port)  in pl010_stop_tx()  argument
62 		container_of(port, struct uart_amba_port, port);  in pl010_stop_tx()
65 	cr = readb(uap->port.membase + UART010_CR);  in pl010_stop_tx()
67 	writel(cr, uap->port.membase + UART010_CR);  in pl010_stop_tx()
70 static void pl010_start_tx(struct uart_port *port)  in pl010_start_tx()  argument
73 		container_of(port, struct uart_amba_port, port);  in pl010_start_tx()
76 	cr = readb(uap->port.membase + UART010_CR);  in pl010_start_tx()
78 	writel(cr, uap->port.membase + UART010_CR);  in pl010_start_tx()
81 static void pl010_stop_rx(struct uart_port *port)  in pl010_stop_rx()  argument
84 		container_of(port, struct uart_amba_port, port);  in pl010_stop_rx()
87 	cr = readb(uap->port.membase + UART010_CR);  in pl010_stop_rx()
89 	writel(cr, uap->port.membase + UART010_CR);  in pl010_stop_rx()
92 static void pl010_disable_ms(struct uart_port *port)  in pl010_disable_ms()  argument
94 	struct uart_amba_port *uap = (struct uart_amba_port *)port;  in pl010_disable_ms()
97 	cr = readb(uap->port.membase + UART010_CR);  in pl010_disable_ms()
99 	writel(cr, uap->port.membase + UART010_CR);  in pl010_disable_ms()
102 static void pl010_enable_ms(struct uart_port *port)  in pl010_enable_ms()  argument
105 		container_of(port, struct uart_amba_port, port);  in pl010_enable_ms()
108 	cr = readb(uap->port.membase + UART010_CR);  in pl010_enable_ms()
110 	writel(cr, uap->port.membase + UART010_CR);  in pl010_enable_ms()
113 static void pl010_rx_chars(struct uart_port *port)  in pl010_rx_chars()  argument
117 	status = readb(port->membase + UART01x_FR);  in pl010_rx_chars()
119 		ch = readb(port->membase + UART01x_DR);  in pl010_rx_chars()
122 		port->icount.rx++;  in pl010_rx_chars()
128 		rsr = readb(port->membase + UART01x_RSR) | UART_DUMMY_RSR_RX;  in pl010_rx_chars()
130 			writel(0, port->membase + UART01x_ECR);  in pl010_rx_chars()
134 				port->icount.brk++;  in pl010_rx_chars()
135 				if (uart_handle_break(port))  in pl010_rx_chars()
138 				port->icount.parity++;  in pl010_rx_chars()
140 				port->icount.frame++;  in pl010_rx_chars()
142 				port->icount.overrun++;  in pl010_rx_chars()
144 			rsr &= port->read_status_mask;  in pl010_rx_chars()
154 		if (uart_handle_sysrq_char(port, ch))  in pl010_rx_chars()
157 		uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag);  in pl010_rx_chars()
160 		status = readb(port->membase + UART01x_FR);  in pl010_rx_chars()
162 	tty_flip_buffer_push(&port->state->port);  in pl010_rx_chars()
165 static void pl010_tx_chars(struct uart_port *port)  in pl010_tx_chars()  argument
167 	struct circ_buf *xmit = &port->state->xmit;  in pl010_tx_chars()
170 	if (port->x_char) {  in pl010_tx_chars()
171 		writel(port->x_char, port->membase + UART01x_DR);  in pl010_tx_chars()
172 		port->icount.tx++;  in pl010_tx_chars()
173 		port->x_char = 0;  in pl010_tx_chars()
176 	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {  in pl010_tx_chars()
177 		pl010_stop_tx(port);  in pl010_tx_chars()
181 	count = port->fifosize >> 1;  in pl010_tx_chars()
183 		writel(xmit->buf[xmit->tail], port->membase + UART01x_DR);  in pl010_tx_chars()
185 		port->icount.tx++;  in pl010_tx_chars()
191 		uart_write_wakeup(port);  in pl010_tx_chars()
194 		pl010_stop_tx(port);  in pl010_tx_chars()
199 	struct uart_port *port = &uap->port;  in pl010_modem_status()  local
202 	writel(0, port->membase + UART010_ICR);  in pl010_modem_status()
204 	status = readb(port->membase + UART01x_FR) & UART01x_FR_MODEM_ANY;  in pl010_modem_status()
213 		uart_handle_dcd_change(port, status & UART01x_FR_DCD);  in pl010_modem_status()
216 		port->icount.dsr++;  in pl010_modem_status()
219 		uart_handle_cts_change(port, status & UART01x_FR_CTS);  in pl010_modem_status()
221 	wake_up_interruptible(&port->state->port.delta_msr_wait);  in pl010_modem_status()
227 	struct uart_port *port = &uap->port;  in pl010_int()  local
231 	spin_lock(&port->lock);  in pl010_int()
233 	status = readb(port->membase + UART010_IIR);  in pl010_int()
237 				pl010_rx_chars(port);  in pl010_int()
241 				pl010_tx_chars(port);  in pl010_int()
246 			status = readb(port->membase + UART010_IIR);  in pl010_int()
252 	spin_unlock(&port->lock);  in pl010_int()
257 static unsigned int pl010_tx_empty(struct uart_port *port)  in pl010_tx_empty()  argument
259 	unsigned int status = readb(port->membase + UART01x_FR);  in pl010_tx_empty()
264 static unsigned int pl010_get_mctrl(struct uart_port *port)  in pl010_get_mctrl()  argument
269 	status = readb(port->membase + UART01x_FR);  in pl010_get_mctrl()
280 static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)  in pl010_set_mctrl()  argument
283 		container_of(port, struct uart_amba_port, port);  in pl010_set_mctrl()
286 		uap->data->set_mctrl(uap->dev, port->membase, mctrl);  in pl010_set_mctrl()
289 static void pl010_break_ctl(struct uart_port *port, int break_state)  in pl010_break_ctl()  argument
294 	spin_lock_irqsave(&port->lock, flags);  in pl010_break_ctl()
295 	lcr_h = readb(port->membase + UART010_LCRH);  in pl010_break_ctl()
300 	writel(lcr_h, port->membase + UART010_LCRH);  in pl010_break_ctl()
301 	spin_unlock_irqrestore(&port->lock, flags);  in pl010_break_ctl()
304 static int pl010_startup(struct uart_port *port)  in pl010_startup()  argument
307 		container_of(port, struct uart_amba_port, port);  in pl010_startup()
317 	port->uartclk = clk_get_rate(uap->clk);  in pl010_startup()
322 	retval = request_irq(port->irq, pl010_int, 0, "uart-pl010", uap);  in pl010_startup()
329 	uap->old_status = readb(port->membase + UART01x_FR) & UART01x_FR_MODEM_ANY;  in pl010_startup()
335 	       port->membase + UART010_CR);  in pl010_startup()
345 static void pl010_shutdown(struct uart_port *port)  in pl010_shutdown()  argument
348 		container_of(port, struct uart_amba_port, port);  in pl010_shutdown()
353 	free_irq(port->irq, uap);  in pl010_shutdown()
358 	writel(0, port->membase + UART010_CR);  in pl010_shutdown()
361 	writel(readb(port->membase + UART010_LCRH) &  in pl010_shutdown()
363 	       port->membase + UART010_LCRH);  in pl010_shutdown()
372 pl010_set_termios(struct uart_port *port, struct ktermios *termios,  in pl010_set_termios()  argument
382 	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);  in pl010_set_termios()
383 	quot = uart_get_divisor(port, baud);  in pl010_set_termios()
406 	if (port->fifosize > 1)  in pl010_set_termios()
409 	spin_lock_irqsave(&port->lock, flags);  in pl010_set_termios()
414 	uart_update_timeout(port, termios->c_cflag, baud);  in pl010_set_termios()
416 	port->read_status_mask = UART01x_RSR_OE;  in pl010_set_termios()
418 		port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;  in pl010_set_termios()
420 		port->read_status_mask |= UART01x_RSR_BE;  in pl010_set_termios()
425 	port->ignore_status_mask = 0;  in pl010_set_termios()
427 		port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;  in pl010_set_termios()
429 		port->ignore_status_mask |= UART01x_RSR_BE;  in pl010_set_termios()
435 			port->ignore_status_mask |= UART01x_RSR_OE;  in pl010_set_termios()
442 		port->ignore_status_mask |= UART_DUMMY_RSR_RX;  in pl010_set_termios()
444 	old_cr = readb(port->membase + UART010_CR) & ~UART010_CR_MSIE;  in pl010_set_termios()
446 	if (UART_ENABLE_MS(port, termios->c_cflag))  in pl010_set_termios()
451 	writel((quot & 0xf00) >> 8, port->membase + UART010_LCRM);  in pl010_set_termios()
452 	writel(quot & 0xff, port->membase + UART010_LCRL);  in pl010_set_termios()
459 	writel(lcr_h, port->membase + UART010_LCRH);  in pl010_set_termios()
460 	writel(old_cr, port->membase + UART010_CR);  in pl010_set_termios()
462 	spin_unlock_irqrestore(&port->lock, flags);  in pl010_set_termios()
465 static void pl010_set_ldisc(struct uart_port *port, struct ktermios *termios)  in pl010_set_ldisc()  argument
468 		port->flags |= UPF_HARDPPS_CD;  in pl010_set_ldisc()
469 		spin_lock_irq(&port->lock);  in pl010_set_ldisc()
470 		pl010_enable_ms(port);  in pl010_set_ldisc()
471 		spin_unlock_irq(&port->lock);  in pl010_set_ldisc()
473 		port->flags &= ~UPF_HARDPPS_CD;  in pl010_set_ldisc()
474 		if (!UART_ENABLE_MS(port, termios->c_cflag)) {  in pl010_set_ldisc()
475 			spin_lock_irq(&port->lock);  in pl010_set_ldisc()
476 			pl010_disable_ms(port);  in pl010_set_ldisc()
477 			spin_unlock_irq(&port->lock);  in pl010_set_ldisc()
482 static const char *pl010_type(struct uart_port *port)  in pl010_type()  argument
484 	return port->type == PORT_AMBA ? "AMBA" : NULL;  in pl010_type()
490 static void pl010_release_port(struct uart_port *port)  in pl010_release_port()  argument
492 	release_mem_region(port->mapbase, UART_PORT_SIZE);  in pl010_release_port()
498 static int pl010_request_port(struct uart_port *port)  in pl010_request_port()  argument
500 	return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")  in pl010_request_port()
507 static void pl010_config_port(struct uart_port *port, int flags)  in pl010_config_port()  argument
510 		port->type = PORT_AMBA;  in pl010_config_port()
511 		pl010_request_port(port);  in pl010_config_port()
518 static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)  in pl010_verify_port()  argument
554 static void pl010_console_putchar(struct uart_port *port, unsigned char ch)  in pl010_console_putchar()  argument
559 		status = readb(port->membase + UART01x_FR);  in pl010_console_putchar()
562 	writel(ch, port->membase + UART01x_DR);  in pl010_console_putchar()
569 	struct uart_port *port = &uap->port;  in pl010_console_write()  local
577 	old_cr = readb(port->membase + UART010_CR);  in pl010_console_write()
578 	writel(UART01x_CR_UARTEN, port->membase + UART010_CR);  in pl010_console_write()
580 	uart_console_write(port, s, count, pl010_console_putchar);  in pl010_console_write()
587 		status = readb(port->membase + UART01x_FR);  in pl010_console_write()
590 	writel(old_cr, port->membase + UART010_CR);  in pl010_console_write()
599 	if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {  in pl010_console_get_options()
601 		lcr_h = readb(uap->port.membase + UART010_LCRH);  in pl010_console_get_options()
616 		quot = readb(uap->port.membase + UART010_LCRL) |  in pl010_console_get_options()
617 		       readb(uap->port.membase + UART010_LCRM) << 8;  in pl010_console_get_options()
618 		*baud = uap->port.uartclk / (16 * (quot + 1));  in pl010_console_get_options()
646 	uap->port.uartclk = clk_get_rate(uap->clk);  in pl010_console_setup()
653 	return uart_set_options(&uap->port, co, baud, parity, bits, flow);  in pl010_console_setup()
710 	uap->port.dev = &dev->dev;  in pl010_probe()
711 	uap->port.mapbase = dev->res.start;  in pl010_probe()
712 	uap->port.membase = base;  in pl010_probe()
713 	uap->port.iotype = UPIO_MEM;  in pl010_probe()
714 	uap->port.irq = dev->irq[0];  in pl010_probe()
715 	uap->port.fifosize = 16;  in pl010_probe()
716 	uap->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_AMBA_PL010_CONSOLE);  in pl010_probe()
717 	uap->port.ops = &amba_pl010_pops;  in pl010_probe()
718 	uap->port.flags = UPF_BOOT_AUTOCONF;  in pl010_probe()
719 	uap->port.line = i;  in pl010_probe()
732 			dev_err(uap->port.dev,  in pl010_probe()
739 	ret = uart_add_one_port(&amba_reg, &uap->port);  in pl010_probe()
752 	uart_remove_one_port(&amba_reg, &uap->port);  in pl010_remove()
770 		uart_suspend_port(&amba_reg, &uap->port);  in pl010_suspend()
780 		uart_resume_port(&amba_reg, &uap->port);  in pl010_resume()