1 // SPDX-License-Identifier: GPL-2.0+
30 		status = p->serial_in(p, UART_LSR);  in tegra_uart_handle_break()
34 		p->serial_in(p, UART_RX);  in tegra_uart_handle_break()
36 		if (--tmout == 0)  in tegra_uart_handle_break()
45 	struct tegra_uart *uart;  in tegra_uart_probe()  local
50 	uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL);  in tegra_uart_probe()
51 	if (!uart)  in tegra_uart_probe()
52 		return -ENOMEM;  in tegra_uart_probe()
57 	spin_lock_init(&port->lock);  in tegra_uart_probe()
59 	port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |  in tegra_uart_probe()
61 	port->iotype = UPIO_MEM32;  in tegra_uart_probe()
62 	port->regshift = 2;  in tegra_uart_probe()
63 	port->type = PORT_TEGRA;  in tegra_uart_probe()
64 	port->irqflags |= IRQF_SHARED;  in tegra_uart_probe()
65 	port->dev = &pdev->dev;  in tegra_uart_probe()
66 	port->handle_break = tegra_uart_handle_break;  in tegra_uart_probe()
68 	ret = of_alias_get_id(pdev->dev.of_node, "serial");  in tegra_uart_probe()
70 		port->line = ret;  in tegra_uart_probe()
76 	port->irq = ret;  in tegra_uart_probe()
80 		return -ENODEV;  in tegra_uart_probe()
82 	port->membase = devm_ioremap(&pdev->dev, res->start,  in tegra_uart_probe()
84 	if (!port->membase)  in tegra_uart_probe()
85 		return -ENOMEM;  in tegra_uart_probe()
87 	port->mapbase = res->start;  in tegra_uart_probe()
88 	port->mapsize = resource_size(res);  in tegra_uart_probe()
90 	uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);  in tegra_uart_probe()
91 	if (IS_ERR(uart->rst))  in tegra_uart_probe()
92 		return PTR_ERR(uart->rst);  in tegra_uart_probe()
94 	if (device_property_read_u32(&pdev->dev, "clock-frequency",  in tegra_uart_probe()
95 				     &port->uartclk)) {  in tegra_uart_probe()
96 		uart->clk = devm_clk_get(&pdev->dev, NULL);  in tegra_uart_probe()
97 		if (IS_ERR(uart->clk)) {  in tegra_uart_probe()
98 			dev_err(&pdev->dev, "failed to get clock!\n");  in tegra_uart_probe()
99 			return -ENODEV;  in tegra_uart_probe()
102 		ret = clk_prepare_enable(uart->clk);  in tegra_uart_probe()
106 		port->uartclk = clk_get_rate(uart->clk);  in tegra_uart_probe()
109 	ret = reset_control_deassert(uart->rst);  in tegra_uart_probe()
117 	platform_set_drvdata(pdev, uart);  in tegra_uart_probe()
118 	uart->line = ret;  in tegra_uart_probe()
123 	clk_disable_unprepare(uart->clk);  in tegra_uart_probe()
130 	struct tegra_uart *uart = platform_get_drvdata(pdev);  in tegra_uart_remove()  local
132 	serial8250_unregister_port(uart->line);  in tegra_uart_remove()
133 	reset_control_assert(uart->rst);  in tegra_uart_remove()
134 	clk_disable_unprepare(uart->clk);  in tegra_uart_remove()
142 	struct tegra_uart *uart = dev_get_drvdata(dev);  in tegra_uart_suspend()  local
143 	struct uart_8250_port *port8250 = serial8250_get_port(uart->line);  in tegra_uart_suspend()
144 	struct uart_port *port = &port8250->port;  in tegra_uart_suspend()
146 	serial8250_suspend_port(uart->line);  in tegra_uart_suspend()
149 		clk_disable_unprepare(uart->clk);  in tegra_uart_suspend()
156 	struct tegra_uart *uart = dev_get_drvdata(dev);  in tegra_uart_resume()  local
157 	struct uart_8250_port *port8250 = serial8250_get_port(uart->line);  in tegra_uart_resume()
158 	struct uart_port *port = &port8250->port;  in tegra_uart_resume()
161 		clk_prepare_enable(uart->clk);  in tegra_uart_resume()
163 	serial8250_resume_port(uart->line);  in tegra_uart_resume()
173 	{ .compatible = "nvidia,tegra20-uart", },
186 		.name = "tegra-uart",