Lines Matching +full:up +full:-

1 // SPDX-License-Identifier: GPL-2.0
10 * The bcm2835aux is capable of RTS auto flow-control, but this driver doesn't
37 * struct bcm2835aux_data - driver private data of BCM2835 auxiliary UART
52 static void bcm2835aux_rs485_start_tx(struct uart_8250_port *up) in bcm2835aux_rs485_start_tx() argument
54 if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) { in bcm2835aux_rs485_start_tx()
55 struct bcm2835aux_data *data = dev_get_drvdata(up->port.dev); in bcm2835aux_rs485_start_tx()
57 data->cntl &= ~BCM2835_AUX_UART_CNTL_RXEN; in bcm2835aux_rs485_start_tx()
58 serial_out(up, BCM2835_AUX_UART_CNTL, data->cntl); in bcm2835aux_rs485_start_tx()
63 * flags besides RTS. So no need for a read-modify-write. in bcm2835aux_rs485_start_tx()
65 if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND) in bcm2835aux_rs485_start_tx()
66 serial8250_out_MCR(up, 0); in bcm2835aux_rs485_start_tx()
68 serial8250_out_MCR(up, UART_MCR_RTS); in bcm2835aux_rs485_start_tx()
71 static void bcm2835aux_rs485_stop_tx(struct uart_8250_port *up) in bcm2835aux_rs485_stop_tx() argument
73 if (up->port.rs485.flags & SER_RS485_RTS_AFTER_SEND) in bcm2835aux_rs485_stop_tx()
74 serial8250_out_MCR(up, 0); in bcm2835aux_rs485_stop_tx()
76 serial8250_out_MCR(up, UART_MCR_RTS); in bcm2835aux_rs485_stop_tx()
78 if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) { in bcm2835aux_rs485_stop_tx()
79 struct bcm2835aux_data *data = dev_get_drvdata(up->port.dev); in bcm2835aux_rs485_stop_tx()
81 data->cntl |= BCM2835_AUX_UART_CNTL_RXEN; in bcm2835aux_rs485_stop_tx()
82 serial_out(up, BCM2835_AUX_UART_CNTL, data->cntl); in bcm2835aux_rs485_stop_tx()
89 struct uart_8250_port up = { }; in bcm2835aux_serial_probe() local
97 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); in bcm2835aux_serial_probe()
99 return -ENOMEM; in bcm2835aux_serial_probe()
102 up.capabilities = UART_CAP_FIFO | UART_CAP_MINI; in bcm2835aux_serial_probe()
103 up.port.dev = &pdev->dev; in bcm2835aux_serial_probe()
104 up.port.regshift = 2; in bcm2835aux_serial_probe()
105 up.port.type = PORT_16550; in bcm2835aux_serial_probe()
106 up.port.iotype = UPIO_MEM; in bcm2835aux_serial_probe()
107 up.port.fifosize = 8; in bcm2835aux_serial_probe()
108 up.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE | in bcm2835aux_serial_probe()
110 up.port.rs485_config = serial8250_em485_config; in bcm2835aux_serial_probe()
111 up.port.rs485_supported = serial8250_em485_supported; in bcm2835aux_serial_probe()
112 up.rs485_start_tx = bcm2835aux_rs485_start_tx; in bcm2835aux_serial_probe()
113 up.rs485_stop_tx = bcm2835aux_rs485_stop_tx; in bcm2835aux_serial_probe()
115 /* initialize cached copy with power-on reset value */ in bcm2835aux_serial_probe()
116 data->cntl = BCM2835_AUX_UART_CNTL_RXEN | BCM2835_AUX_UART_CNTL_TXEN; in bcm2835aux_serial_probe()
120 /* get the clock - this also enables the HW */ in bcm2835aux_serial_probe()
121 data->clk = devm_clk_get_optional(&pdev->dev, NULL); in bcm2835aux_serial_probe()
127 up.port.irq = ret; in bcm2835aux_serial_probe()
132 dev_err(&pdev->dev, "memory resource not found"); in bcm2835aux_serial_probe()
133 return -EINVAL; in bcm2835aux_serial_probe()
136 bcm_data = device_get_match_data(&pdev->dev); in bcm2835aux_serial_probe()
149 offset = bcm_data->offset; in bcm2835aux_serial_probe()
151 up.port.mapbase = res->start + offset; in bcm2835aux_serial_probe()
152 up.port.mapsize = resource_size(res) - offset; in bcm2835aux_serial_probe()
155 ret = of_alias_get_id(pdev->dev.of_node, "serial"); in bcm2835aux_serial_probe()
157 up.port.line = ret; in bcm2835aux_serial_probe()
160 ret = clk_prepare_enable(data->clk); in bcm2835aux_serial_probe()
162 dev_err(&pdev->dev, "unable to enable uart clock - %d\n", in bcm2835aux_serial_probe()
167 uartclk = clk_get_rate(data->clk); in bcm2835aux_serial_probe()
169 ret = device_property_read_u32(&pdev->dev, "clock-frequency", &uartclk); in bcm2835aux_serial_probe()
171 dev_err_probe(&pdev->dev, ret, "could not get clk rate\n"); in bcm2835aux_serial_probe()
176 /* the HW-clock divider for bcm2835aux is 8, in bcm2835aux_serial_probe()
181 up.port.uartclk = uartclk * 2; in bcm2835aux_serial_probe()
184 ret = serial8250_register_8250_port(&up); in bcm2835aux_serial_probe()
186 dev_err_probe(&pdev->dev, ret, "unable to register 8250 port\n"); in bcm2835aux_serial_probe()
189 data->line = ret; in bcm2835aux_serial_probe()
194 clk_disable_unprepare(data->clk); in bcm2835aux_serial_probe()
202 serial8250_unregister_port(data->line); in bcm2835aux_serial_remove()
203 clk_disable_unprepare(data->clk); in bcm2835aux_serial_remove()
213 { .compatible = "brcm,bcm2835-aux-uart" },
226 .name = "bcm2835-aux-uart",
240 if (!device->port.membase) in early_bcm2835aux_setup()
241 return -ENODEV; in early_bcm2835aux_setup()
243 device->port.iotype = UPIO_MEM32; in early_bcm2835aux_setup()
244 device->port.regshift = 2; in early_bcm2835aux_setup()
249 OF_EARLYCON_DECLARE(bcm2835aux, "brcm,bcm2835-aux-uart",