Lines Matching +full:spmi +full:- +full:pmic +full:- +full:arb
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2015, 2017, 2021, The Linux Foundation. All rights reserved.
18 #include <linux/spmi.h>
20 /* PMIC Arbiter configuration registers */
27 /* PMIC Arbiter channel registers offsets */
44 #define SPMI_MAPPING_TABLE_TREE_DEPTH 16 /* Maximum of 16-bits */
84 * PMIC arbiter version 5 uses different register offsets for read/write vs
92 /* Maximum number of support PMIC peripherals */
123 * spmi_pmic_arb - SPMI PMIC Arbiter object
127 * @intr: address of the SPMI interrupt control registers.
128 * @cnfg: address of the PMIC Arbiter configuration registers.
131 * @irq: PMIC ARB interrupt.
135 * @mapping_table: in-memory copy of PPID -> APID mapping table.
136 * @domain: irq domain object for PMIC IRQ domain
137 * @spmic: SPMI controller object
139 * @ppid_to_apid in-memory copy of PPID -> APID mapping table.
169 * @non_data_cmd: on v1 issues an spmi non-data command.
170 * on v2 no HW support, returns -EOPNOTSUPP.
171 * @offset: on v1 offset of per-ee channel.
172 * on v2 offset of per-ee and per-ppid channel.
173 * @fmt_cmd: formats a GENI/SPMI command.
187 /* spmi commands (read_cmd, write_cmd, cmd) functionality */
204 writel_relaxed(val, pmic_arb->wr_base + offset); in pmic_arb_base_write()
210 writel_relaxed(val, pmic_arb->rd_base + offset); in pmic_arb_set_rd_cmd()
214 * pmic_arb_read_data: reads pmic-arb's register and copy 1..4 bytes to buf
215 * @bc: byte count -1. range: 0..3
222 u32 data = __raw_readl(pmic_arb->rd_base + reg); in pmic_arb_read_data()
228 * pmic_arb_write_data: write 1..4 bytes from buf to pmic-arb's register
229 * @bc: byte-count -1. range: 0..3.
239 __raw_writel(data, pmic_arb->wr_base + reg); in pmic_arb_write_data()
252 rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr, ch_type); in pmic_arb_wait_for_done()
259 while (timeout--) { in pmic_arb_wait_for_done()
264 dev_err(&ctrl->dev, "%s: %#x %#x: transaction denied (%#x)\n", in pmic_arb_wait_for_done()
266 return -EPERM; in pmic_arb_wait_for_done()
270 dev_err(&ctrl->dev, "%s: %#x %#x: transaction failed (%#x)\n", in pmic_arb_wait_for_done()
273 return -EIO; in pmic_arb_wait_for_done()
277 dev_err(&ctrl->dev, "%s: %#x %#x: transaction dropped (%#x)\n", in pmic_arb_wait_for_done()
279 return -EIO; in pmic_arb_wait_for_done()
287 dev_err(&ctrl->dev, "%s: %#x %#x: timeout, status %#x\n", in pmic_arb_wait_for_done()
289 return -ETIMEDOUT; in pmic_arb_wait_for_done()
301 rc = pmic_arb->ver_ops->offset(pmic_arb, sid, 0, PMIC_ARB_CHANNEL_RW); in pmic_arb_non_data_cmd_v1()
308 raw_spin_lock_irqsave(&pmic_arb->lock, flags); in pmic_arb_non_data_cmd_v1()
310 rc = pmic_arb_wait_for_done(ctrl, pmic_arb->wr_base, sid, 0, in pmic_arb_non_data_cmd_v1()
312 raw_spin_unlock_irqrestore(&pmic_arb->lock, flags); in pmic_arb_non_data_cmd_v1()
320 return -EOPNOTSUPP; in pmic_arb_non_data_cmd_v2()
323 /* Non-data command */
328 dev_dbg(&ctrl->dev, "cmd op:0x%x sid:%d\n", opc, sid); in pmic_arb_cmd()
330 /* Check for valid non-data command */ in pmic_arb_cmd()
332 return -EINVAL; in pmic_arb_cmd()
334 return pmic_arb->ver_ops->non_data_cmd(ctrl, opc, sid); in pmic_arb_cmd()
340 u8 bc = len - 1; in pmic_arb_fmt_read_cmd()
343 rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr, in pmic_arb_fmt_read_cmd()
350 dev_err(&pmic_arb->spmic->dev, "pmic-arb supports 1..%d bytes per trans, but:%zu requested", in pmic_arb_fmt_read_cmd()
352 return -EINVAL; in pmic_arb_fmt_read_cmd()
363 return -EINVAL; in pmic_arb_fmt_read_cmd()
365 *cmd = pmic_arb->ver_ops->fmt_cmd(opc, sid, addr, bc); in pmic_arb_fmt_read_cmd()
375 u8 bc = len - 1; in pmic_arb_read_cmd_unlocked()
379 rc = pmic_arb_wait_for_done(ctrl, pmic_arb->rd_base, sid, addr, in pmic_arb_read_cmd_unlocked()
389 bc - 4); in pmic_arb_read_cmd_unlocked()
406 raw_spin_lock_irqsave(&pmic_arb->lock, flags); in pmic_arb_read_cmd()
408 raw_spin_unlock_irqrestore(&pmic_arb->lock, flags); in pmic_arb_read_cmd()
417 u8 bc = len - 1; in pmic_arb_fmt_write_cmd()
420 rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr, in pmic_arb_fmt_write_cmd()
427 dev_err(&pmic_arb->spmic->dev, "pmic-arb supports 1..%d bytes per trans, but:%zu requested", in pmic_arb_fmt_write_cmd()
429 return -EINVAL; in pmic_arb_fmt_write_cmd()
442 return -EINVAL; in pmic_arb_fmt_write_cmd()
444 *cmd = pmic_arb->ver_ops->fmt_cmd(opc, sid, addr, bc); in pmic_arb_fmt_write_cmd()
454 u8 bc = len - 1; in pmic_arb_write_cmd_unlocked()
461 bc - 4); in pmic_arb_write_cmd_unlocked()
465 return pmic_arb_wait_for_done(ctrl, pmic_arb->wr_base, sid, addr, in pmic_arb_write_cmd_unlocked()
482 raw_spin_lock_irqsave(&pmic_arb->lock, flags); in pmic_arb_write_cmd()
485 raw_spin_unlock_irqrestore(&pmic_arb->lock, flags); in pmic_arb_write_cmd()
509 raw_spin_lock_irqsave(&pmic_arb->lock, flags); in pmic_arb_masked_write()
521 raw_spin_unlock_irqrestore(&pmic_arb->lock, flags); in pmic_arb_masked_write()
538 u8 type; /* 1 -> edge */
548 u8 sid = hwirq_to_sid(d->hwirq); in qpnpint_spmi_write()
549 u8 per = hwirq_to_per(d->hwirq); in qpnpint_spmi_write()
551 if (pmic_arb_write_cmd(pmic_arb->spmic, SPMI_CMD_EXT_WRITEL, sid, in qpnpint_spmi_write()
553 dev_err_ratelimited(&pmic_arb->spmic->dev, "failed irqchip transaction on %x\n", in qpnpint_spmi_write()
554 d->irq); in qpnpint_spmi_write()
560 u8 sid = hwirq_to_sid(d->hwirq); in qpnpint_spmi_read()
561 u8 per = hwirq_to_per(d->hwirq); in qpnpint_spmi_read()
563 if (pmic_arb_read_cmd(pmic_arb->spmic, SPMI_CMD_EXT_READL, sid, in qpnpint_spmi_read()
565 dev_err_ratelimited(&pmic_arb->spmic->dev, "failed irqchip transaction on %x\n", in qpnpint_spmi_read()
566 d->irq); in qpnpint_spmi_read()
574 u8 sid = hwirq_to_sid(d->hwirq); in qpnpint_spmi_masked_write()
575 u8 per = hwirq_to_per(d->hwirq); in qpnpint_spmi_masked_write()
578 rc = pmic_arb_masked_write(pmic_arb->spmic, sid, (per << 8) + reg, buf, in qpnpint_spmi_masked_write()
581 dev_err_ratelimited(&pmic_arb->spmic->dev, "failed irqchip transaction on %x rc=%d\n", in qpnpint_spmi_masked_write()
582 d->irq, rc); in qpnpint_spmi_masked_write()
588 u16 ppid = pmic_arb->apid_data[apid].ppid; in cleanup_irq()
593 dev_err_ratelimited(&pmic_arb->spmic->dev, "%s apid=%d sid=0x%x per=0x%x irq=%d\n", in cleanup_irq()
595 writel_relaxed(irq_mask, pmic_arb->ver_ops->irq_clear(pmic_arb, apid)); in cleanup_irq()
603 u8 sid = (pmic_arb->apid_data[apid].ppid >> 8) & 0xF; in periph_interrupt()
604 u8 per = pmic_arb->apid_data[apid].ppid & 0xFF; in periph_interrupt()
606 status = readl_relaxed(pmic_arb->ver_ops->irq_status(pmic_arb, apid)); in periph_interrupt()
608 id = ffs(status) - 1; in periph_interrupt()
610 irq = irq_find_mapping(pmic_arb->domain, in periph_interrupt()
626 const struct pmic_arb_ver_ops *ver_ops = pmic_arb->ver_ops; in pmic_arb_chained_irq()
628 int first = pmic_arb->min_apid; in pmic_arb_chained_irq()
629 int last = pmic_arb->max_apid; in pmic_arb_chained_irq()
630 u8 ee = pmic_arb->ee; in pmic_arb_chained_irq()
641 ver_ops->owner_acc_status(pmic_arb, ee, i)); in pmic_arb_chained_irq()
646 id = ffs(status) - 1; in pmic_arb_chained_irq()
650 WARN_ONCE(true, "spurious spmi irq received for apid=%d\n", in pmic_arb_chained_irq()
655 ver_ops->acc_enable(pmic_arb, apid)); in pmic_arb_chained_irq()
666 if (pmic_arb->apid_data[i].irq_ee != pmic_arb->ee) in pmic_arb_chained_irq()
670 ver_ops->irq_status(pmic_arb, i)); in pmic_arb_chained_irq()
673 ver_ops->acc_enable(pmic_arb, i)); in pmic_arb_chained_irq()
675 dev_dbg(&pmic_arb->spmic->dev, in pmic_arb_chained_irq()
694 u8 irq = hwirq_to_irq(d->hwirq); in qpnpint_irq_ack()
695 u16 apid = hwirq_to_apid(d->hwirq); in qpnpint_irq_ack()
698 writel_relaxed(BIT(irq), pmic_arb->ver_ops->irq_clear(pmic_arb, apid)); in qpnpint_irq_ack()
706 u8 irq = hwirq_to_irq(d->hwirq); in qpnpint_irq_mask()
715 const struct pmic_arb_ver_ops *ver_ops = pmic_arb->ver_ops; in qpnpint_irq_unmask()
716 u8 irq = hwirq_to_irq(d->hwirq); in qpnpint_irq_unmask()
717 u16 apid = hwirq_to_apid(d->hwirq); in qpnpint_irq_unmask()
721 ver_ops->acc_enable(pmic_arb, apid)); in qpnpint_irq_unmask()
741 u8 irq_bit = BIT(hwirq_to_irq(d->hwirq)); in qpnpint_irq_set_type()
755 return -EINVAL; in qpnpint_irq_set_type()
780 return irq_set_irq_wake(pmic_arb->irq, on); in qpnpint_irq_set_wake()
787 u8 irq = hwirq_to_irq(d->hwirq); in qpnpint_get_irqchip_state()
791 return -EINVAL; in qpnpint_get_irqchip_state()
803 u16 periph = hwirq_to_per(d->hwirq); in qpnpint_irq_domain_activate()
804 u16 apid = hwirq_to_apid(d->hwirq); in qpnpint_irq_domain_activate()
805 u16 sid = hwirq_to_sid(d->hwirq); in qpnpint_irq_domain_activate()
806 u16 irq = hwirq_to_irq(d->hwirq); in qpnpint_irq_domain_activate()
809 if (pmic_arb->apid_data[apid].irq_ee != pmic_arb->ee) { in qpnpint_irq_domain_activate()
810 …dev_err(&pmic_arb->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u: ee=%u but owner… in qpnpint_irq_domain_activate()
811 sid, periph, irq, pmic_arb->ee, in qpnpint_irq_domain_activate()
812 pmic_arb->apid_data[apid].irq_ee); in qpnpint_irq_domain_activate()
813 return -ENODEV; in qpnpint_irq_domain_activate()
839 struct spmi_pmic_arb *pmic_arb = d->host_data; in qpnpint_irq_domain_translate()
840 u32 *intspec = fwspec->param; in qpnpint_irq_domain_translate()
844 dev_dbg(&pmic_arb->spmic->dev, "intspec[0] 0x%1x intspec[1] 0x%02x intspec[2] 0x%02x\n", in qpnpint_irq_domain_translate()
847 if (irq_domain_get_of_node(d) != pmic_arb->spmic->dev.of_node) in qpnpint_irq_domain_translate()
848 return -EINVAL; in qpnpint_irq_domain_translate()
849 if (fwspec->param_count != 4) in qpnpint_irq_domain_translate()
850 return -EINVAL; in qpnpint_irq_domain_translate()
852 return -EINVAL; in qpnpint_irq_domain_translate()
855 rc = pmic_arb->ver_ops->ppid_to_apid(pmic_arb, ppid); in qpnpint_irq_domain_translate()
857 dev_err(&pmic_arb->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u rc = %d\n", in qpnpint_irq_domain_translate()
864 if (apid > pmic_arb->max_apid) in qpnpint_irq_domain_translate()
865 pmic_arb->max_apid = apid; in qpnpint_irq_domain_translate()
866 if (apid < pmic_arb->min_apid) in qpnpint_irq_domain_translate()
867 pmic_arb->min_apid = apid; in qpnpint_irq_domain_translate()
872 dev_dbg(&pmic_arb->spmic->dev, "out_hwirq = %lu\n", *out_hwirq); in qpnpint_irq_domain_translate()
885 dev_dbg(&pmic_arb->spmic->dev, "virq = %u, hwirq = %lu, type = %u\n", in qpnpint_irq_domain_map()
904 struct spmi_pmic_arb *pmic_arb = domain->host_data; in qpnpint_irq_domain_alloc()
923 u32 *mapping_table = pmic_arb->mapping_table; in pmic_arb_ppid_to_apid_v1()
929 apid_valid = pmic_arb->ppid_to_apid[ppid]; in pmic_arb_ppid_to_apid_v1()
936 if (!test_and_set_bit(index, pmic_arb->mapping_table_valid)) in pmic_arb_ppid_to_apid_v1()
937 mapping_table[index] = readl_relaxed(pmic_arb->cnfg + in pmic_arb_ppid_to_apid_v1()
947 pmic_arb->ppid_to_apid[ppid] in pmic_arb_ppid_to_apid_v1()
949 pmic_arb->apid_data[apid].ppid = ppid; in pmic_arb_ppid_to_apid_v1()
957 pmic_arb->ppid_to_apid[ppid] in pmic_arb_ppid_to_apid_v1()
959 pmic_arb->apid_data[apid].ppid = ppid; in pmic_arb_ppid_to_apid_v1()
965 return -ENODEV; in pmic_arb_ppid_to_apid_v1()
972 return 0x800 + 0x80 * pmic_arb->channel; in pmic_arb_offset_v1()
977 struct apid_data *apidd = &pmic_arb->apid_data[pmic_arb->last_apid]; in pmic_arb_find_apid()
981 for (apid = pmic_arb->last_apid; ; apid++, apidd++) { in pmic_arb_find_apid()
982 offset = pmic_arb->ver_ops->apid_map_offset(apid); in pmic_arb_find_apid()
983 if (offset >= pmic_arb->core_size) in pmic_arb_find_apid()
986 regval = readl_relaxed(pmic_arb->cnfg + in pmic_arb_find_apid()
988 apidd->irq_ee = SPMI_OWNERSHIP_PERIPH2OWNER(regval); in pmic_arb_find_apid()
989 apidd->write_ee = apidd->irq_ee; in pmic_arb_find_apid()
991 regval = readl_relaxed(pmic_arb->core + offset); in pmic_arb_find_apid()
996 pmic_arb->ppid_to_apid[id] = apid | PMIC_ARB_APID_VALID; in pmic_arb_find_apid()
997 apidd->ppid = id; in pmic_arb_find_apid()
1003 pmic_arb->last_apid = apid & ~PMIC_ARB_APID_VALID; in pmic_arb_find_apid()
1012 apid_valid = pmic_arb->ppid_to_apid[ppid]; in pmic_arb_ppid_to_apid_v2()
1016 return -ENODEV; in pmic_arb_ppid_to_apid_v2()
1023 struct apid_data *apidd = pmic_arb->apid_data; in pmic_arb_read_apid_map_v5()
1038 offset = pmic_arb->ver_ops->apid_map_offset(i); in pmic_arb_read_apid_map_v5()
1039 if (offset >= pmic_arb->core_size) in pmic_arb_read_apid_map_v5()
1042 regval = readl_relaxed(pmic_arb->core + offset); in pmic_arb_read_apid_map_v5()
1048 regval = readl_relaxed(pmic_arb->cnfg + in pmic_arb_read_apid_map_v5()
1050 apidd->write_ee = SPMI_OWNERSHIP_PERIPH2OWNER(regval); in pmic_arb_read_apid_map_v5()
1052 apidd->irq_ee = is_irq_ee ? apidd->write_ee : INVALID_EE; in pmic_arb_read_apid_map_v5()
1054 valid = pmic_arb->ppid_to_apid[ppid] & PMIC_ARB_APID_VALID; in pmic_arb_read_apid_map_v5()
1055 apid = pmic_arb->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID; in pmic_arb_read_apid_map_v5()
1056 prev_apidd = &pmic_arb->apid_data[apid]; in pmic_arb_read_apid_map_v5()
1058 if (!valid || apidd->write_ee == pmic_arb->ee) { in pmic_arb_read_apid_map_v5()
1060 pmic_arb->ppid_to_apid[ppid] = i | PMIC_ARB_APID_VALID; in pmic_arb_read_apid_map_v5()
1062 prev_apidd->write_ee == pmic_arb->ee) { in pmic_arb_read_apid_map_v5()
1067 prev_apidd->irq_ee = apidd->irq_ee; in pmic_arb_read_apid_map_v5()
1070 apidd->ppid = ppid; in pmic_arb_read_apid_map_v5()
1071 pmic_arb->last_apid = i; in pmic_arb_read_apid_map_v5()
1075 dev_dbg(&pmic_arb->spmic->dev, "PPID APID Write-EE IRQ-EE\n"); in pmic_arb_read_apid_map_v5()
1077 apid = pmic_arb->ppid_to_apid[ppid]; in pmic_arb_read_apid_map_v5()
1080 apidd = &pmic_arb->apid_data[apid]; in pmic_arb_read_apid_map_v5()
1081 dev_dbg(&pmic_arb->spmic->dev, "%#03X %3u %2u %2u\n", in pmic_arb_read_apid_map_v5()
1082 ppid, apid, apidd->write_ee, apidd->irq_ee); in pmic_arb_read_apid_map_v5()
1091 if (!(pmic_arb->ppid_to_apid[ppid] & PMIC_ARB_APID_VALID)) in pmic_arb_ppid_to_apid_v5()
1092 return -ENODEV; in pmic_arb_ppid_to_apid_v5()
1094 return pmic_arb->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID; in pmic_arb_ppid_to_apid_v5()
1111 return 0x1000 * pmic_arb->ee + 0x8000 * apid; in pmic_arb_offset_v2()
1133 offset = 0x10000 * pmic_arb->ee + 0x80 * apid; in pmic_arb_offset_v5()
1136 if (pmic_arb->apid_data[apid].write_ee != pmic_arb->ee) { in pmic_arb_offset_v5()
1137 dev_err(&pmic_arb->spmic->dev, "disallowed SPMI write to sid=%u, addr=0x%04X\n", in pmic_arb_offset_v5()
1139 return -EPERM; in pmic_arb_offset_v5()
1161 return pmic_arb->intr + 0x20 * m + 0x4 * n; in pmic_arb_owner_acc_status_v1()
1167 return pmic_arb->intr + 0x100000 + 0x1000 * m + 0x4 * n; in pmic_arb_owner_acc_status_v2()
1173 return pmic_arb->intr + 0x200000 + 0x1000 * m + 0x4 * n; in pmic_arb_owner_acc_status_v3()
1179 return pmic_arb->intr + 0x10000 * m + 0x4 * n; in pmic_arb_owner_acc_status_v5()
1185 return pmic_arb->intr + 0x200 + 0x4 * n; in pmic_arb_acc_enable_v1()
1191 return pmic_arb->intr + 0x1000 * n; in pmic_arb_acc_enable_v2()
1197 return pmic_arb->wr_base + 0x100 + 0x10000 * n; in pmic_arb_acc_enable_v5()
1203 return pmic_arb->intr + 0x600 + 0x4 * n; in pmic_arb_irq_status_v1()
1209 return pmic_arb->intr + 0x4 + 0x1000 * n; in pmic_arb_irq_status_v2()
1215 return pmic_arb->wr_base + 0x104 + 0x10000 * n; in pmic_arb_irq_status_v5()
1221 return pmic_arb->intr + 0xA00 + 0x4 * n; in pmic_arb_irq_clear_v1()
1227 return pmic_arb->intr + 0x8 + 0x1000 * n; in pmic_arb_irq_clear_v2()
1233 return pmic_arb->wr_base + 0x108 + 0x10000 * n; in pmic_arb_irq_clear_v5()
1315 ctrl = spmi_controller_alloc(&pdev->dev, sizeof(*pmic_arb)); in spmi_pmic_arb_probe()
1317 return -ENOMEM; in spmi_pmic_arb_probe()
1320 pmic_arb->spmic = ctrl; in spmi_pmic_arb_probe()
1323 core = devm_ioremap_resource(&ctrl->dev, res); in spmi_pmic_arb_probe()
1329 pmic_arb->core_size = resource_size(res); in spmi_pmic_arb_probe()
1331 pmic_arb->ppid_to_apid = devm_kcalloc(&ctrl->dev, PMIC_ARB_MAX_PPID, in spmi_pmic_arb_probe()
1332 sizeof(*pmic_arb->ppid_to_apid), in spmi_pmic_arb_probe()
1334 if (!pmic_arb->ppid_to_apid) { in spmi_pmic_arb_probe()
1335 err = -ENOMEM; in spmi_pmic_arb_probe()
1342 pmic_arb->ver_ops = &pmic_arb_v1; in spmi_pmic_arb_probe()
1343 pmic_arb->wr_base = core; in spmi_pmic_arb_probe()
1344 pmic_arb->rd_base = core; in spmi_pmic_arb_probe()
1346 pmic_arb->core = core; in spmi_pmic_arb_probe()
1349 pmic_arb->ver_ops = &pmic_arb_v2; in spmi_pmic_arb_probe()
1351 pmic_arb->ver_ops = &pmic_arb_v3; in spmi_pmic_arb_probe()
1353 pmic_arb->ver_ops = &pmic_arb_v5; in spmi_pmic_arb_probe()
1357 pmic_arb->rd_base = devm_ioremap_resource(&ctrl->dev, res); in spmi_pmic_arb_probe()
1358 if (IS_ERR(pmic_arb->rd_base)) { in spmi_pmic_arb_probe()
1359 err = PTR_ERR(pmic_arb->rd_base); in spmi_pmic_arb_probe()
1365 pmic_arb->wr_base = devm_ioremap_resource(&ctrl->dev, res); in spmi_pmic_arb_probe()
1366 if (IS_ERR(pmic_arb->wr_base)) { in spmi_pmic_arb_probe()
1367 err = PTR_ERR(pmic_arb->wr_base); in spmi_pmic_arb_probe()
1372 dev_info(&ctrl->dev, "PMIC arbiter version %s (0x%x)\n", in spmi_pmic_arb_probe()
1373 pmic_arb->ver_ops->ver_str, hw_ver); in spmi_pmic_arb_probe()
1376 pmic_arb->intr = devm_ioremap_resource(&ctrl->dev, res); in spmi_pmic_arb_probe()
1377 if (IS_ERR(pmic_arb->intr)) { in spmi_pmic_arb_probe()
1378 err = PTR_ERR(pmic_arb->intr); in spmi_pmic_arb_probe()
1383 pmic_arb->cnfg = devm_ioremap_resource(&ctrl->dev, res); in spmi_pmic_arb_probe()
1384 if (IS_ERR(pmic_arb->cnfg)) { in spmi_pmic_arb_probe()
1385 err = PTR_ERR(pmic_arb->cnfg); in spmi_pmic_arb_probe()
1389 pmic_arb->irq = platform_get_irq_byname(pdev, "periph_irq"); in spmi_pmic_arb_probe()
1390 if (pmic_arb->irq < 0) { in spmi_pmic_arb_probe()
1391 err = pmic_arb->irq; in spmi_pmic_arb_probe()
1395 err = of_property_read_u32(pdev->dev.of_node, "qcom,channel", &channel); in spmi_pmic_arb_probe()
1397 dev_err(&pdev->dev, "channel unspecified.\n"); in spmi_pmic_arb_probe()
1402 dev_err(&pdev->dev, "invalid channel (%u) specified.\n", in spmi_pmic_arb_probe()
1404 err = -EINVAL; in spmi_pmic_arb_probe()
1408 pmic_arb->channel = channel; in spmi_pmic_arb_probe()
1410 err = of_property_read_u32(pdev->dev.of_node, "qcom,ee", &ee); in spmi_pmic_arb_probe()
1412 dev_err(&pdev->dev, "EE unspecified.\n"); in spmi_pmic_arb_probe()
1417 dev_err(&pdev->dev, "invalid EE (%u) specified\n", ee); in spmi_pmic_arb_probe()
1418 err = -EINVAL; in spmi_pmic_arb_probe()
1422 pmic_arb->ee = ee; in spmi_pmic_arb_probe()
1423 mapping_table = devm_kcalloc(&ctrl->dev, PMIC_ARB_MAX_PERIPHS, in spmi_pmic_arb_probe()
1426 err = -ENOMEM; in spmi_pmic_arb_probe()
1430 pmic_arb->mapping_table = mapping_table; in spmi_pmic_arb_probe()
1433 pmic_arb->max_apid = 0; in spmi_pmic_arb_probe()
1434 pmic_arb->min_apid = PMIC_ARB_MAX_PERIPHS - 1; in spmi_pmic_arb_probe()
1437 raw_spin_lock_init(&pmic_arb->lock); in spmi_pmic_arb_probe()
1439 ctrl->cmd = pmic_arb_cmd; in spmi_pmic_arb_probe()
1440 ctrl->read_cmd = pmic_arb_read_cmd; in spmi_pmic_arb_probe()
1441 ctrl->write_cmd = pmic_arb_write_cmd; in spmi_pmic_arb_probe()
1446 dev_err(&pdev->dev, "could not read APID->PPID mapping table, rc= %d\n", in spmi_pmic_arb_probe()
1452 dev_dbg(&pdev->dev, "adding irq domain\n"); in spmi_pmic_arb_probe()
1453 pmic_arb->domain = irq_domain_add_tree(pdev->dev.of_node, in spmi_pmic_arb_probe()
1455 if (!pmic_arb->domain) { in spmi_pmic_arb_probe()
1456 dev_err(&pdev->dev, "unable to create irq_domain\n"); in spmi_pmic_arb_probe()
1457 err = -ENOMEM; in spmi_pmic_arb_probe()
1461 irq_set_chained_handler_and_data(pmic_arb->irq, pmic_arb_chained_irq, in spmi_pmic_arb_probe()
1470 irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL); in spmi_pmic_arb_probe()
1471 irq_domain_remove(pmic_arb->domain); in spmi_pmic_arb_probe()
1482 irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL); in spmi_pmic_arb_remove()
1483 irq_domain_remove(pmic_arb->domain); in spmi_pmic_arb_remove()
1489 { .compatible = "qcom,spmi-pmic-arb", },