Lines Matching +full:can +full:- +full:r8a7791
1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2014-2017 Glider bvba
14 #include <linux/dma-mapping.h>
87 #define SIMDR1_SYNCAC_SHIFT 25 /* Sync Polarity (1 = Active-low) */
91 #define SIMDR1_FLD_MASK GENMASK(3, 2) /* Frame Sync Signal Interval (0-3) */
100 #define SIMDR2_BITLEN1(i) (((i) - 1) << 24) /* Data Size (8-32 bits) */
101 #define SIMDR2_WDLEN1(i) (((i) - 1) << 16) /* Word Count (1-64/256 (SH, A1))) */
105 #define SISCR_BRPS_MASK GENMASK(12, 8) /* Prescaler Setting (1-32) */
106 #define SISCR_BRPS(i) (((i) - 1) << 8)
127 #define SICTR_TXDIZ_HIZ (2 << 22) /* High-impedance */
197 return ioread16(p->mapbase + reg_offs); in sh_msiof_read()
199 return ioread32(p->mapbase + reg_offs); in sh_msiof_read()
209 iowrite16(value, p->mapbase + reg_offs); in sh_msiof_write()
212 iowrite32(value, p->mapbase + reg_offs); in sh_msiof_write()
228 return readl_poll_timeout_atomic(p->mapbase + SICTR, data, in sh_msiof_modify_ctr_wait()
238 complete(&p->done); in sh_msiof_spi_irq()
252 readl_poll_timeout_atomic(p->mapbase + SICTR, data, !(data & mask), 1, in sh_msiof_spi_reset_regs()
264 unsigned long parent_rate = clk_get_rate(p->clk); in sh_msiof_spi_set_clk_regs()
265 unsigned int div_pow = p->min_div_pow; in sh_msiof_spi_set_clk_regs()
266 u32 spi_hz = t->speed_hz; in sh_msiof_spi_set_clk_regs()
291 dev_err(&p->pdev->dev, in sh_msiof_spi_set_clk_regs()
297 t->effective_speed_hz = parent_rate / (brps << div_pow); in sh_msiof_spi_set_clk_regs()
301 if (!(p->ctlr->flags & SPI_CONTROLLER_MUST_TX)) in sh_msiof_spi_set_clk_regs()
308 * DTDL/SYNCDL bit : p->info->dtdl or p->info->syncdl in sh_msiof_get_delay_bit()
326 if (!p->info) in sh_msiof_spi_get_dtdl_and_syncdl()
330 if (p->info->dtdl > 200 || p->info->syncdl > 300) { in sh_msiof_spi_get_dtdl_and_syncdl()
331 dev_warn(&p->pdev->dev, "DTDL or SYNCDL is too large\n"); in sh_msiof_spi_get_dtdl_and_syncdl()
336 if ((p->info->dtdl + p->info->syncdl) % 100) { in sh_msiof_spi_get_dtdl_and_syncdl()
337 dev_warn(&p->pdev->dev, "the sum of DTDL/SYNCDL is not good\n"); in sh_msiof_spi_get_dtdl_and_syncdl()
341 val = sh_msiof_get_delay_bit(p->info->dtdl) << SIMDR1_DTDL_SHIFT; in sh_msiof_spi_get_dtdl_and_syncdl()
342 val |= sh_msiof_get_delay_bit(p->info->syncdl) << SIMDR1_SYNCDL_SHIFT; in sh_msiof_spi_get_dtdl_and_syncdl()
365 if (spi_controller_is_slave(p->ctlr)) { in sh_msiof_spi_set_pin_regs()
372 if (p->ctlr->flags & SPI_CONTROLLER_MUST_TX) { in sh_msiof_spi_set_pin_regs()
396 if (tx_buf || (p->ctlr->flags & SPI_CONTROLLER_MUST_TX)) in sh_msiof_spi_set_mode_regs()
554 spi_controller_get_devdata(spi->controller); in sh_msiof_spi_setup()
557 if (spi->cs_gpiod || spi_controller_is_slave(p->ctlr)) in sh_msiof_spi_setup()
560 if (p->native_cs_inited && in sh_msiof_spi_setup()
561 (p->native_cs_high == !!(spi->mode & SPI_CS_HIGH))) in sh_msiof_spi_setup()
567 if (spi->mode & SPI_CS_HIGH) in sh_msiof_spi_setup()
571 pm_runtime_get_sync(&p->pdev->dev); in sh_msiof_spi_setup()
576 pm_runtime_put(&p->pdev->dev); in sh_msiof_spi_setup()
577 p->native_cs_high = spi->mode & SPI_CS_HIGH; in sh_msiof_spi_setup()
578 p->native_cs_inited = true; in sh_msiof_spi_setup()
586 const struct spi_device *spi = msg->spi; in sh_msiof_prepare_message()
590 if (spi->cs_gpiod) { in sh_msiof_prepare_message()
591 ss = ctlr->unused_native_cs; in sh_msiof_prepare_message()
592 cs_high = p->native_cs_high; in sh_msiof_prepare_message()
594 ss = spi->chip_select; in sh_msiof_prepare_message()
595 cs_high = !!(spi->mode & SPI_CS_HIGH); in sh_msiof_prepare_message()
597 sh_msiof_spi_set_pin_regs(p, ss, !!(spi->mode & SPI_CPOL), in sh_msiof_prepare_message()
598 !!(spi->mode & SPI_CPHA), in sh_msiof_prepare_message()
599 !!(spi->mode & SPI_3WIRE), in sh_msiof_prepare_message()
600 !!(spi->mode & SPI_LSB_FIRST), cs_high); in sh_msiof_prepare_message()
606 bool slave = spi_controller_is_slave(p->ctlr); in sh_msiof_spi_start()
626 bool slave = spi_controller_is_slave(p->ctlr); in sh_msiof_spi_stop()
646 p->slave_aborted = true; in sh_msiof_slave_abort()
647 complete(&p->done); in sh_msiof_slave_abort()
648 complete(&p->done_txdma); in sh_msiof_slave_abort()
655 if (spi_controller_is_slave(p->ctlr)) { in sh_msiof_wait_for_completion()
657 p->slave_aborted) { in sh_msiof_wait_for_completion()
658 dev_dbg(&p->pdev->dev, "interrupted\n"); in sh_msiof_wait_for_completion()
659 return -EINTR; in sh_msiof_wait_for_completion()
663 dev_err(&p->pdev->dev, "timeout\n"); in sh_msiof_wait_for_completion()
664 return -ETIMEDOUT; in sh_msiof_wait_for_completion()
684 words = min_t(int, words, p->tx_fifo_size); in sh_msiof_spi_txrx_once()
686 words = min_t(int, words, p->rx_fifo_size); in sh_msiof_spi_txrx_once()
689 fifo_shift = 32 - bits; in sh_msiof_spi_txrx_once()
702 reinit_completion(&p->done); in sh_msiof_spi_txrx_once()
703 p->slave_aborted = false; in sh_msiof_spi_txrx_once()
707 dev_err(&p->pdev->dev, "failed to start hardware\n"); in sh_msiof_spi_txrx_once()
712 ret = sh_msiof_wait_for_completion(p, &p->done); in sh_msiof_spi_txrx_once()
725 dev_err(&p->pdev->dev, "failed to shut down hardware\n"); in sh_msiof_spi_txrx_once()
755 desc_rx = dmaengine_prep_slave_single(p->ctlr->dma_rx, in sh_msiof_dma_once()
756 p->rx_dma_addr, len, DMA_DEV_TO_MEM, in sh_msiof_dma_once()
759 return -EAGAIN; in sh_msiof_dma_once()
761 desc_rx->callback = sh_msiof_dma_complete; in sh_msiof_dma_once()
762 desc_rx->callback_param = &p->done; in sh_msiof_dma_once()
770 dma_sync_single_for_device(p->ctlr->dma_tx->device->dev, in sh_msiof_dma_once()
771 p->tx_dma_addr, len, DMA_TO_DEVICE); in sh_msiof_dma_once()
772 desc_tx = dmaengine_prep_slave_single(p->ctlr->dma_tx, in sh_msiof_dma_once()
773 p->tx_dma_addr, len, DMA_MEM_TO_DEV, in sh_msiof_dma_once()
776 ret = -EAGAIN; in sh_msiof_dma_once()
780 desc_tx->callback = sh_msiof_dma_complete; in sh_msiof_dma_once()
781 desc_tx->callback_param = &p->done_txdma; in sh_msiof_dma_once()
792 /* setup msiof transfer mode registers (32-bit words) */ in sh_msiof_dma_once()
797 reinit_completion(&p->done); in sh_msiof_dma_once()
799 reinit_completion(&p->done_txdma); in sh_msiof_dma_once()
800 p->slave_aborted = false; in sh_msiof_dma_once()
804 dma_async_issue_pending(p->ctlr->dma_rx); in sh_msiof_dma_once()
806 dma_async_issue_pending(p->ctlr->dma_tx); in sh_msiof_dma_once()
810 dev_err(&p->pdev->dev, "failed to start hardware\n"); in sh_msiof_dma_once()
816 ret = sh_msiof_wait_for_completion(p, &p->done_txdma); in sh_msiof_dma_once()
823 ret = sh_msiof_wait_for_completion(p, &p->done); in sh_msiof_dma_once()
831 ret = sh_msiof_wait_for_completion(p, &p->done); in sh_msiof_dma_once()
841 dev_err(&p->pdev->dev, "failed to shut down hardware\n"); in sh_msiof_dma_once()
846 dma_sync_single_for_cpu(p->ctlr->dma_rx->device->dev, in sh_msiof_dma_once()
847 p->rx_dma_addr, len, DMA_FROM_DEVICE); in sh_msiof_dma_once()
856 dmaengine_terminate_sync(p->ctlr->dma_tx); in sh_msiof_dma_once()
859 dmaengine_terminate_sync(p->ctlr->dma_rx); in sh_msiof_dma_once()
866 /* src or dst can be unaligned, but not both */ in copy_bswap32()
868 while (words--) { in copy_bswap32()
873 while (words--) { in copy_bswap32()
878 while (words--) in copy_bswap32()
885 /* src or dst can be unaligned, but not both */ in copy_wswap32()
887 while (words--) { in copy_wswap32()
892 while (words--) { in copy_wswap32()
897 while (words--) in copy_wswap32()
915 const void *tx_buf = t->tx_buf; in sh_msiof_transfer_one()
916 void *rx_buf = t->rx_buf; in sh_msiof_transfer_one()
917 unsigned int len = t->len; in sh_msiof_transfer_one()
918 unsigned int bits = t->bits_per_word; in sh_msiof_transfer_one()
929 if (!spi_controller_is_slave(p->ctlr)) in sh_msiof_transfer_one()
932 while (ctlr->dma_tx && len > 15) { in sh_msiof_transfer_one()
934 * DMA supports 32-bit words only, hence pack 8-bit and 16-bit in sh_msiof_transfer_one()
940 l = min(round_down(len, 4), p->tx_fifo_size * 4); in sh_msiof_transfer_one()
942 l = min(round_down(len, 4), p->rx_fifo_size * 4); in sh_msiof_transfer_one()
953 copy32(p->tx_dma_page, tx_buf, l / 4); in sh_msiof_transfer_one()
956 if (ret == -EAGAIN) { in sh_msiof_transfer_one()
957 dev_warn_once(&p->pdev->dev, in sh_msiof_transfer_one()
965 copy32(rx_buf, p->rx_dma_page, l / 4); in sh_msiof_transfer_one()
971 len -= l; in sh_msiof_transfer_one()
1036 words -= n; in sh_msiof_transfer_one()
1040 bits = t->bits_per_word; in sh_msiof_transfer_one()
1077 { .compatible = "renesas,sh-mobile-msiof", .data = &sh_data },
1078 { .compatible = "renesas,msiof-r8a7743", .data = &rcar_gen2_data },
1079 { .compatible = "renesas,msiof-r8a7745", .data = &rcar_gen2_data },
1080 { .compatible = "renesas,msiof-r8a7790", .data = &rcar_gen2_data },
1081 { .compatible = "renesas,msiof-r8a7791", .data = &rcar_gen2_data },
1082 { .compatible = "renesas,msiof-r8a7792", .data = &rcar_gen2_data },
1083 { .compatible = "renesas,msiof-r8a7793", .data = &rcar_gen2_data },
1084 { .compatible = "renesas,msiof-r8a7794", .data = &rcar_gen2_data },
1085 { .compatible = "renesas,rcar-gen2-msiof", .data = &rcar_gen2_data },
1086 { .compatible = "renesas,msiof-r8a7796", .data = &rcar_gen3_data },
1087 { .compatible = "renesas,rcar-gen3-msiof", .data = &rcar_gen3_data },
1088 { .compatible = "renesas,rcar-gen4-msiof", .data = &rcar_gen3_data },
1089 { .compatible = "renesas,sh-msiof", .data = &sh_data }, /* Deprecated */
1098 struct device_node *np = dev->of_node; in sh_msiof_spi_parse_dt()
1105 info->mode = of_property_read_bool(np, "spi-slave") ? MSIOF_SPI_SLAVE in sh_msiof_spi_parse_dt()
1109 if (info->mode == MSIOF_SPI_MASTER) in sh_msiof_spi_parse_dt()
1110 of_property_read_u32(np, "num-cs", &num_cs); in sh_msiof_spi_parse_dt()
1111 of_property_read_u32(np, "renesas,tx-fifo-size", in sh_msiof_spi_parse_dt()
1112 &info->tx_fifo_override); in sh_msiof_spi_parse_dt()
1113 of_property_read_u32(np, "renesas,rx-fifo-size", in sh_msiof_spi_parse_dt()
1114 &info->rx_fifo_override); in sh_msiof_spi_parse_dt()
1115 of_property_read_u32(np, "renesas,dtdl", &info->dtdl); in sh_msiof_spi_parse_dt()
1116 of_property_read_u32(np, "renesas,syncdl", &info->syncdl); in sh_msiof_spi_parse_dt()
1118 info->num_chipselect = num_cs; in sh_msiof_spi_parse_dt()
1170 struct platform_device *pdev = p->pdev; in sh_msiof_request_dma()
1171 struct device *dev = &pdev->dev; in sh_msiof_request_dma()
1172 const struct sh_msiof_spi_info *info = p->info; in sh_msiof_request_dma()
1178 if (dev->of_node) { in sh_msiof_request_dma()
1182 } else if (info && info->dma_tx_id && info->dma_rx_id) { in sh_msiof_request_dma()
1183 dma_tx_id = info->dma_tx_id; in sh_msiof_request_dma()
1184 dma_rx_id = info->dma_rx_id; in sh_msiof_request_dma()
1195 ctlr = p->ctlr; in sh_msiof_request_dma()
1196 ctlr->dma_tx = sh_msiof_request_dma_chan(dev, DMA_MEM_TO_DEV, in sh_msiof_request_dma()
1197 dma_tx_id, res->start + SITFDR); in sh_msiof_request_dma()
1198 if (!ctlr->dma_tx) in sh_msiof_request_dma()
1199 return -ENODEV; in sh_msiof_request_dma()
1201 ctlr->dma_rx = sh_msiof_request_dma_chan(dev, DMA_DEV_TO_MEM, in sh_msiof_request_dma()
1202 dma_rx_id, res->start + SIRFDR); in sh_msiof_request_dma()
1203 if (!ctlr->dma_rx) in sh_msiof_request_dma()
1206 p->tx_dma_page = (void *)__get_free_page(GFP_KERNEL | GFP_DMA); in sh_msiof_request_dma()
1207 if (!p->tx_dma_page) in sh_msiof_request_dma()
1210 p->rx_dma_page = (void *)__get_free_page(GFP_KERNEL | GFP_DMA); in sh_msiof_request_dma()
1211 if (!p->rx_dma_page) in sh_msiof_request_dma()
1214 tx_dev = ctlr->dma_tx->device->dev; in sh_msiof_request_dma()
1215 p->tx_dma_addr = dma_map_single(tx_dev, p->tx_dma_page, PAGE_SIZE, in sh_msiof_request_dma()
1217 if (dma_mapping_error(tx_dev, p->tx_dma_addr)) in sh_msiof_request_dma()
1220 rx_dev = ctlr->dma_rx->device->dev; in sh_msiof_request_dma()
1221 p->rx_dma_addr = dma_map_single(rx_dev, p->rx_dma_page, PAGE_SIZE, in sh_msiof_request_dma()
1223 if (dma_mapping_error(rx_dev, p->rx_dma_addr)) in sh_msiof_request_dma()
1230 dma_unmap_single(tx_dev, p->tx_dma_addr, PAGE_SIZE, DMA_TO_DEVICE); in sh_msiof_request_dma()
1232 free_page((unsigned long)p->rx_dma_page); in sh_msiof_request_dma()
1234 free_page((unsigned long)p->tx_dma_page); in sh_msiof_request_dma()
1236 dma_release_channel(ctlr->dma_rx); in sh_msiof_request_dma()
1238 dma_release_channel(ctlr->dma_tx); in sh_msiof_request_dma()
1239 ctlr->dma_tx = NULL; in sh_msiof_request_dma()
1240 return -ENODEV; in sh_msiof_request_dma()
1245 struct spi_controller *ctlr = p->ctlr; in sh_msiof_release_dma()
1247 if (!ctlr->dma_tx) in sh_msiof_release_dma()
1250 dma_unmap_single(ctlr->dma_rx->device->dev, p->rx_dma_addr, PAGE_SIZE, in sh_msiof_release_dma()
1252 dma_unmap_single(ctlr->dma_tx->device->dev, p->tx_dma_addr, PAGE_SIZE, in sh_msiof_release_dma()
1254 free_page((unsigned long)p->rx_dma_page); in sh_msiof_release_dma()
1255 free_page((unsigned long)p->tx_dma_page); in sh_msiof_release_dma()
1256 dma_release_channel(ctlr->dma_rx); in sh_msiof_release_dma()
1257 dma_release_channel(ctlr->dma_tx); in sh_msiof_release_dma()
1270 chipdata = of_device_get_match_data(&pdev->dev); in sh_msiof_spi_probe()
1272 info = sh_msiof_spi_parse_dt(&pdev->dev); in sh_msiof_spi_probe()
1274 chipdata = (const void *)pdev->id_entry->driver_data; in sh_msiof_spi_probe()
1275 info = dev_get_platdata(&pdev->dev); in sh_msiof_spi_probe()
1279 dev_err(&pdev->dev, "failed to obtain device info\n"); in sh_msiof_spi_probe()
1280 return -ENXIO; in sh_msiof_spi_probe()
1283 if (info->mode == MSIOF_SPI_SLAVE) in sh_msiof_spi_probe()
1284 ctlr = spi_alloc_slave(&pdev->dev, in sh_msiof_spi_probe()
1287 ctlr = spi_alloc_master(&pdev->dev, in sh_msiof_spi_probe()
1290 return -ENOMEM; in sh_msiof_spi_probe()
1295 p->ctlr = ctlr; in sh_msiof_spi_probe()
1296 p->info = info; in sh_msiof_spi_probe()
1297 p->min_div_pow = chipdata->min_div_pow; in sh_msiof_spi_probe()
1299 init_completion(&p->done); in sh_msiof_spi_probe()
1300 init_completion(&p->done_txdma); in sh_msiof_spi_probe()
1302 p->clk = devm_clk_get(&pdev->dev, NULL); in sh_msiof_spi_probe()
1303 if (IS_ERR(p->clk)) { in sh_msiof_spi_probe()
1304 dev_err(&pdev->dev, "cannot get clock\n"); in sh_msiof_spi_probe()
1305 ret = PTR_ERR(p->clk); in sh_msiof_spi_probe()
1315 p->mapbase = devm_platform_ioremap_resource(pdev, 0); in sh_msiof_spi_probe()
1316 if (IS_ERR(p->mapbase)) { in sh_msiof_spi_probe()
1317 ret = PTR_ERR(p->mapbase); in sh_msiof_spi_probe()
1321 ret = devm_request_irq(&pdev->dev, i, sh_msiof_spi_irq, 0, in sh_msiof_spi_probe()
1322 dev_name(&pdev->dev), p); in sh_msiof_spi_probe()
1324 dev_err(&pdev->dev, "unable to request irq\n"); in sh_msiof_spi_probe()
1328 p->pdev = pdev; in sh_msiof_spi_probe()
1329 pm_runtime_enable(&pdev->dev); in sh_msiof_spi_probe()
1332 p->tx_fifo_size = chipdata->tx_fifo_size; in sh_msiof_spi_probe()
1333 p->rx_fifo_size = chipdata->rx_fifo_size; in sh_msiof_spi_probe()
1334 if (p->info->tx_fifo_override) in sh_msiof_spi_probe()
1335 p->tx_fifo_size = p->info->tx_fifo_override; in sh_msiof_spi_probe()
1336 if (p->info->rx_fifo_override) in sh_msiof_spi_probe()
1337 p->rx_fifo_size = p->info->rx_fifo_override; in sh_msiof_spi_probe()
1340 ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; in sh_msiof_spi_probe()
1341 ctlr->mode_bits |= SPI_LSB_FIRST | SPI_3WIRE; in sh_msiof_spi_probe()
1342 clksrc = clk_get_rate(p->clk); in sh_msiof_spi_probe()
1343 ctlr->min_speed_hz = DIV_ROUND_UP(clksrc, 1024); in sh_msiof_spi_probe()
1344 ctlr->max_speed_hz = DIV_ROUND_UP(clksrc, 1 << p->min_div_pow); in sh_msiof_spi_probe()
1345 ctlr->flags = chipdata->ctlr_flags; in sh_msiof_spi_probe()
1346 ctlr->bus_num = pdev->id; in sh_msiof_spi_probe()
1347 ctlr->num_chipselect = p->info->num_chipselect; in sh_msiof_spi_probe()
1348 ctlr->dev.of_node = pdev->dev.of_node; in sh_msiof_spi_probe()
1349 ctlr->setup = sh_msiof_spi_setup; in sh_msiof_spi_probe()
1350 ctlr->prepare_message = sh_msiof_prepare_message; in sh_msiof_spi_probe()
1351 ctlr->slave_abort = sh_msiof_slave_abort; in sh_msiof_spi_probe()
1352 ctlr->bits_per_word_mask = chipdata->bits_per_word_mask; in sh_msiof_spi_probe()
1353 ctlr->auto_runtime_pm = true; in sh_msiof_spi_probe()
1354 ctlr->transfer_one = sh_msiof_transfer_one; in sh_msiof_spi_probe()
1355 ctlr->use_gpio_descriptors = true; in sh_msiof_spi_probe()
1356 ctlr->max_native_cs = MAX_SS; in sh_msiof_spi_probe()
1360 dev_warn(&pdev->dev, "DMA not available, using PIO\n"); in sh_msiof_spi_probe()
1362 ret = devm_spi_register_controller(&pdev->dev, ctlr); in sh_msiof_spi_probe()
1364 dev_err(&pdev->dev, "devm_spi_register_controller error.\n"); in sh_msiof_spi_probe()
1372 pm_runtime_disable(&pdev->dev); in sh_msiof_spi_probe()
1383 pm_runtime_disable(&pdev->dev); in sh_msiof_spi_remove()
1398 return spi_controller_suspend(p->ctlr); in sh_msiof_spi_suspend()
1405 return spi_controller_resume(p->ctlr); in sh_msiof_spi_resume()