Lines Matching refs:sqi
165 static int pic32_sqi_set_clk_rate(struct pic32_sqi *sqi, u32 sck) in pic32_sqi_set_clk_rate() argument
170 div = clk_get_rate(sqi->base_clk) / (2 * sck); in pic32_sqi_set_clk_rate()
173 val = readl(sqi->regs + PESQI_CLK_CTRL_REG); in pic32_sqi_set_clk_rate()
177 writel(val, sqi->regs + PESQI_CLK_CTRL_REG); in pic32_sqi_set_clk_rate()
180 return readl_poll_timeout(sqi->regs + PESQI_CLK_CTRL_REG, val, in pic32_sqi_set_clk_rate()
184 static inline void pic32_sqi_enable_int(struct pic32_sqi *sqi) in pic32_sqi_enable_int() argument
188 writel(mask, sqi->regs + PESQI_INT_ENABLE_REG); in pic32_sqi_enable_int()
190 writel(mask, sqi->regs + PESQI_INT_SIGEN_REG); in pic32_sqi_enable_int()
193 static inline void pic32_sqi_disable_int(struct pic32_sqi *sqi) in pic32_sqi_disable_int() argument
195 writel(0, sqi->regs + PESQI_INT_ENABLE_REG); in pic32_sqi_disable_int()
196 writel(0, sqi->regs + PESQI_INT_SIGEN_REG); in pic32_sqi_disable_int()
201 struct pic32_sqi *sqi = dev_id; in pic32_sqi_isr() local
204 enable = readl(sqi->regs + PESQI_INT_ENABLE_REG); in pic32_sqi_isr()
205 status = readl(sqi->regs + PESQI_INT_STAT_REG); in pic32_sqi_isr()
230 complete(&sqi->xfer_done); in pic32_sqi_isr()
235 writel(enable, sqi->regs + PESQI_INT_ENABLE_REG); in pic32_sqi_isr()
240 static struct ring_desc *ring_desc_get(struct pic32_sqi *sqi) in ring_desc_get() argument
244 if (list_empty(&sqi->bd_list_free)) in ring_desc_get()
247 rdesc = list_first_entry(&sqi->bd_list_free, struct ring_desc, list); in ring_desc_get()
248 list_move_tail(&rdesc->list, &sqi->bd_list_used); in ring_desc_get()
252 static void ring_desc_put(struct pic32_sqi *sqi, struct ring_desc *rdesc) in ring_desc_put() argument
254 list_move(&rdesc->list, &sqi->bd_list_free); in ring_desc_put()
257 static int pic32_sqi_one_transfer(struct pic32_sqi *sqi, in pic32_sqi_one_transfer() argument
298 rdesc = ring_desc_get(sqi); in pic32_sqi_one_transfer()
321 struct pic32_sqi *sqi = spi_master_get_devdata(master); in pic32_sqi_prepare_hardware() local
324 pic32_setbits(sqi->regs + PESQI_CONF_REG, PESQI_EN); in pic32_sqi_prepare_hardware()
326 pic32_setbits(sqi->regs + PESQI_CLK_CTRL_REG, PESQI_CLK_EN); in pic32_sqi_prepare_hardware()
345 struct pic32_sqi *sqi; in pic32_sqi_one_message() local
350 sqi = spi_master_get_devdata(master); in pic32_sqi_one_message()
352 reinit_completion(&sqi->xfer_done); in pic32_sqi_one_message()
359 if (sqi->cur_spi != spi) { in pic32_sqi_one_message()
361 if (sqi->cur_speed != spi->max_speed_hz) { in pic32_sqi_one_message()
362 sqi->cur_speed = spi->max_speed_hz; in pic32_sqi_one_message()
363 ret = pic32_sqi_set_clk_rate(sqi, spi->max_speed_hz); in pic32_sqi_one_message()
370 if (sqi->cur_mode != mode) { in pic32_sqi_one_message()
371 val = readl(sqi->regs + PESQI_CONF_REG); in pic32_sqi_one_message()
378 writel(val, sqi->regs + PESQI_CONF_REG); in pic32_sqi_one_message()
380 sqi->cur_mode = mode; in pic32_sqi_one_message()
382 sqi->cur_spi = spi; in pic32_sqi_one_message()
387 ret = pic32_sqi_one_transfer(sqi, msg, xfer); in pic32_sqi_one_message()
397 rdesc = list_last_entry(&sqi->bd_list_used, struct ring_desc, list); in pic32_sqi_one_message()
402 rdesc = list_first_entry(&sqi->bd_list_used, struct ring_desc, list); in pic32_sqi_one_message()
403 writel(rdesc->bd_dma, sqi->regs + PESQI_BD_BASE_ADDR_REG); in pic32_sqi_one_message()
406 pic32_sqi_enable_int(sqi); in pic32_sqi_one_message()
410 writel(val, sqi->regs + PESQI_BD_CTRL_REG); in pic32_sqi_one_message()
413 timeout = wait_for_completion_timeout(&sqi->xfer_done, 5 * HZ); in pic32_sqi_one_message()
415 dev_err(&sqi->master->dev, "wait timedout/interrupted\n"); in pic32_sqi_one_message()
425 writel(0, sqi->regs + PESQI_BD_CTRL_REG); in pic32_sqi_one_message()
427 pic32_sqi_disable_int(sqi); in pic32_sqi_one_message()
431 &sqi->bd_list_used, list) { in pic32_sqi_one_message()
435 ring_desc_put(sqi, rdesc); in pic32_sqi_one_message()
444 struct pic32_sqi *sqi = spi_master_get_devdata(master); in pic32_sqi_unprepare_hardware() local
447 pic32_clrbits(sqi->regs + PESQI_CLK_CTRL_REG, PESQI_CLK_EN); in pic32_sqi_unprepare_hardware()
449 pic32_clrbits(sqi->regs + PESQI_CONF_REG, PESQI_EN); in pic32_sqi_unprepare_hardware()
454 static int ring_desc_ring_alloc(struct pic32_sqi *sqi) in ring_desc_ring_alloc() argument
461 sqi->bd = dma_alloc_coherent(&sqi->master->dev, in ring_desc_ring_alloc()
463 &sqi->bd_dma, GFP_KERNEL); in ring_desc_ring_alloc()
464 if (!sqi->bd) { in ring_desc_ring_alloc()
465 dev_err(&sqi->master->dev, "failed allocating dma buffer\n"); in ring_desc_ring_alloc()
470 sqi->ring = kcalloc(PESQI_BD_COUNT, sizeof(*rdesc), GFP_KERNEL); in ring_desc_ring_alloc()
471 if (!sqi->ring) { in ring_desc_ring_alloc()
472 dma_free_coherent(&sqi->master->dev, in ring_desc_ring_alloc()
474 sqi->bd, sqi->bd_dma); in ring_desc_ring_alloc()
478 bd = (struct buf_desc *)sqi->bd; in ring_desc_ring_alloc()
480 INIT_LIST_HEAD(&sqi->bd_list_free); in ring_desc_ring_alloc()
481 INIT_LIST_HEAD(&sqi->bd_list_used); in ring_desc_ring_alloc()
484 for (i = 0, rdesc = sqi->ring; i < PESQI_BD_COUNT; i++, rdesc++) { in ring_desc_ring_alloc()
487 rdesc->bd_dma = sqi->bd_dma + (void *)&bd[i] - (void *)bd; in ring_desc_ring_alloc()
488 list_add_tail(&rdesc->list, &sqi->bd_list_free); in ring_desc_ring_alloc()
492 for (i = 0, rdesc = sqi->ring; i < PESQI_BD_COUNT - 1; i++) in ring_desc_ring_alloc()
499 static void ring_desc_ring_free(struct pic32_sqi *sqi) in ring_desc_ring_free() argument
501 dma_free_coherent(&sqi->master->dev, in ring_desc_ring_free()
503 sqi->bd, sqi->bd_dma); in ring_desc_ring_free()
504 kfree(sqi->ring); in ring_desc_ring_free()
507 static void pic32_sqi_hw_init(struct pic32_sqi *sqi) in pic32_sqi_hw_init() argument
519 writel(PESQI_SOFT_RESET, sqi->regs + PESQI_CONF_REG); in pic32_sqi_hw_init()
522 readl_poll_timeout_atomic(sqi->regs + PESQI_CONF_REG, val, in pic32_sqi_hw_init()
526 pic32_sqi_disable_int(sqi); in pic32_sqi_hw_init()
532 val = readl(sqi->regs + PESQI_CMD_THRES_REG); in pic32_sqi_hw_init()
536 writel(val, sqi->regs + PESQI_CMD_THRES_REG); in pic32_sqi_hw_init()
538 val = readl(sqi->regs + PESQI_INT_THRES_REG); in pic32_sqi_hw_init()
542 writel(val, sqi->regs + PESQI_INT_THRES_REG); in pic32_sqi_hw_init()
545 val = readl(sqi->regs + PESQI_CONF_REG); in pic32_sqi_hw_init()
550 writel(val, sqi->regs + PESQI_CONF_REG); in pic32_sqi_hw_init()
560 writel(val, sqi->regs + PESQI_CONF_REG); in pic32_sqi_hw_init()
563 writel(0, sqi->regs + PESQI_BD_POLL_CTRL_REG); in pic32_sqi_hw_init()
565 sqi->cur_speed = 0; in pic32_sqi_hw_init()
566 sqi->cur_mode = -1; in pic32_sqi_hw_init()
572 struct pic32_sqi *sqi; in pic32_sqi_probe() local
575 master = spi_alloc_master(&pdev->dev, sizeof(*sqi)); in pic32_sqi_probe()
579 sqi = spi_master_get_devdata(master); in pic32_sqi_probe()
580 sqi->master = master; in pic32_sqi_probe()
582 sqi->regs = devm_platform_ioremap_resource(pdev, 0); in pic32_sqi_probe()
583 if (IS_ERR(sqi->regs)) { in pic32_sqi_probe()
584 ret = PTR_ERR(sqi->regs); in pic32_sqi_probe()
589 sqi->irq = platform_get_irq(pdev, 0); in pic32_sqi_probe()
590 if (sqi->irq < 0) { in pic32_sqi_probe()
591 ret = sqi->irq; in pic32_sqi_probe()
596 sqi->sys_clk = devm_clk_get(&pdev->dev, "reg_ck"); in pic32_sqi_probe()
597 if (IS_ERR(sqi->sys_clk)) { in pic32_sqi_probe()
598 ret = PTR_ERR(sqi->sys_clk); in pic32_sqi_probe()
603 sqi->base_clk = devm_clk_get(&pdev->dev, "spi_ck"); in pic32_sqi_probe()
604 if (IS_ERR(sqi->base_clk)) { in pic32_sqi_probe()
605 ret = PTR_ERR(sqi->base_clk); in pic32_sqi_probe()
610 ret = clk_prepare_enable(sqi->sys_clk); in pic32_sqi_probe()
616 ret = clk_prepare_enable(sqi->base_clk); in pic32_sqi_probe()
619 clk_disable_unprepare(sqi->sys_clk); in pic32_sqi_probe()
623 init_completion(&sqi->xfer_done); in pic32_sqi_probe()
626 pic32_sqi_hw_init(sqi); in pic32_sqi_probe()
629 ret = ring_desc_ring_alloc(sqi); in pic32_sqi_probe()
636 ret = request_irq(sqi->irq, pic32_sqi_isr, 0, in pic32_sqi_probe()
637 dev_name(&pdev->dev), sqi); in pic32_sqi_probe()
639 dev_err(&pdev->dev, "request_irq(%d), failed\n", sqi->irq); in pic32_sqi_probe()
645 master->max_speed_hz = clk_get_rate(sqi->base_clk); in pic32_sqi_probe()
661 free_irq(sqi->irq, sqi); in pic32_sqi_probe()
665 platform_set_drvdata(pdev, sqi); in pic32_sqi_probe()
670 ring_desc_ring_free(sqi); in pic32_sqi_probe()
673 clk_disable_unprepare(sqi->base_clk); in pic32_sqi_probe()
674 clk_disable_unprepare(sqi->sys_clk); in pic32_sqi_probe()
683 struct pic32_sqi *sqi = platform_get_drvdata(pdev); in pic32_sqi_remove() local
686 free_irq(sqi->irq, sqi); in pic32_sqi_remove()
687 ring_desc_ring_free(sqi); in pic32_sqi_remove()
690 clk_disable_unprepare(sqi->base_clk); in pic32_sqi_remove()
691 clk_disable_unprepare(sqi->sys_clk); in pic32_sqi_remove()