28 #include <linux/spi/spi.h>
30 #include <linux/platform_data/spi-omap2-mcspi.h>
159 static inline void mcspi_write_cs_reg(const struct spi_device *spi,  in mcspi_write_cs_reg()  argument
162 	struct omap2_mcspi_cs	*cs = spi->controller_state;  in mcspi_write_cs_reg()
167 static inline u32 mcspi_read_cs_reg(const struct spi_device *spi, int idx)  in mcspi_read_cs_reg()  argument
169 	struct omap2_mcspi_cs	*cs = spi->controller_state;  in mcspi_read_cs_reg()
174 static inline u32 mcspi_cached_chconf0(const struct spi_device *spi)  in mcspi_cached_chconf0()  argument
176 	struct omap2_mcspi_cs *cs = spi->controller_state;  in mcspi_cached_chconf0()
181 static inline void mcspi_write_chconf0(const struct spi_device *spi, u32 val)  in mcspi_write_chconf0()  argument
183 	struct omap2_mcspi_cs *cs = spi->controller_state;  in mcspi_write_chconf0()
186 	mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCONF0, val);  in mcspi_write_chconf0()
187 	mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCONF0);  in mcspi_write_chconf0()
200 static void omap2_mcspi_set_dma_req(const struct spi_device *spi,  in omap2_mcspi_set_dma_req()  argument
205 	l = mcspi_cached_chconf0(spi);  in omap2_mcspi_set_dma_req()
217 	mcspi_write_chconf0(spi, l);  in omap2_mcspi_set_dma_req()
220 static void omap2_mcspi_set_enable(const struct spi_device *spi, int enable)  in omap2_mcspi_set_enable()  argument
222 	struct omap2_mcspi_cs *cs = spi->controller_state;  in omap2_mcspi_set_enable()
231 	mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCTRL0, cs->chctrl0);  in omap2_mcspi_set_enable()
233 	mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCTRL0);  in omap2_mcspi_set_enable()
236 static void omap2_mcspi_set_cs(struct spi_device *spi, bool enable)  in omap2_mcspi_set_cs()  argument
238 	struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);  in omap2_mcspi_set_cs()
245 	if (spi->mode & SPI_CS_HIGH)  in omap2_mcspi_set_cs()
248 	if (spi->controller_state) {  in omap2_mcspi_set_cs()
255 		l = mcspi_cached_chconf0(spi);  in omap2_mcspi_set_cs()
262 		mcspi_write_chconf0(spi, l);  in omap2_mcspi_set_cs()
291 static void omap2_mcspi_set_fifo(const struct spi_device *spi,  in omap2_mcspi_set_fifo()  argument
294 	struct spi_master *master = spi->master;  in omap2_mcspi_set_fifo()
295 	struct omap2_mcspi_cs *cs = spi->controller_state;  in omap2_mcspi_set_fifo()
303 	chconf = mcspi_cached_chconf0(spi);  in omap2_mcspi_set_fifo()
330 		mcspi_write_chconf0(spi, chconf);  in omap2_mcspi_set_fifo()
343 	mcspi_write_chconf0(spi, chconf);  in omap2_mcspi_set_fifo()
380 	struct spi_device *spi = data;  in omap2_mcspi_rx_callback()  local
381 	struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);  in omap2_mcspi_rx_callback()
382 	struct omap2_mcspi_dma *mcspi_dma = &mcspi->dma_channels[spi->chip_select];  in omap2_mcspi_rx_callback()
385 	omap2_mcspi_set_dma_req(spi, 1, 0);  in omap2_mcspi_rx_callback()
392 	struct spi_device *spi = data;  in omap2_mcspi_tx_callback()  local
393 	struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);  in omap2_mcspi_tx_callback()
394 	struct omap2_mcspi_dma *mcspi_dma = &mcspi->dma_channels[spi->chip_select];  in omap2_mcspi_tx_callback()
397 	omap2_mcspi_set_dma_req(spi, 0, 0);  in omap2_mcspi_tx_callback()
402 static void omap2_mcspi_tx_dma(struct spi_device *spi,  in omap2_mcspi_tx_dma()  argument
410 	mcspi = spi_master_get_devdata(spi->master);  in omap2_mcspi_tx_dma()
411 	mcspi_dma = &mcspi->dma_channels[spi->chip_select];  in omap2_mcspi_tx_dma()
421 		tx->callback_param = spi;  in omap2_mcspi_tx_dma()
427 	omap2_mcspi_set_dma_req(spi, 0, 1);  in omap2_mcspi_tx_dma()
431 omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer,  in omap2_mcspi_rx_dma()  argument
444 	struct omap2_mcspi_cs	*cs = spi->controller_state;  in omap2_mcspi_rx_dma()
448 	mcspi = spi_master_get_devdata(spi->master);  in omap2_mcspi_rx_dma()
449 	mcspi_dma = &mcspi->dma_channels[spi->chip_select];  in omap2_mcspi_rx_dma()
461 	l = mcspi_cached_chconf0(spi);  in omap2_mcspi_rx_dma()
498 		dev_err(&spi->dev, "sg_split failed\n");  in omap2_mcspi_rx_dma()
507 		tx->callback_param = spi;  in omap2_mcspi_rx_dma()
514 	omap2_mcspi_set_dma_req(spi, 1, 1);  in omap2_mcspi_rx_dma()
519 		omap2_mcspi_set_dma_req(spi, 1, 0);  in omap2_mcspi_rx_dma()
533 	omap2_mcspi_set_enable(spi, 0);  in omap2_mcspi_rx_dma()
544 			w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);  in omap2_mcspi_rx_dma()
553 			dev_err(&spi->dev, "DMA RX penultimate word empty\n");  in omap2_mcspi_rx_dma()
555 			omap2_mcspi_set_enable(spi, 1);  in omap2_mcspi_rx_dma()
562 		w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);  in omap2_mcspi_rx_dma()
570 		dev_err(&spi->dev, "DMA RX last word empty\n");  in omap2_mcspi_rx_dma()
573 	omap2_mcspi_set_enable(spi, 1);  in omap2_mcspi_rx_dma()
578 omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)  in omap2_mcspi_txrx_dma()  argument
581 	struct omap2_mcspi_cs	*cs = spi->controller_state;  in omap2_mcspi_txrx_dma()
593 	mcspi = spi_master_get_devdata(spi->master);  in omap2_mcspi_txrx_dma()
594 	mcspi_dma = &mcspi->dma_channels[spi->chip_select];  in omap2_mcspi_txrx_dma()
626 		if (spi_controller_is_slave(spi->master))  in omap2_mcspi_txrx_dma()
627 			mcspi_write_reg(spi->master,  in omap2_mcspi_txrx_dma()
630 		omap2_mcspi_tx_dma(spi, xfer, cfg);  in omap2_mcspi_txrx_dma()
634 		count = omap2_mcspi_rx_dma(spi, xfer, cfg, es);  in omap2_mcspi_txrx_dma()
642 			omap2_mcspi_set_dma_req(spi, 0, 0);  in omap2_mcspi_txrx_dma()
657 				dev_err(&spi->dev, "EOW timed out\n");  in omap2_mcspi_txrx_dma()
670 					dev_err(&spi->dev, "TXFFE timed out\n");  in omap2_mcspi_txrx_dma()
675 					dev_err(&spi->dev, "TXS timed out\n");  in omap2_mcspi_txrx_dma()
680 				dev_err(&spi->dev, "EOT timed out\n");  in omap2_mcspi_txrx_dma()
687 omap2_mcspi_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer)  in omap2_mcspi_txrx_pio()  argument
689 	struct omap2_mcspi_cs	*cs = spi->controller_state;  in omap2_mcspi_txrx_pio()
702 	l = mcspi_cached_chconf0(spi);  in omap2_mcspi_txrx_pio()
725 					dev_err(&spi->dev, "TXS timed out\n");  in omap2_mcspi_txrx_pio()
728 				dev_vdbg(&spi->dev, "write-%d %02x\n",  in omap2_mcspi_txrx_pio()
735 					dev_err(&spi->dev, "RXS timed out\n");  in omap2_mcspi_txrx_pio()
741 					omap2_mcspi_set_enable(spi, 0);  in omap2_mcspi_txrx_pio()
743 					dev_vdbg(&spi->dev, "read-%d %02x\n",  in omap2_mcspi_txrx_pio()
747 						dev_err(&spi->dev,  in omap2_mcspi_txrx_pio()
753 					omap2_mcspi_set_enable(spi, 0);  in omap2_mcspi_txrx_pio()
757 				dev_vdbg(&spi->dev, "read-%d %02x\n",  in omap2_mcspi_txrx_pio()
774 					dev_err(&spi->dev, "TXS timed out\n");  in omap2_mcspi_txrx_pio()
777 				dev_vdbg(&spi->dev, "write-%d %04x\n",  in omap2_mcspi_txrx_pio()
784 					dev_err(&spi->dev, "RXS timed out\n");  in omap2_mcspi_txrx_pio()
790 					omap2_mcspi_set_enable(spi, 0);  in omap2_mcspi_txrx_pio()
792 					dev_vdbg(&spi->dev, "read-%d %04x\n",  in omap2_mcspi_txrx_pio()
796 						dev_err(&spi->dev,  in omap2_mcspi_txrx_pio()
802 					omap2_mcspi_set_enable(spi, 0);  in omap2_mcspi_txrx_pio()
806 				dev_vdbg(&spi->dev, "read-%d %04x\n",  in omap2_mcspi_txrx_pio()
823 					dev_err(&spi->dev, "TXS timed out\n");  in omap2_mcspi_txrx_pio()
826 				dev_vdbg(&spi->dev, "write-%d %08x\n",  in omap2_mcspi_txrx_pio()
833 					dev_err(&spi->dev, "RXS timed out\n");  in omap2_mcspi_txrx_pio()
839 					omap2_mcspi_set_enable(spi, 0);  in omap2_mcspi_txrx_pio()
841 					dev_vdbg(&spi->dev, "read-%d %08x\n",  in omap2_mcspi_txrx_pio()
845 						dev_err(&spi->dev,  in omap2_mcspi_txrx_pio()
851 					omap2_mcspi_set_enable(spi, 0);  in omap2_mcspi_txrx_pio()
855 				dev_vdbg(&spi->dev, "read-%d %08x\n",  in omap2_mcspi_txrx_pio()
867 			dev_err(&spi->dev, "TXS timed out\n");  in omap2_mcspi_txrx_pio()
870 			dev_err(&spi->dev, "EOT timed out\n");  in omap2_mcspi_txrx_pio()
876 		omap2_mcspi_set_enable(spi, 0);  in omap2_mcspi_txrx_pio()
879 	omap2_mcspi_set_enable(spi, 1);  in omap2_mcspi_txrx_pio()
895 static int omap2_mcspi_setup_transfer(struct spi_device *spi,  in omap2_mcspi_setup_transfer()  argument
898 	struct omap2_mcspi_cs *cs = spi->controller_state;  in omap2_mcspi_setup_transfer()
901 	u8 word_len = spi->bits_per_word;  in omap2_mcspi_setup_transfer()
902 	u32 speed_hz = spi->max_speed_hz;  in omap2_mcspi_setup_transfer()
904 	mcspi = spi_master_get_devdata(spi->master);  in omap2_mcspi_setup_transfer()
927 	l = mcspi_cached_chconf0(spi);  in omap2_mcspi_setup_transfer()
947 	if (!(spi->mode & SPI_CS_HIGH))  in omap2_mcspi_setup_transfer()
962 		mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCTRL0, cs->chctrl0);  in omap2_mcspi_setup_transfer()
965 	/* set SPI mode 0..3 */  in omap2_mcspi_setup_transfer()
966 	if (spi->mode & SPI_CPOL)  in omap2_mcspi_setup_transfer()
970 	if (spi->mode & SPI_CPHA)  in omap2_mcspi_setup_transfer()
975 	mcspi_write_chconf0(spi, l);  in omap2_mcspi_setup_transfer()
977 	cs->mode = spi->mode;  in omap2_mcspi_setup_transfer()
979 	dev_dbg(&spi->dev, "setup: speed %d, sample %s edge, clk %s\n",  in omap2_mcspi_setup_transfer()
981 			(spi->mode & SPI_CPHA) ? "trailing" : "leading",  in omap2_mcspi_setup_transfer()
982 			(spi->mode & SPI_CPOL) ? "inverted" : "normal");  in omap2_mcspi_setup_transfer()
1040 static void omap2_mcspi_cleanup(struct spi_device *spi)  in omap2_mcspi_cleanup()  argument
1044 	if (spi->controller_state) {  in omap2_mcspi_cleanup()
1046 		cs = spi->controller_state;  in omap2_mcspi_cleanup()
1053 static int omap2_mcspi_setup(struct spi_device *spi)  in omap2_mcspi_setup()  argument
1057 	struct omap2_mcspi	*mcspi = spi_master_get_devdata(spi->master);  in omap2_mcspi_setup()
1059 	struct omap2_mcspi_cs	*cs = spi->controller_state;  in omap2_mcspi_setup()
1065 		cs->base = mcspi->base + spi->chip_select * 0x14;  in omap2_mcspi_setup()
1066 		cs->phys = mcspi->phys + spi->chip_select * 0x14;  in omap2_mcspi_setup()
1070 		spi->controller_state = cs;  in omap2_mcspi_setup()
1079 			omap2_mcspi_cleanup(spi);  in omap2_mcspi_setup()
1084 	ret = omap2_mcspi_setup_transfer(spi, NULL);  in omap2_mcspi_setup()
1086 		omap2_mcspi_cleanup(spi);  in omap2_mcspi_setup()
1125 				    struct spi_device *spi,  in omap2_mcspi_transfer_one()  argument
1145 	mcspi_dma = mcspi->dma_channels + spi->chip_select;  in omap2_mcspi_transfer_one()
1146 	cs = spi->controller_state;  in omap2_mcspi_transfer_one()
1147 	cd = spi->controller_data;  in omap2_mcspi_transfer_one()
1150 	 * The slave driver could have changed spi->mode in which case  in omap2_mcspi_transfer_one()
1156 	if (spi->mode != cs->mode)  in omap2_mcspi_transfer_one()
1159 	omap2_mcspi_set_enable(spi, 0);  in omap2_mcspi_transfer_one()
1161 	if (spi->cs_gpiod)  in omap2_mcspi_transfer_one()
1162 		omap2_mcspi_set_cs(spi, spi->mode & SPI_CS_HIGH);  in omap2_mcspi_transfer_one()
1165 	    (t->speed_hz != spi->max_speed_hz) ||  in omap2_mcspi_transfer_one()
1166 	    (t->bits_per_word != spi->bits_per_word)) {  in omap2_mcspi_transfer_one()
1168 		status = omap2_mcspi_setup_transfer(spi, t);  in omap2_mcspi_transfer_one()
1171 		if (t->speed_hz == spi->max_speed_hz &&  in omap2_mcspi_transfer_one()
1172 		    t->bits_per_word == spi->bits_per_word)  in omap2_mcspi_transfer_one()
1180 			mcspi_read_cs_reg(spi, OMAP2_MCSPI_MODULCTRL);  in omap2_mcspi_transfer_one()
1183 	chconf = mcspi_cached_chconf0(spi);  in omap2_mcspi_transfer_one()
1198 	mcspi_write_chconf0(spi, chconf);  in omap2_mcspi_transfer_one()
1205 		    master->can_dma(master, spi, t))  in omap2_mcspi_transfer_one()
1206 			omap2_mcspi_set_fifo(spi, t, 1);  in omap2_mcspi_transfer_one()
1208 		omap2_mcspi_set_enable(spi, 1);  in omap2_mcspi_transfer_one()
1217 		    master->can_dma(master, spi, t))  in omap2_mcspi_transfer_one()
1218 			count = omap2_mcspi_txrx_dma(spi, t);  in omap2_mcspi_transfer_one()
1220 			count = omap2_mcspi_txrx_pio(spi, t);  in omap2_mcspi_transfer_one()
1228 	omap2_mcspi_set_enable(spi, 0);  in omap2_mcspi_transfer_one()
1231 		omap2_mcspi_set_fifo(spi, t, 0);  in omap2_mcspi_transfer_one()
1237 		status = omap2_mcspi_setup_transfer(spi, NULL);  in omap2_mcspi_transfer_one()
1245 			mcspi_read_cs_reg(spi, OMAP2_MCSPI_MODULCTRL);  in omap2_mcspi_transfer_one()
1248 	omap2_mcspi_set_enable(spi, 0);  in omap2_mcspi_transfer_one()
1250 	if (spi->cs_gpiod)  in omap2_mcspi_transfer_one()
1251 		omap2_mcspi_set_cs(spi, !(spi->mode & SPI_CS_HIGH));  in omap2_mcspi_transfer_one()
1254 		omap2_mcspi_set_fifo(spi, t, 0);  in omap2_mcspi_transfer_one()
1272 		if (msg->spi->controller_state == cs)  in omap2_mcspi_prepare_message()
1287 				struct spi_device *spi,  in omap2_mcspi_can_dma()  argument
1290 	struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);  in omap2_mcspi_can_dma()
1292 		&mcspi->dma_channels[spi->chip_select];  in omap2_mcspi_can_dma()
1306 static size_t omap2_mcspi_max_xfer_size(struct spi_device *spi)  in omap2_mcspi_max_xfer_size()  argument
1308 	struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);  in omap2_mcspi_max_xfer_size()
1310 		&mcspi->dma_channels[spi->chip_select];  in omap2_mcspi_max_xfer_size()
1350  * When SPI wake up from off-mode, CS is in activate state. If it was in
1432 	if (of_property_read_bool(node, "spi-slave"))  in omap2_mcspi_probe()
1439 	/* the spi->mode bits understood by this driver: */  in omap2_mcspi_probe()
1465 		of_property_read_u32(node, "ti,spi-num-cs", &num_cs);  in omap2_mcspi_probe()