124 	u32 control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_enable()  local
126 	control |= CONTROL_ENABLE;  in mchp_corespi_enable()
128 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_enable()
133 	u32 control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_disable()  local
135 	control &= ~CONTROL_ENABLE;  in mchp_corespi_disable()
137 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_disable()
160 	u32 control, mask = INT_ENABLE_MASK;  in mchp_corespi_enable_ints()  local
164 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_enable_ints()
166 	control |= mask;  in mchp_corespi_enable_ints()
167 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_enable_ints()
169 	control |= CONTROL_ENABLE;  in mchp_corespi_enable_ints()
170 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_enable_ints()
175 	u32 control, mask = INT_ENABLE_MASK;  in mchp_corespi_disable_ints()  local
179 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_disable_ints()
180 	control &= ~mask;  in mchp_corespi_disable_ints()
181 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_disable_ints()
183 	control |= CONTROL_ENABLE;  in mchp_corespi_disable_ints()
184 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_disable_ints()
189 	u32 control;  in mchp_corespi_set_xfer_size()  local
199 	 * The lower 16 bits of the frame count are stored in the control reg  in mchp_corespi_set_xfer_size()
206 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_set_xfer_size()
207 	control &= ~CONTROL_FRAMECNT_MASK;  in mchp_corespi_set_xfer_size()
208 	control |= lenpart << CONTROL_FRAMECNT_SHIFT;  in mchp_corespi_set_xfer_size()
209 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_set_xfer_size()
214 	control |= CONTROL_ENABLE;  in mchp_corespi_set_xfer_size()
215 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_set_xfer_size()
238 	u32 control;  in mchp_corespi_set_framesize()  local
248 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_set_framesize()
249 	control |= CONTROL_ENABLE;  in mchp_corespi_set_framesize()
250 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_set_framesize()
272 	 * states during probe by adding them to the "control group" & thus  in mchp_corespi_setup()
286 	u32 control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_init()  local
288 	control |= CONTROL_MASTER;  in mchp_corespi_init()
290 	control &= ~CONTROL_MODE_MASK;  in mchp_corespi_init()
291 	control |= MOTOROLA_MODE;  in mchp_corespi_init()
307 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_init()
308 	control |= CONTROL_SPS | CONTROL_BIGFIFO;  in mchp_corespi_init()
310 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_init()
315 	 * It is required to enable direct mode, otherwise control over the chip  in mchp_corespi_init()
321 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_init()
323 	control &= ~CONTROL_RESET;  in mchp_corespi_init()
324 	control |= CONTROL_ENABLE;  in mchp_corespi_init()
326 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_init()
331 	u32 control;  in mchp_corespi_set_clk_gen()  local
335 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_set_clk_gen()
337 		control |= CONTROL_CLKMODE;  in mchp_corespi_set_clk_gen()
339 		control &= ~CONTROL_CLKMODE;  in mchp_corespi_set_clk_gen()
342 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_set_clk_gen()
343 	mchp_corespi_write(spi, REG_CONTROL, control | CONTROL_ENABLE);  in mchp_corespi_set_clk_gen()
348 	u32 control, mode_val;  in mchp_corespi_set_mode()  local
371 	control = mchp_corespi_read(spi, REG_CONTROL);  in mchp_corespi_set_mode()
372 	control &= ~(SPI_MODE_X_MASK << MODE_X_MASK_SHIFT);  in mchp_corespi_set_mode()
373 	control |= mode_val;  in mchp_corespi_set_mode()
375 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_set_mode()
377 	control |= CONTROL_ENABLE;  in mchp_corespi_set_mode()
378 	mchp_corespi_write(spi, REG_CONTROL, control);  in mchp_corespi_set_mode()