Lines Matching refs:REG_CONTROL
90 #define REG_CONTROL (0x00) macro
128 u32 control = readl_relaxed(qspi->regs + REG_CONTROL); in mchp_coreqspi_set_mode()
156 writel_relaxed(control, qspi->regs + REG_CONTROL); in mchp_coreqspi_set_mode()
168 control = readl_relaxed(qspi->regs + REG_CONTROL); in mchp_coreqspi_read_op()
175 writel_relaxed(control, qspi->regs + REG_CONTROL); in mchp_coreqspi_read_op()
187 writel_relaxed(control, qspi->regs + REG_CONTROL); in mchp_coreqspi_read_op()
201 control = readl_relaxed(qspi->regs + REG_CONTROL); in mchp_coreqspi_write_op()
203 writel_relaxed(control, qspi->regs + REG_CONTROL); in mchp_coreqspi_write_op()
215 writel_relaxed(control, qspi->regs + REG_CONTROL); in mchp_coreqspi_write_op()
285 control = readl_relaxed(qspi->regs + REG_CONTROL); in mchp_coreqspi_setup_clock()
287 writel_relaxed(control, qspi->regs + REG_CONTROL); in mchp_coreqspi_setup_clock()
288 control = readl_relaxed(qspi->regs + REG_CONTROL); in mchp_coreqspi_setup_clock()
295 writel_relaxed(control, qspi->regs + REG_CONTROL); in mchp_coreqspi_setup_clock()
304 u32 control = readl_relaxed(qspi->regs + REG_CONTROL); in mchp_coreqspi_setup_op()
308 writel_relaxed(control, qspi->regs + REG_CONTROL); in mchp_coreqspi_setup_op()
359 ctrl = readl_relaxed(qspi->regs + REG_CONTROL); in mchp_coreqspi_config_op()
572 u32 control = readl_relaxed(qspi->regs + REG_CONTROL); in mchp_coreqspi_remove()
576 writel_relaxed(control, qspi->regs + REG_CONTROL); in mchp_coreqspi_remove()