2  * Broadcom BCM63XX High Speed SPI Controller driver
4  * Copyright 2000-2010 Broadcom Corporation
5  * Copyright 2012-2013 Jonas Gorski <jogo@openwrt.org>
17 #include <linux/dma-mapping.h>
20 #include <linux/spi/spi.h>
98 #define HSSPI_BUS_NUM				1 /* 0 is legacy SPI */
114 static void bcm63xx_hsspi_set_cs(struct bcm63xx_hsspi *bs, unsigned int cs,  in bcm63xx_hsspi_set_cs()  argument
119 	mutex_lock(&bs->bus_mutex);  in bcm63xx_hsspi_set_cs()
120 	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_set_cs()
122 	reg &= ~BIT(cs);  in bcm63xx_hsspi_set_cs()
123 	if (active == !(bs->cs_polarity & BIT(cs)))  in bcm63xx_hsspi_set_cs()
124 		reg |= BIT(cs);  in bcm63xx_hsspi_set_cs()
126 	__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_set_cs()
127 	mutex_unlock(&bs->bus_mutex);  in bcm63xx_hsspi_set_cs()
131 				  struct spi_device *spi, int hz)  in bcm63xx_hsspi_set_clk()  argument
133 	unsigned int profile = spi->chip_select;  in bcm63xx_hsspi_set_clk()
136 	reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz));  in bcm63xx_hsspi_set_clk()
138 		     bs->regs + HSSPI_PROFILE_CLK_CTRL_REG(profile));  in bcm63xx_hsspi_set_clk()
140 	reg = __raw_readl(bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));  in bcm63xx_hsspi_set_clk()
145 	__raw_writel(reg, bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));  in bcm63xx_hsspi_set_clk()
147 	mutex_lock(&bs->bus_mutex);  in bcm63xx_hsspi_set_clk()
149 	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_set_clk()
151 	if (spi->mode & SPI_CPOL)  in bcm63xx_hsspi_set_clk()
153 	__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_set_clk()
154 	mutex_unlock(&bs->bus_mutex);  in bcm63xx_hsspi_set_clk()
157 static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t)  in bcm63xx_hsspi_do_txrx()  argument
159 	struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master);  in bcm63xx_hsspi_do_txrx()
160 	unsigned int chip_select = spi->chip_select;  in bcm63xx_hsspi_do_txrx()
162 	int pending = t->len;  in bcm63xx_hsspi_do_txrx()
164 	const u8 *tx = t->tx_buf;  in bcm63xx_hsspi_do_txrx()
165 	u8 *rx = t->rx_buf;  in bcm63xx_hsspi_do_txrx()
167 	bcm63xx_hsspi_set_clk(bs, spi, t->speed_hz);  in bcm63xx_hsspi_do_txrx()
168 	bcm63xx_hsspi_set_cs(bs, spi->chip_select, true);  in bcm63xx_hsspi_do_txrx()
178 		step_size -= HSSPI_OPCODE_LEN;  in bcm63xx_hsspi_do_txrx()
180 	if ((opcode == HSSPI_OP_READ && t->rx_nbits == SPI_NBITS_DUAL) ||  in bcm63xx_hsspi_do_txrx()
181 	    (opcode == HSSPI_OP_WRITE && t->tx_nbits == SPI_NBITS_DUAL))  in bcm63xx_hsspi_do_txrx()
186 		     bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select));  in bcm63xx_hsspi_do_txrx()
191 		reinit_completion(&bs->done);  in bcm63xx_hsspi_do_txrx()
193 			memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step);  in bcm63xx_hsspi_do_txrx()
197 		__raw_writew(opcode | curr_step, bs->fifo);  in bcm63xx_hsspi_do_txrx()
201 			     bs->regs + HSSPI_INT_MASK_REG);  in bcm63xx_hsspi_do_txrx()
207 			     bs->regs + HSSPI_PINGPONG_COMMAND_REG(0));  in bcm63xx_hsspi_do_txrx()
209 		if (wait_for_completion_timeout(&bs->done, HZ) == 0) {  in bcm63xx_hsspi_do_txrx()
210 			dev_err(&bs->pdev->dev, "transfer timed out!\n");  in bcm63xx_hsspi_do_txrx()
211 			return -ETIMEDOUT;  in bcm63xx_hsspi_do_txrx()
215 			memcpy_fromio(rx, bs->fifo, curr_step);  in bcm63xx_hsspi_do_txrx()
219 		pending -= curr_step;  in bcm63xx_hsspi_do_txrx()
225 static int bcm63xx_hsspi_setup(struct spi_device *spi)  in bcm63xx_hsspi_setup()  argument
227 	struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master);  in bcm63xx_hsspi_setup()
230 	reg = __raw_readl(bs->regs +  in bcm63xx_hsspi_setup()
231 			  HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select));  in bcm63xx_hsspi_setup()
233 	if (spi->mode & SPI_CPHA)  in bcm63xx_hsspi_setup()
237 	__raw_writel(reg, bs->regs +  in bcm63xx_hsspi_setup()
238 		     HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select));  in bcm63xx_hsspi_setup()
240 	mutex_lock(&bs->bus_mutex);  in bcm63xx_hsspi_setup()
241 	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_setup()
244 	if ((reg & GLOBAL_CTRL_CS_POLARITY_MASK) == bs->cs_polarity) {  in bcm63xx_hsspi_setup()
245 		if (spi->mode & SPI_CS_HIGH)  in bcm63xx_hsspi_setup()
246 			reg |= BIT(spi->chip_select);  in bcm63xx_hsspi_setup()
248 			reg &= ~BIT(spi->chip_select);  in bcm63xx_hsspi_setup()
249 		__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_setup()
252 	if (spi->mode & SPI_CS_HIGH)  in bcm63xx_hsspi_setup()
253 		bs->cs_polarity |= BIT(spi->chip_select);  in bcm63xx_hsspi_setup()
255 		bs->cs_polarity &= ~BIT(spi->chip_select);  in bcm63xx_hsspi_setup()
257 	mutex_unlock(&bs->bus_mutex);  in bcm63xx_hsspi_setup()
267 	struct spi_device *spi = msg->spi;  in bcm63xx_hsspi_transfer_one()  local
268 	int status = -EINVAL;  in bcm63xx_hsspi_transfer_one()
272 	/* This controller does not support keeping CS active during idle.  in bcm63xx_hsspi_transfer_one()
280 	 *    the multiplexed nature of SPI the actual target will receive  in bcm63xx_hsspi_transfer_one()
286 	dummy_cs = !spi->chip_select;  in bcm63xx_hsspi_transfer_one()
289 	list_for_each_entry(t, &msg->transfers, transfer_list) {  in bcm63xx_hsspi_transfer_one()
290 		status = bcm63xx_hsspi_do_txrx(spi, t);  in bcm63xx_hsspi_transfer_one()
294 		msg->actual_length += t->len;  in bcm63xx_hsspi_transfer_one()
298 		if (t->cs_change)  in bcm63xx_hsspi_transfer_one()
299 			bcm63xx_hsspi_set_cs(bs, spi->chip_select, false);  in bcm63xx_hsspi_transfer_one()
302 	mutex_lock(&bs->bus_mutex);  in bcm63xx_hsspi_transfer_one()
303 	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_transfer_one()
305 	reg |= bs->cs_polarity;  in bcm63xx_hsspi_transfer_one()
306 	__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_transfer_one()
307 	mutex_unlock(&bs->bus_mutex);  in bcm63xx_hsspi_transfer_one()
309 	msg->status = status;  in bcm63xx_hsspi_transfer_one()
319 	if (__raw_readl(bs->regs + HSSPI_INT_STATUS_MASKED_REG) == 0)  in bcm63xx_hsspi_interrupt()
322 	__raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);  in bcm63xx_hsspi_interrupt()
323 	__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);  in bcm63xx_hsspi_interrupt()
325 	complete(&bs->done);  in bcm63xx_hsspi_interrupt()
335 	struct device *dev = &pdev->dev;  in bcm63xx_hsspi_probe()
383 			ret = -EINVAL;  in bcm63xx_hsspi_probe()
388 	master = spi_alloc_master(&pdev->dev, sizeof(*bs));  in bcm63xx_hsspi_probe()
390 		ret = -ENOMEM;  in bcm63xx_hsspi_probe()
395 	bs->pdev = pdev;  in bcm63xx_hsspi_probe()
396 	bs->clk = clk;  in bcm63xx_hsspi_probe()
397 	bs->pll_clk = pll_clk;  in bcm63xx_hsspi_probe()
398 	bs->regs = regs;  in bcm63xx_hsspi_probe()
399 	bs->speed_hz = rate;  in bcm63xx_hsspi_probe()
400 	bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0));  in bcm63xx_hsspi_probe()
402 	mutex_init(&bs->bus_mutex);  in bcm63xx_hsspi_probe()
403 	init_completion(&bs->done);  in bcm63xx_hsspi_probe()
405 	master->dev.of_node = dev->of_node;  in bcm63xx_hsspi_probe()
406 	if (!dev->of_node)  in bcm63xx_hsspi_probe()
407 		master->bus_num = HSSPI_BUS_NUM;  in bcm63xx_hsspi_probe()
409 	of_property_read_u32(dev->of_node, "num-cs", &num_cs);  in bcm63xx_hsspi_probe()
411 		dev_warn(dev, "unsupported number of cs (%i), reducing to 8\n",  in bcm63xx_hsspi_probe()
415 	master->num_chipselect = num_cs;  in bcm63xx_hsspi_probe()
416 	master->setup = bcm63xx_hsspi_setup;  in bcm63xx_hsspi_probe()
417 	master->transfer_one_message = bcm63xx_hsspi_transfer_one;  in bcm63xx_hsspi_probe()
418 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |  in bcm63xx_hsspi_probe()
420 	master->bits_per_word_mask = SPI_BPW_MASK(8);  in bcm63xx_hsspi_probe()
421 	master->auto_runtime_pm = true;  in bcm63xx_hsspi_probe()
426 	__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);  in bcm63xx_hsspi_probe()
429 	__raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);  in bcm63xx_hsspi_probe()
431 	/* read out default CS polarities */  in bcm63xx_hsspi_probe()
432 	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_probe()
433 	bs->cs_polarity = reg & GLOBAL_CTRL_CS_POLARITY_MASK;  in bcm63xx_hsspi_probe()
435 		     bs->regs + HSSPI_GLOBAL_CTRL_REG);  in bcm63xx_hsspi_probe()
438 			       pdev->name, bs);  in bcm63xx_hsspi_probe()
443 	pm_runtime_enable(&pdev->dev);  in bcm63xx_hsspi_probe()
453 	pm_runtime_disable(&pdev->dev);  in bcm63xx_hsspi_probe()
470 	__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);  in bcm63xx_hsspi_remove()
471 	clk_disable_unprepare(bs->pll_clk);  in bcm63xx_hsspi_remove()
472 	clk_disable_unprepare(bs->clk);  in bcm63xx_hsspi_remove()
484 	clk_disable_unprepare(bs->pll_clk);  in bcm63xx_hsspi_suspend()
485 	clk_disable_unprepare(bs->clk);  in bcm63xx_hsspi_suspend()
496 	ret = clk_prepare_enable(bs->clk);  in bcm63xx_hsspi_resume()
500 	if (bs->pll_clk) {  in bcm63xx_hsspi_resume()
501 		ret = clk_prepare_enable(bs->pll_clk);  in bcm63xx_hsspi_resume()
503 			clk_disable_unprepare(bs->clk);  in bcm63xx_hsspi_resume()
518 	{ .compatible = "brcm,bcm6328-hsspi", },
525 		.name	= "bcm63xx-hsspi",
536 MODULE_DESCRIPTION("Broadcom BCM63xx High Speed SPI Controller driver");