Lines Matching +full:spi +full:- +full:clk
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Marvell Armada-3700 SPI controller driver
8 * Author: Romain Perier <romain.perier@free-electrons.com>
11 #include <linux/clk.h>
23 #include <linux/spi/spi.h>
31 /* SPI Register Offest */
105 struct clk *clk; member
119 return readl(a3700_spi->base + offset); in spireg_read()
124 writel(data, a3700_spi->base + offset); in spireg_write()
172 /* RX during address reception uses 4-pin */ in a3700_spi_pin_mode_set()
177 dev_err(&a3700_spi->master->dev, "wrong pin mode %u", pin_mode); in a3700_spi_pin_mode_set()
178 return -EINVAL; in a3700_spi_pin_mode_set()
224 prescale = DIV_ROUND_UP(clk_get_rate(a3700_spi->clk), speed_hz); in a3700_spi_clock_set()
257 a3700_spi->byte_len = len; in a3700_spi_bytelen_set()
269 while (--timeout) { in a3700_spi_fifo_flush()
276 return -ETIMEDOUT; in a3700_spi_fifo_flush()
281 struct spi_master *master = a3700_spi->master; in a3700_spi_init()
285 /* Reset SPI unit */ in a3700_spi_init()
296 /* Disable AUTO_CS and deactivate all chip-selects */ in a3700_spi_init()
298 for (i = 0; i < master->num_chipselect; i++) in a3700_spi_init()
304 /* Set SPI mode */ in a3700_spi_init()
305 a3700_spi_mode_set(a3700_spi, master->mode_bits); in a3700_spi_init()
327 if (!cause || !(a3700_spi->wait_mask & cause)) in a3700_spi_interrupt()
330 /* mask and acknowledge the SPI interrupts */ in a3700_spi_interrupt()
335 complete(&a3700_spi->done); in a3700_spi_interrupt()
340 static bool a3700_spi_wait_completion(struct spi_device *spi) in a3700_spi_wait_completion() argument
347 a3700_spi = spi_master_get_devdata(spi->master); in a3700_spi_wait_completion()
349 /* SPI interrupt is edge-triggered, which means an interrupt will in a3700_spi_wait_completion()
356 if (a3700_spi->wait_mask & ctrl_reg) in a3700_spi_wait_completion()
359 reinit_completion(&a3700_spi->done); in a3700_spi_wait_completion()
362 a3700_spi->wait_mask); in a3700_spi_wait_completion()
365 timeout = wait_for_completion_timeout(&a3700_spi->done, in a3700_spi_wait_completion()
368 a3700_spi->wait_mask = 0; in a3700_spi_wait_completion()
382 if (a3700_spi->wait_mask & ctrl_reg) in a3700_spi_wait_completion()
391 static bool a3700_spi_transfer_wait(struct spi_device *spi, in a3700_spi_transfer_wait() argument
396 a3700_spi = spi_master_get_devdata(spi->master); in a3700_spi_transfer_wait()
397 a3700_spi->wait_mask = bit_mask; in a3700_spi_transfer_wait()
399 return a3700_spi_wait_completion(spi); in a3700_spi_transfer_wait()
409 val |= (bytes - 1) << A3700_SPI_RFIFO_THRS_BIT; in a3700_spi_fifo_thres_set()
411 val |= (7 - bytes) << A3700_SPI_WFIFO_THRS_BIT; in a3700_spi_fifo_thres_set()
415 static void a3700_spi_transfer_setup(struct spi_device *spi, in a3700_spi_transfer_setup() argument
420 a3700_spi = spi_master_get_devdata(spi->master); in a3700_spi_transfer_setup()
422 a3700_spi_clock_set(a3700_spi, xfer->speed_hz); in a3700_spi_transfer_setup()
425 * with the remaining bytes for non 4-bytes aligned transfers. in a3700_spi_transfer_setup()
430 a3700_spi->tx_buf = xfer->tx_buf; in a3700_spi_transfer_setup()
431 a3700_spi->rx_buf = xfer->rx_buf; in a3700_spi_transfer_setup()
432 a3700_spi->buf_len = xfer->len; in a3700_spi_transfer_setup()
435 static void a3700_spi_set_cs(struct spi_device *spi, bool enable) in a3700_spi_set_cs() argument
437 struct a3700_spi *a3700_spi = spi_master_get_devdata(spi->master); in a3700_spi_set_cs()
440 a3700_spi_activate_cs(a3700_spi, spi->chip_select); in a3700_spi_set_cs()
442 a3700_spi_deactivate_cs(a3700_spi, spi->chip_select); in a3700_spi_set_cs()
457 if (a3700_spi->tx_buf) { in a3700_spi_header_set()
460 * bytes out of SPI output register, since it always shifts out in a3700_spi_header_set()
462 * some devices. To avoid that, use SPI header count feature to in a3700_spi_header_set()
464 * of data 4-byte aligned. in a3700_spi_header_set()
466 addr_cnt = a3700_spi->buf_len % 4; in a3700_spi_header_set()
473 a3700_spi->buf_len -= addr_cnt; in a3700_spi_header_set()
477 while (addr_cnt--) { in a3700_spi_header_set()
478 val = (val << 8) | a3700_spi->tx_buf[0]; in a3700_spi_header_set()
479 a3700_spi->tx_buf++; in a3700_spi_header_set()
498 while (!a3700_is_wfifo_full(a3700_spi) && a3700_spi->buf_len) { in a3700_spi_fifo_write()
499 val = *(u32 *)a3700_spi->tx_buf; in a3700_spi_fifo_write()
501 a3700_spi->buf_len -= 4; in a3700_spi_fifo_write()
502 a3700_spi->tx_buf += 4; in a3700_spi_fifo_write()
519 while (!a3700_is_rfifo_empty(a3700_spi) && a3700_spi->buf_len) { in a3700_spi_fifo_read()
521 if (a3700_spi->buf_len >= 4) { in a3700_spi_fifo_read()
523 memcpy(a3700_spi->rx_buf, &val, 4); in a3700_spi_fifo_read()
525 a3700_spi->buf_len -= 4; in a3700_spi_fifo_read()
526 a3700_spi->rx_buf += 4; in a3700_spi_fifo_read()
533 while (a3700_spi->buf_len) { in a3700_spi_fifo_read()
534 *a3700_spi->rx_buf = val & 0xff; in a3700_spi_fifo_read()
537 a3700_spi->buf_len--; in a3700_spi_fifo_read()
538 a3700_spi->rx_buf++; in a3700_spi_fifo_read()
555 while (--timeout) { in a3700_spi_transfer_abort_fifo()
572 struct spi_device *spi = message->spi; in a3700_spi_prepare_message() local
575 ret = clk_enable(a3700_spi->clk); in a3700_spi_prepare_message()
577 dev_err(&spi->dev, "failed to enable clk with error %d\n", ret); in a3700_spi_prepare_message()
586 a3700_spi_mode_set(a3700_spi, spi->mode); in a3700_spi_prepare_message()
592 struct spi_device *spi, in a3700_spi_transfer_one_fifo() argument
604 byte_len = xfer->bits_per_word >> 3; in a3700_spi_transfer_one_fifo()
607 if (xfer->tx_buf) in a3700_spi_transfer_one_fifo()
608 nbits = xfer->tx_nbits; in a3700_spi_transfer_one_fifo()
609 else if (xfer->rx_buf) in a3700_spi_transfer_one_fifo()
610 nbits = xfer->rx_nbits; in a3700_spi_transfer_one_fifo()
612 a3700_spi_pin_mode_set(a3700_spi, nbits, xfer->rx_buf ? true : false); in a3700_spi_transfer_one_fifo()
617 /* Transfer first bytes of data when buffer is not 4-byte aligned */ in a3700_spi_transfer_one_fifo()
620 if (xfer->rx_buf) { in a3700_spi_transfer_one_fifo()
628 a3700_spi->buf_len); in a3700_spi_transfer_one_fifo()
634 } else if (xfer->tx_buf) { in a3700_spi_transfer_one_fifo()
641 * If there are data to be written to the SPI device, xmit_data in a3700_spi_transfer_one_fifo()
643 * not require data to be written to the SPI device, then in a3700_spi_transfer_one_fifo()
646 a3700_spi->xmit_data = (a3700_spi->buf_len != 0); in a3700_spi_transfer_one_fifo()
649 while (a3700_spi->buf_len) { in a3700_spi_transfer_one_fifo()
650 if (a3700_spi->tx_buf) { in a3700_spi_transfer_one_fifo()
652 if (!a3700_spi_transfer_wait(spi, in a3700_spi_transfer_one_fifo()
654 dev_err(&spi->dev, in a3700_spi_transfer_one_fifo()
656 ret = -ETIMEDOUT; in a3700_spi_transfer_one_fifo()
663 } else if (a3700_spi->rx_buf) { in a3700_spi_transfer_one_fifo()
665 if (!a3700_spi_transfer_wait(spi, in a3700_spi_transfer_one_fifo()
667 dev_err(&spi->dev, in a3700_spi_transfer_one_fifo()
669 ret = -ETIMEDOUT; in a3700_spi_transfer_one_fifo()
681 * - wait all the bytes in wfifo to be shifted out in a3700_spi_transfer_one_fifo()
682 * - set XFER_STOP bit in a3700_spi_transfer_one_fifo()
683 * - wait XFER_START bit clear in a3700_spi_transfer_one_fifo()
684 * - clear XFER_STOP bit in a3700_spi_transfer_one_fifo()
686 * - the hardware is to reset the XFER_START bit in a3700_spi_transfer_one_fifo()
689 * - just wait XFER_START bit clear in a3700_spi_transfer_one_fifo()
691 if (a3700_spi->tx_buf) { in a3700_spi_transfer_one_fifo()
692 if (a3700_spi->xmit_data) { in a3700_spi_transfer_one_fifo()
694 * If there are data written to the SPI device, wait in a3700_spi_transfer_one_fifo()
698 if (!a3700_spi_transfer_wait(spi, in a3700_spi_transfer_one_fifo()
700 dev_err(&spi->dev, "wait wfifo empty timed out\n"); in a3700_spi_transfer_one_fifo()
701 return -ETIMEDOUT; in a3700_spi_transfer_one_fifo()
705 if (!a3700_spi_transfer_wait(spi, A3700_SPI_XFER_RDY)) { in a3700_spi_transfer_one_fifo()
706 dev_err(&spi->dev, "wait xfer ready timed out\n"); in a3700_spi_transfer_one_fifo()
707 return -ETIMEDOUT; in a3700_spi_transfer_one_fifo()
715 while (--timeout) { in a3700_spi_transfer_one_fifo()
723 dev_err(&spi->dev, "wait transfer start clear timed out\n"); in a3700_spi_transfer_one_fifo()
724 ret = -ETIMEDOUT; in a3700_spi_transfer_one_fifo()
741 struct spi_device *spi, in a3700_spi_transfer_one_full_duplex() argument
750 while (a3700_spi->buf_len) { in a3700_spi_transfer_one_full_duplex()
755 if (a3700_spi->buf_len < 4) in a3700_spi_transfer_one_full_duplex()
758 if (a3700_spi->byte_len == 1) in a3700_spi_transfer_one_full_duplex()
759 val = *a3700_spi->tx_buf; in a3700_spi_transfer_one_full_duplex()
761 val = *(u32 *)a3700_spi->tx_buf; in a3700_spi_transfer_one_full_duplex()
772 memcpy(a3700_spi->rx_buf, &val, a3700_spi->byte_len); in a3700_spi_transfer_one_full_duplex()
774 a3700_spi->buf_len -= a3700_spi->byte_len; in a3700_spi_transfer_one_full_duplex()
775 a3700_spi->tx_buf += a3700_spi->byte_len; in a3700_spi_transfer_one_full_duplex()
776 a3700_spi->rx_buf += a3700_spi->byte_len; in a3700_spi_transfer_one_full_duplex()
786 struct spi_device *spi, in a3700_spi_transfer_one() argument
789 a3700_spi_transfer_setup(spi, xfer); in a3700_spi_transfer_one()
791 if (xfer->tx_buf && xfer->rx_buf) in a3700_spi_transfer_one()
792 return a3700_spi_transfer_one_full_duplex(master, spi, xfer); in a3700_spi_transfer_one()
794 return a3700_spi_transfer_one_fifo(master, spi, xfer); in a3700_spi_transfer_one()
802 clk_disable(a3700_spi->clk); in a3700_spi_unprepare_message()
808 { .compatible = "marvell,armada-3700-spi", .data = NULL },
816 struct device *dev = &pdev->dev; in a3700_spi_probe()
817 struct device_node *of_node = dev->of_node; in a3700_spi_probe()
819 struct a3700_spi *spi; in a3700_spi_probe() local
823 master = spi_alloc_master(dev, sizeof(*spi)); in a3700_spi_probe()
826 ret = -ENOMEM; in a3700_spi_probe()
830 if (of_property_read_u32(of_node, "num-cs", &num_cs)) { in a3700_spi_probe()
831 dev_err(dev, "could not find num-cs\n"); in a3700_spi_probe()
832 ret = -ENXIO; in a3700_spi_probe()
836 master->bus_num = pdev->id; in a3700_spi_probe()
837 master->dev.of_node = of_node; in a3700_spi_probe()
838 master->mode_bits = SPI_MODE_3; in a3700_spi_probe()
839 master->num_chipselect = num_cs; in a3700_spi_probe()
840 master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(32); in a3700_spi_probe()
841 master->prepare_message = a3700_spi_prepare_message; in a3700_spi_probe()
842 master->transfer_one = a3700_spi_transfer_one; in a3700_spi_probe()
843 master->unprepare_message = a3700_spi_unprepare_message; in a3700_spi_probe()
844 master->set_cs = a3700_spi_set_cs; in a3700_spi_probe()
845 master->mode_bits |= (SPI_RX_DUAL | SPI_TX_DUAL | in a3700_spi_probe()
850 spi = spi_master_get_devdata(master); in a3700_spi_probe()
852 spi->master = master; in a3700_spi_probe()
854 spi->base = devm_platform_ioremap_resource(pdev, 0); in a3700_spi_probe()
855 if (IS_ERR(spi->base)) { in a3700_spi_probe()
856 ret = PTR_ERR(spi->base); in a3700_spi_probe()
862 ret = -ENXIO; in a3700_spi_probe()
865 spi->irq = irq; in a3700_spi_probe()
867 init_completion(&spi->done); in a3700_spi_probe()
869 spi->clk = devm_clk_get(dev, NULL); in a3700_spi_probe()
870 if (IS_ERR(spi->clk)) { in a3700_spi_probe()
871 dev_err(dev, "could not find clk: %ld\n", PTR_ERR(spi->clk)); in a3700_spi_probe()
875 ret = clk_prepare(spi->clk); in a3700_spi_probe()
877 dev_err(dev, "could not prepare clk: %d\n", ret); in a3700_spi_probe()
881 master->max_speed_hz = min_t(unsigned long, A3700_SPI_MAX_SPEED_HZ, in a3700_spi_probe()
882 clk_get_rate(spi->clk)); in a3700_spi_probe()
883 master->min_speed_hz = DIV_ROUND_UP(clk_get_rate(spi->clk), in a3700_spi_probe()
886 a3700_spi_init(spi); in a3700_spi_probe()
888 ret = devm_request_irq(dev, spi->irq, a3700_spi_interrupt, 0, in a3700_spi_probe()
904 clk_unprepare(spi->clk); in a3700_spi_probe()
914 struct a3700_spi *spi = spi_master_get_devdata(master); in a3700_spi_remove() local
916 clk_unprepare(spi->clk); in a3700_spi_remove()
932 MODULE_DESCRIPTION("Armada-3700 SPI driver");