92 struct amd_spi {  struct
98 static inline u8 amd_spi_readreg8(struct amd_spi *amd_spi, int idx)  in amd_spi_readreg8()  argument
100 	return ioread8((u8 __iomem *)amd_spi->io_remap_addr + idx);  in amd_spi_readreg8()
103 static inline void amd_spi_writereg8(struct amd_spi *amd_spi, int idx, u8 val)  in amd_spi_writereg8()  argument
105 	iowrite8(val, ((u8 __iomem *)amd_spi->io_remap_addr + idx));  in amd_spi_writereg8()
108 static void amd_spi_setclear_reg8(struct amd_spi *amd_spi, int idx, u8 set, u8 clear)  in amd_spi_setclear_reg8()  argument
110 	u8 tmp = amd_spi_readreg8(amd_spi, idx);  in amd_spi_setclear_reg8()
113 	amd_spi_writereg8(amd_spi, idx, tmp);  in amd_spi_setclear_reg8()
116 static inline u32 amd_spi_readreg32(struct amd_spi *amd_spi, int idx)  in amd_spi_readreg32()  argument
118 	return ioread32((u8 __iomem *)amd_spi->io_remap_addr + idx);  in amd_spi_readreg32()
121 static inline void amd_spi_writereg32(struct amd_spi *amd_spi, int idx, u32 val)  in amd_spi_writereg32()  argument
123 	iowrite32(val, ((u8 __iomem *)amd_spi->io_remap_addr + idx));  in amd_spi_writereg32()
126 static inline void amd_spi_setclear_reg32(struct amd_spi *amd_spi, int idx, u32 set, u32 clear)  in amd_spi_setclear_reg32()  argument
128 	u32 tmp = amd_spi_readreg32(amd_spi, idx);  in amd_spi_setclear_reg32()
131 	amd_spi_writereg32(amd_spi, idx, tmp);  in amd_spi_setclear_reg32()
134 static void amd_spi_select_chip(struct amd_spi *amd_spi, u8 cs)  in amd_spi_select_chip()  argument
136 	amd_spi_setclear_reg8(amd_spi, AMD_SPI_ALT_CS_REG, cs, AMD_SPI_ALT_CS_MASK);  in amd_spi_select_chip()
139 static inline void amd_spi_clear_chip(struct amd_spi *amd_spi, u8 chip_select)  in amd_spi_clear_chip()  argument
141 	amd_spi_writereg8(amd_spi, AMD_SPI_ALT_CS_REG, chip_select & ~AMD_SPI_ALT_CS_MASK);  in amd_spi_clear_chip()
144 static void amd_spi_clear_fifo_ptr(struct amd_spi *amd_spi)  in amd_spi_clear_fifo_ptr()  argument
146 	amd_spi_setclear_reg32(amd_spi, AMD_SPI_CTRL0_REG, AMD_SPI_FIFO_CLEAR, AMD_SPI_FIFO_CLEAR);  in amd_spi_clear_fifo_ptr()
149 static int amd_spi_set_opcode(struct amd_spi *amd_spi, u8 cmd_opcode)  in amd_spi_set_opcode()  argument
151 	switch (amd_spi->version) {  in amd_spi_set_opcode()
153 		amd_spi_setclear_reg32(amd_spi, AMD_SPI_CTRL0_REG, cmd_opcode,  in amd_spi_set_opcode()
157 		amd_spi_writereg8(amd_spi, AMD_SPI_OPCODE_REG, cmd_opcode);  in amd_spi_set_opcode()
164 static inline void amd_spi_set_rx_count(struct amd_spi *amd_spi, u8 rx_count)  in amd_spi_set_rx_count()  argument
166 	amd_spi_setclear_reg8(amd_spi, AMD_SPI_RX_COUNT_REG, rx_count, 0xff);  in amd_spi_set_rx_count()
169 static inline void amd_spi_set_tx_count(struct amd_spi *amd_spi, u8 tx_count)  in amd_spi_set_tx_count()  argument
171 	amd_spi_setclear_reg8(amd_spi, AMD_SPI_TX_COUNT_REG, tx_count, 0xff);  in amd_spi_set_tx_count()
174 static int amd_spi_busy_wait(struct amd_spi *amd_spi)  in amd_spi_busy_wait()  argument
179 	switch (amd_spi->version) {  in amd_spi_busy_wait()
190 	return readl_poll_timeout(amd_spi->io_remap_addr + reg, val,  in amd_spi_busy_wait()
194 static int amd_spi_execute_opcode(struct amd_spi *amd_spi)  in amd_spi_execute_opcode()  argument
198 	ret = amd_spi_busy_wait(amd_spi);  in amd_spi_execute_opcode()
202 	switch (amd_spi->version) {  in amd_spi_execute_opcode()
205 		amd_spi_setclear_reg32(amd_spi, AMD_SPI_CTRL0_REG, AMD_SPI_EXEC_CMD,  in amd_spi_execute_opcode()
210 		amd_spi_setclear_reg8(amd_spi, AMD_SPI_CMD_TRIGGER_REG,  in amd_spi_execute_opcode()
220 	struct amd_spi *amd_spi = spi_master_get_devdata(spi->master);  in amd_spi_master_setup()  local
222 	amd_spi_clear_fifo_ptr(amd_spi);  in amd_spi_master_setup()
239 static int amd_set_spi_freq(struct amd_spi *amd_spi, u32 speed_hz)  in amd_set_spi_freq()  argument
250 	if (amd_spi->speed_hz == amd_spi_freq[i].speed_hz)  in amd_set_spi_freq()
253 	amd_spi->speed_hz = amd_spi_freq[i].speed_hz;  in amd_set_spi_freq()
257 	amd_spi_setclear_reg32(amd_spi, AMD_SPI_ENA_REG, alt_spd,  in amd_set_spi_freq()
260 	if (amd_spi->speed_hz == AMD_SPI_MAX_HZ)  in amd_set_spi_freq()
261 		amd_spi_setclear_reg32(amd_spi, AMD_SPI_ENA_REG, 1,  in amd_set_spi_freq()
267 		amd_spi_setclear_reg32(amd_spi, AMD_SPI_SPEED_REG, spd7_val,  in amd_set_spi_freq()
274 static inline int amd_spi_fifo_xfer(struct amd_spi *amd_spi,  in amd_spi_fifo_xfer()  argument
288 			amd_set_spi_freq(amd_spi, xfer->speed_hz);  in amd_spi_fifo_xfer()
290 			amd_set_spi_freq(amd_spi, spi->max_speed_hz);  in amd_spi_fifo_xfer()
303 				amd_spi_writereg8(amd_spi, fifo_pos + i, buf[i]);  in amd_spi_fifo_xfer()
318 	amd_spi_set_opcode(amd_spi, cmd_opcode);  in amd_spi_fifo_xfer()
319 	amd_spi_set_tx_count(amd_spi, tx_len);  in amd_spi_fifo_xfer()
320 	amd_spi_set_rx_count(amd_spi, rx_len);  in amd_spi_fifo_xfer()
323 	message->status = amd_spi_execute_opcode(amd_spi);  in amd_spi_fifo_xfer()
328 		message->status = amd_spi_busy_wait(amd_spi);  in amd_spi_fifo_xfer()
337 					buf[i] = amd_spi_readreg8(amd_spi, fifo_pos + i);  in amd_spi_fifo_xfer()
346 	switch (amd_spi->version) {  in amd_spi_fifo_xfer()
350 		amd_spi_clear_chip(amd_spi, message->spi->chip_select);  in amd_spi_fifo_xfer()
364 	struct amd_spi *amd_spi = spi_master_get_devdata(master);  in amd_spi_master_transfer()  local
367 	amd_spi_select_chip(amd_spi, spi->chip_select);  in amd_spi_master_transfer()
373 	return amd_spi_fifo_xfer(amd_spi, master, msg);  in amd_spi_master_transfer()
385 	struct amd_spi *amd_spi;  in amd_spi_probe()  local
389 	master = devm_spi_alloc_master(dev, sizeof(struct amd_spi));  in amd_spi_probe()
393 	amd_spi = spi_master_get_devdata(master);  in amd_spi_probe()
394 	amd_spi->io_remap_addr = devm_platform_ioremap_resource(pdev, 0);  in amd_spi_probe()
395 	if (IS_ERR(amd_spi->io_remap_addr))  in amd_spi_probe()
396 		return dev_err_probe(dev, PTR_ERR(amd_spi->io_remap_addr),  in amd_spi_probe()
399 	dev_dbg(dev, "io_remap_address: %p\n", amd_spi->io_remap_addr);  in amd_spi_probe()
401 	amd_spi->version = (enum amd_spi_versions) device_get_match_data(dev);  in amd_spi_probe()