Lines Matching full:pmc
3 * drivers/soc/tegra/pmc.c
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
52 #include <soc/tegra/pmc.h>
59 #include <dt-bindings/soc/tegra-pmc.h>
189 /* for secure PMC */
261 struct tegra_pmc *pmc; member
351 void (*init)(struct tegra_pmc *pmc);
352 void (*setup_irq_polarity)(struct tegra_pmc *pmc,
357 int (*powergate_set)(struct tegra_pmc *pmc, unsigned int id,
381 * struct tegra_pmc - NVIDIA Tegra PMC
382 * @dev: pointer to PMC device structure
389 * @tz_only: flag specifying if the PMC can only be accessed via TrustZone
406 * @pctl_dev: pin controller exposed by the PMC
407 * @domain: IRQ domain provided by the PMC
454 static struct tegra_pmc *pmc = &(struct tegra_pmc) { variable
465 static u32 tegra_pmc_readl(struct tegra_pmc *pmc, unsigned long offset) in tegra_pmc_readl() argument
469 if (pmc->tz_only) { in tegra_pmc_readl()
473 if (pmc->dev) in tegra_pmc_readl()
474 dev_warn(pmc->dev, "%s(): SMC failed: %lu\n", in tegra_pmc_readl()
484 return readl(pmc->base + offset); in tegra_pmc_readl()
487 static void tegra_pmc_writel(struct tegra_pmc *pmc, u32 value, in tegra_pmc_writel() argument
492 if (pmc->tz_only) { in tegra_pmc_writel()
496 if (pmc->dev) in tegra_pmc_writel()
497 dev_warn(pmc->dev, "%s(): SMC failed: %lu\n", in tegra_pmc_writel()
504 writel(value, pmc->base + offset); in tegra_pmc_writel()
508 static u32 tegra_pmc_scratch_readl(struct tegra_pmc *pmc, unsigned long offset) in tegra_pmc_scratch_readl() argument
510 if (pmc->tz_only) in tegra_pmc_scratch_readl()
511 return tegra_pmc_readl(pmc, offset); in tegra_pmc_scratch_readl()
513 return readl(pmc->scratch + offset); in tegra_pmc_scratch_readl()
516 static void tegra_pmc_scratch_writel(struct tegra_pmc *pmc, u32 value, in tegra_pmc_scratch_writel() argument
519 if (pmc->tz_only) in tegra_pmc_scratch_writel()
520 tegra_pmc_writel(pmc, value, offset); in tegra_pmc_scratch_writel()
522 writel(value, pmc->scratch + offset); in tegra_pmc_scratch_writel()
532 if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps) in tegra_powergate_state()
533 return (tegra_pmc_readl(pmc, GPU_RG_CNTRL) & 0x1) == 0; in tegra_powergate_state()
535 return (tegra_pmc_readl(pmc, PWRGATE_STATUS) & BIT(id)) != 0; in tegra_powergate_state()
538 static inline bool tegra_powergate_is_valid(struct tegra_pmc *pmc, int id) in tegra_powergate_is_valid() argument
540 return (pmc->soc && pmc->soc->powergates[id]); in tegra_powergate_is_valid()
543 static inline bool tegra_powergate_is_available(struct tegra_pmc *pmc, int id) in tegra_powergate_is_available() argument
545 return test_bit(id, pmc->powergates_available); in tegra_powergate_is_available()
548 static int tegra_powergate_lookup(struct tegra_pmc *pmc, const char *name) in tegra_powergate_lookup() argument
552 if (!pmc || !pmc->soc || !name) in tegra_powergate_lookup()
555 for (i = 0; i < pmc->soc->num_powergates; i++) { in tegra_powergate_lookup()
556 if (!tegra_powergate_is_valid(pmc, i)) in tegra_powergate_lookup()
559 if (!strcmp(name, pmc->soc->powergates[i])) in tegra_powergate_lookup()
566 static int tegra20_powergate_set(struct tegra_pmc *pmc, unsigned int id, in tegra20_powergate_set() argument
574 * As per TRM documentation, the toggle command will be dropped by PMC in tegra20_powergate_set()
579 tegra_pmc_writel(pmc, PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE); in tegra20_powergate_set()
581 /* wait for PMC to execute the command */ in tegra20_powergate_set()
589 static inline bool tegra_powergate_toggle_ready(struct tegra_pmc *pmc) in tegra_powergate_toggle_ready() argument
591 return !(tegra_pmc_readl(pmc, PWRGATE_TOGGLE) & PWRGATE_TOGGLE_START); in tegra_powergate_toggle_ready()
594 static int tegra114_powergate_set(struct tegra_pmc *pmc, unsigned int id, in tegra114_powergate_set() argument
600 /* wait while PMC power gating is contended */ in tegra114_powergate_set()
601 err = readx_poll_timeout(tegra_powergate_toggle_ready, pmc, status, in tegra114_powergate_set()
606 tegra_pmc_writel(pmc, PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE); in tegra114_powergate_set()
608 /* wait for PMC to accept the command */ in tegra114_powergate_set()
609 err = readx_poll_timeout(tegra_powergate_toggle_ready, pmc, status, in tegra114_powergate_set()
614 /* wait for PMC to execute the command */ in tegra114_powergate_set()
625 * @pmc: power management controller
629 static int tegra_powergate_set(struct tegra_pmc *pmc, unsigned int id, in tegra_powergate_set() argument
634 if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps) in tegra_powergate_set()
637 mutex_lock(&pmc->powergates_lock); in tegra_powergate_set()
640 mutex_unlock(&pmc->powergates_lock); in tegra_powergate_set()
644 err = pmc->soc->powergate_set(pmc, id, new_state); in tegra_powergate_set()
646 mutex_unlock(&pmc->powergates_lock); in tegra_powergate_set()
651 static int __tegra_powergate_remove_clamping(struct tegra_pmc *pmc, in __tegra_powergate_remove_clamping() argument
656 mutex_lock(&pmc->powergates_lock); in __tegra_powergate_remove_clamping()
663 if (pmc->soc->has_gpu_clamps) { in __tegra_powergate_remove_clamping()
664 tegra_pmc_writel(pmc, 0, GPU_RG_CNTRL); in __tegra_powergate_remove_clamping()
680 tegra_pmc_writel(pmc, mask, REMOVE_CLAMPING); in __tegra_powergate_remove_clamping()
683 mutex_unlock(&pmc->powergates_lock); in __tegra_powergate_remove_clamping()
778 err = tegra_powergate_set(pg->pmc, pg->id, true); in tegra_powergate_power_up()
794 err = __tegra_powergate_remove_clamping(pg->pmc, pg->id); in tegra_powergate_power_up()
806 if (pg->pmc->soc->needs_mbist_war) in tegra_powergate_power_up()
828 tegra_powergate_set(pg->pmc, pg->id, false); in tegra_powergate_power_up()
857 err = tegra_powergate_set(pg->pmc, pg->id, false); in tegra_powergate_power_down()
885 struct device *dev = pg->pmc->dev; in tegra_genpd_power_on()
904 struct device *dev = pg->pmc->dev; in tegra_genpd_power_off()
930 if (!tegra_powergate_is_available(pmc, id)) in tegra_powergate_power_on()
933 return tegra_powergate_set(pmc, id, true); in tegra_powergate_power_on()
943 if (!tegra_powergate_is_available(pmc, id)) in tegra_powergate_power_off()
946 return tegra_powergate_set(pmc, id, false); in tegra_powergate_power_off()
952 * @pmc: power management controller
955 static int tegra_powergate_is_powered(struct tegra_pmc *pmc, unsigned int id) in tegra_powergate_is_powered() argument
957 if (!tegra_powergate_is_valid(pmc, id)) in tegra_powergate_is_powered()
969 if (!tegra_powergate_is_available(pmc, id)) in tegra_powergate_remove_clamping()
972 return __tegra_powergate_remove_clamping(pmc, id); in tegra_powergate_remove_clamping()
990 if (!tegra_powergate_is_available(pmc, id)) in tegra_powergate_sequence_power_up()
1007 pg->pmc = pmc; in tegra_powergate_sequence_power_up()
1011 dev_err(pmc->dev, "failed to turn on partition %d: %d\n", id, in tegra_powergate_sequence_power_up()
1023 * @pmc: power management controller
1029 static int tegra_get_cpu_powergate_id(struct tegra_pmc *pmc, in tegra_get_cpu_powergate_id() argument
1032 if (pmc->soc && cpuid < pmc->soc->num_cpu_powergates) in tegra_get_cpu_powergate_id()
1033 return pmc->soc->cpu_powergates[cpuid]; in tegra_get_cpu_powergate_id()
1046 id = tegra_get_cpu_powergate_id(pmc, cpuid); in tegra_pmc_cpu_is_powered()
1050 return tegra_powergate_is_powered(pmc, id); in tegra_pmc_cpu_is_powered()
1061 id = tegra_get_cpu_powergate_id(pmc, cpuid); in tegra_pmc_cpu_power_on()
1065 return tegra_powergate_set(pmc, id, true); in tegra_pmc_cpu_power_on()
1076 id = tegra_get_cpu_powergate_id(pmc, cpuid); in tegra_pmc_cpu_remove_clamping()
1087 value = tegra_pmc_scratch_readl(pmc, pmc->soc->regs->scratch0); in tegra_pmc_program_reboot_reason()
1101 tegra_pmc_scratch_writel(pmc, value, pmc->soc->regs->scratch0); in tegra_pmc_program_reboot_reason()
1122 value = tegra_pmc_readl(pmc, PMC_CNTRL); in tegra_pmc_restart()
1124 tegra_pmc_writel(pmc, value, PMC_CNTRL); in tegra_pmc_restart()
1144 tegra_pmc_writel(pmc, go_to_charger_mode, PMC_SCRATCH37); in tegra_pmc_power_off_handler()
1159 for (i = 0; i < pmc->soc->num_powergates; i++) { in powergate_show()
1160 status = tegra_powergate_is_powered(pmc, i); in powergate_show()
1164 seq_printf(s, " %9s %7s\n", pmc->soc->powergates[i], in powergate_show()
1175 pmc->debugfs = debugfs_create_file("powergate", S_IRUGO, NULL, NULL, in tegra_powergate_debugfs_init()
1177 if (!pmc->debugfs) in tegra_powergate_debugfs_init()
1229 struct device *dev = pg->pmc->dev; in tegra_powergate_of_get_resets()
1264 static int tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np) in tegra_powergate_add() argument
1266 struct device *dev = pmc->dev; in tegra_powergate_add()
1275 id = tegra_powergate_lookup(pmc, np->name); in tegra_powergate_add()
1286 clear_bit(id, pmc->powergates_available); in tegra_powergate_add()
1292 pg->pmc = pmc; in tegra_powergate_add()
1294 off = !tegra_powergate_is_powered(pmc, pg->id); in tegra_powergate_add()
1346 set_bit(id, pmc->powergates_available); in tegra_powergate_add()
1356 return pmc->core_domain_state_synced; in tegra_pmc_core_domain_state_synced()
1373 mutex_lock(&pmc->powergates_lock); in tegra_pmc_core_pd_set_performance_state()
1374 err = dev_pm_opp_set_opp(pmc->dev, opp); in tegra_pmc_core_pd_set_performance_state()
1375 mutex_unlock(&pmc->powergates_lock); in tegra_pmc_core_pd_set_performance_state()
1395 static int tegra_pmc_core_pd_add(struct tegra_pmc *pmc, struct device_node *np) in tegra_pmc_core_pd_add() argument
1401 genpd = devm_kzalloc(pmc->dev, sizeof(*genpd), GFP_KERNEL); in tegra_pmc_core_pd_add()
1409 err = devm_pm_opp_set_regulators(pmc->dev, rname); in tegra_pmc_core_pd_add()
1411 return dev_err_probe(pmc->dev, err, in tegra_pmc_core_pd_add()
1416 dev_err(pmc->dev, "failed to init core genpd: %d\n", err); in tegra_pmc_core_pd_add()
1422 dev_err(pmc->dev, "failed to add core genpd: %d\n", err); in tegra_pmc_core_pd_add()
1426 pmc->core_domain_registered = true; in tegra_pmc_core_pd_add()
1436 static int tegra_powergate_init(struct tegra_pmc *pmc, in tegra_powergate_init() argument
1449 err = tegra_pmc_core_pd_add(pmc, np); in tegra_powergate_init()
1460 err = tegra_powergate_add(pmc, child); in tegra_powergate_init()
1498 set_bit(pg->id, pmc->powergates_available); in tegra_powergate_remove()
1532 tegra_io_pad_find(struct tegra_pmc *pmc, enum tegra_io_pad id) in tegra_io_pad_find() argument
1536 for (i = 0; i < pmc->soc->num_io_pads; i++) in tegra_io_pad_find()
1537 if (pmc->soc->io_pads[i].id == id) in tegra_io_pad_find()
1538 return &pmc->soc->io_pads[i]; in tegra_io_pad_find()
1543 static int tegra_io_pad_get_dpd_register_bit(struct tegra_pmc *pmc, in tegra_io_pad_get_dpd_register_bit() argument
1551 pad = tegra_io_pad_find(pmc, id); in tegra_io_pad_get_dpd_register_bit()
1553 dev_err(pmc->dev, "invalid I/O pad ID %u\n", id); in tegra_io_pad_get_dpd_register_bit()
1563 *status = pmc->soc->regs->dpd_status; in tegra_io_pad_get_dpd_register_bit()
1564 *request = pmc->soc->regs->dpd_req; in tegra_io_pad_get_dpd_register_bit()
1566 *status = pmc->soc->regs->dpd2_status; in tegra_io_pad_get_dpd_register_bit()
1567 *request = pmc->soc->regs->dpd2_req; in tegra_io_pad_get_dpd_register_bit()
1573 static int tegra_io_pad_prepare(struct tegra_pmc *pmc, enum tegra_io_pad id, in tegra_io_pad_prepare() argument
1580 err = tegra_io_pad_get_dpd_register_bit(pmc, id, request, status, mask); in tegra_io_pad_prepare()
1584 if (pmc->clk) { in tegra_io_pad_prepare()
1585 rate = pmc->rate; in tegra_io_pad_prepare()
1587 dev_err(pmc->dev, "failed to get clock rate\n"); in tegra_io_pad_prepare()
1591 tegra_pmc_writel(pmc, DPD_SAMPLE_ENABLE, DPD_SAMPLE); in tegra_io_pad_prepare()
1596 tegra_pmc_writel(pmc, value, SEL_DPD_TIM); in tegra_io_pad_prepare()
1602 static int tegra_io_pad_poll(struct tegra_pmc *pmc, unsigned long offset, in tegra_io_pad_poll() argument
1610 value = tegra_pmc_readl(pmc, offset); in tegra_io_pad_poll()
1620 static void tegra_io_pad_unprepare(struct tegra_pmc *pmc) in tegra_io_pad_unprepare() argument
1622 if (pmc->clk) in tegra_io_pad_unprepare()
1623 tegra_pmc_writel(pmc, DPD_SAMPLE_DISABLE, DPD_SAMPLE); in tegra_io_pad_unprepare()
1638 mutex_lock(&pmc->powergates_lock); in tegra_io_pad_power_enable()
1640 err = tegra_io_pad_prepare(pmc, id, &request, &status, &mask); in tegra_io_pad_power_enable()
1642 dev_err(pmc->dev, "failed to prepare I/O pad: %d\n", err); in tegra_io_pad_power_enable()
1646 tegra_pmc_writel(pmc, IO_DPD_REQ_CODE_OFF | mask, request); in tegra_io_pad_power_enable()
1648 err = tegra_io_pad_poll(pmc, status, mask, 0, 250); in tegra_io_pad_power_enable()
1650 dev_err(pmc->dev, "failed to enable I/O pad: %d\n", err); in tegra_io_pad_power_enable()
1654 tegra_io_pad_unprepare(pmc); in tegra_io_pad_power_enable()
1657 mutex_unlock(&pmc->powergates_lock); in tegra_io_pad_power_enable()
1674 mutex_lock(&pmc->powergates_lock); in tegra_io_pad_power_disable()
1676 err = tegra_io_pad_prepare(pmc, id, &request, &status, &mask); in tegra_io_pad_power_disable()
1678 dev_err(pmc->dev, "failed to prepare I/O pad: %d\n", err); in tegra_io_pad_power_disable()
1682 tegra_pmc_writel(pmc, IO_DPD_REQ_CODE_ON | mask, request); in tegra_io_pad_power_disable()
1684 err = tegra_io_pad_poll(pmc, status, mask, mask, 250); in tegra_io_pad_power_disable()
1686 dev_err(pmc->dev, "failed to disable I/O pad: %d\n", err); in tegra_io_pad_power_disable()
1690 tegra_io_pad_unprepare(pmc); in tegra_io_pad_power_disable()
1693 mutex_unlock(&pmc->powergates_lock); in tegra_io_pad_power_disable()
1698 static int tegra_io_pad_is_powered(struct tegra_pmc *pmc, enum tegra_io_pad id) in tegra_io_pad_is_powered() argument
1704 err = tegra_io_pad_get_dpd_register_bit(pmc, id, &request, &status, in tegra_io_pad_is_powered()
1709 value = tegra_pmc_readl(pmc, status); in tegra_io_pad_is_powered()
1714 static int tegra_io_pad_set_voltage(struct tegra_pmc *pmc, enum tegra_io_pad id, in tegra_io_pad_set_voltage() argument
1720 pad = tegra_io_pad_find(pmc, id); in tegra_io_pad_set_voltage()
1727 mutex_lock(&pmc->powergates_lock); in tegra_io_pad_set_voltage()
1729 if (pmc->soc->has_impl_33v_pwr) { in tegra_io_pad_set_voltage()
1730 value = tegra_pmc_readl(pmc, PMC_IMPL_E_33V_PWR); in tegra_io_pad_set_voltage()
1737 tegra_pmc_writel(pmc, value, PMC_IMPL_E_33V_PWR); in tegra_io_pad_set_voltage()
1740 value = tegra_pmc_readl(pmc, PMC_PWR_DET); in tegra_io_pad_set_voltage()
1742 tegra_pmc_writel(pmc, value, PMC_PWR_DET); in tegra_io_pad_set_voltage()
1745 value = tegra_pmc_readl(pmc, PMC_PWR_DET_VALUE); in tegra_io_pad_set_voltage()
1752 tegra_pmc_writel(pmc, value, PMC_PWR_DET_VALUE); in tegra_io_pad_set_voltage()
1755 mutex_unlock(&pmc->powergates_lock); in tegra_io_pad_set_voltage()
1762 static int tegra_io_pad_get_voltage(struct tegra_pmc *pmc, enum tegra_io_pad id) in tegra_io_pad_get_voltage() argument
1767 pad = tegra_io_pad_find(pmc, id); in tegra_io_pad_get_voltage()
1774 if (pmc->soc->has_impl_33v_pwr) in tegra_io_pad_get_voltage()
1775 value = tegra_pmc_readl(pmc, PMC_IMPL_E_33V_PWR); in tegra_io_pad_get_voltage()
1777 value = tegra_pmc_readl(pmc, PMC_PWR_DET_VALUE); in tegra_io_pad_get_voltage()
1812 return pmc->suspend_mode; in tegra_pmc_get_suspend_mode()
1820 pmc->suspend_mode = mode; in tegra_pmc_set_suspend_mode()
1835 rate = pmc->rate; in tegra_pmc_enter_suspend_mode()
1845 ticks = pmc->cpu_good_time * rate + USEC_PER_SEC - 1; in tegra_pmc_enter_suspend_mode()
1847 tegra_pmc_writel(pmc, ticks, PMC_CPUPWRGOOD_TIMER); in tegra_pmc_enter_suspend_mode()
1849 ticks = pmc->cpu_off_time * rate + USEC_PER_SEC - 1; in tegra_pmc_enter_suspend_mode()
1851 tegra_pmc_writel(pmc, ticks, PMC_CPUPWROFF_TIMER); in tegra_pmc_enter_suspend_mode()
1853 value = tegra_pmc_readl(pmc, PMC_CNTRL); in tegra_pmc_enter_suspend_mode()
1856 tegra_pmc_writel(pmc, value, PMC_CNTRL); in tegra_pmc_enter_suspend_mode()
1860 static int tegra_pmc_parse_dt(struct tegra_pmc *pmc, struct device_node *np) in tegra_pmc_parse_dt() argument
1865 pmc->suspend_mode = TEGRA_SUSPEND_NONE; in tegra_pmc_parse_dt()
1869 pmc->suspend_mode = TEGRA_SUSPEND_LP0; in tegra_pmc_parse_dt()
1873 pmc->suspend_mode = TEGRA_SUSPEND_LP1; in tegra_pmc_parse_dt()
1877 pmc->suspend_mode = TEGRA_SUSPEND_LP2; in tegra_pmc_parse_dt()
1881 pmc->suspend_mode = TEGRA_SUSPEND_NONE; in tegra_pmc_parse_dt()
1886 pmc->suspend_mode = tegra_pm_validate_suspend_mode(pmc->suspend_mode); in tegra_pmc_parse_dt()
1889 pmc->suspend_mode = TEGRA_SUSPEND_NONE; in tegra_pmc_parse_dt()
1891 pmc->cpu_good_time = value; in tegra_pmc_parse_dt()
1894 pmc->suspend_mode = TEGRA_SUSPEND_NONE; in tegra_pmc_parse_dt()
1896 pmc->cpu_off_time = value; in tegra_pmc_parse_dt()
1900 pmc->suspend_mode = TEGRA_SUSPEND_NONE; in tegra_pmc_parse_dt()
1902 pmc->core_osc_time = values[0]; in tegra_pmc_parse_dt()
1903 pmc->core_pmu_time = values[1]; in tegra_pmc_parse_dt()
1906 pmc->suspend_mode = TEGRA_SUSPEND_NONE; in tegra_pmc_parse_dt()
1908 pmc->core_off_time = value; in tegra_pmc_parse_dt()
1910 pmc->corereq_high = of_property_read_bool(np, in tegra_pmc_parse_dt()
1913 pmc->sysclkreq_high = of_property_read_bool(np, in tegra_pmc_parse_dt()
1916 pmc->combined_req = of_property_read_bool(np, in tegra_pmc_parse_dt()
1919 pmc->cpu_pwr_good_en = of_property_read_bool(np, in tegra_pmc_parse_dt()
1924 if (pmc->suspend_mode == TEGRA_SUSPEND_LP0) in tegra_pmc_parse_dt()
1925 pmc->suspend_mode = TEGRA_SUSPEND_LP1; in tegra_pmc_parse_dt()
1927 pmc->lp0_vec_phys = values[0]; in tegra_pmc_parse_dt()
1928 pmc->lp0_vec_size = values[1]; in tegra_pmc_parse_dt()
1933 static void tegra_pmc_init(struct tegra_pmc *pmc) in tegra_pmc_init() argument
1935 if (pmc->soc->init) in tegra_pmc_init()
1936 pmc->soc->init(pmc); in tegra_pmc_init()
1939 static void tegra_pmc_init_tsense_reset(struct tegra_pmc *pmc) in tegra_pmc_init_tsense_reset() argument
1943 struct device *dev = pmc->dev; in tegra_pmc_init_tsense_reset()
1947 if (!pmc->soc->has_tsense_reset) in tegra_pmc_init_tsense_reset()
1950 np = of_get_child_by_name(pmc->dev->of_node, "i2c-thermtrip"); in tegra_pmc_init_tsense_reset()
1979 value = tegra_pmc_readl(pmc, PMC_SENSOR_CTRL); in tegra_pmc_init_tsense_reset()
1981 tegra_pmc_writel(pmc, value, PMC_SENSOR_CTRL); in tegra_pmc_init_tsense_reset()
1985 tegra_pmc_writel(pmc, value, PMC_SCRATCH54); in tegra_pmc_init_tsense_reset()
2003 tegra_pmc_writel(pmc, value, PMC_SCRATCH55); in tegra_pmc_init_tsense_reset()
2005 value = tegra_pmc_readl(pmc, PMC_SENSOR_CTRL); in tegra_pmc_init_tsense_reset()
2007 tegra_pmc_writel(pmc, value, PMC_SENSOR_CTRL); in tegra_pmc_init_tsense_reset()
2009 dev_info(pmc->dev, "emergency thermal reset enabled\n"); in tegra_pmc_init_tsense_reset()
2017 struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl_dev); in tegra_io_pad_pinctrl_get_groups_count() local
2019 return pmc->soc->num_io_pads; in tegra_io_pad_pinctrl_get_groups_count()
2025 struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl); in tegra_io_pad_pinctrl_get_group_name() local
2027 return pmc->soc->io_pads[group].name; in tegra_io_pad_pinctrl_get_group_name()
2035 struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl_dev); in tegra_io_pad_pinctrl_get_group_pins() local
2037 *pins = &pmc->soc->io_pads[group].id; in tegra_io_pad_pinctrl_get_group_pins()
2055 struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl_dev); in tegra_io_pad_pinconf_get() local
2060 pad = tegra_io_pad_find(pmc, pin); in tegra_io_pad_pinconf_get()
2066 ret = tegra_io_pad_get_voltage(pmc, pad->id); in tegra_io_pad_pinconf_get()
2074 ret = tegra_io_pad_is_powered(pmc, pad->id); in tegra_io_pad_pinconf_get()
2094 struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl_dev); in tegra_io_pad_pinconf_set() local
2101 pad = tegra_io_pad_find(pmc, pin); in tegra_io_pad_pinconf_set()
2122 err = tegra_io_pad_set_voltage(pmc, pad->id, arg); in tegra_io_pad_pinconf_set()
2145 static int tegra_pmc_pinctrl_init(struct tegra_pmc *pmc) in tegra_pmc_pinctrl_init() argument
2149 if (!pmc->soc->num_pin_descs) in tegra_pmc_pinctrl_init()
2152 tegra_pmc_pctl_desc.name = dev_name(pmc->dev); in tegra_pmc_pinctrl_init()
2153 tegra_pmc_pctl_desc.pins = pmc->soc->pin_descs; in tegra_pmc_pinctrl_init()
2154 tegra_pmc_pctl_desc.npins = pmc->soc->num_pin_descs; in tegra_pmc_pinctrl_init()
2156 pmc->pctl_dev = devm_pinctrl_register(pmc->dev, &tegra_pmc_pctl_desc, in tegra_pmc_pinctrl_init()
2157 pmc); in tegra_pmc_pinctrl_init()
2158 if (IS_ERR(pmc->pctl_dev)) { in tegra_pmc_pinctrl_init()
2159 err = PTR_ERR(pmc->pctl_dev); in tegra_pmc_pinctrl_init()
2160 dev_err(pmc->dev, "failed to register pin controller: %d\n", in tegra_pmc_pinctrl_init()
2173 value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status); in reset_reason_show()
2174 value &= pmc->soc->regs->rst_source_mask; in reset_reason_show()
2175 value >>= pmc->soc->regs->rst_source_shift; in reset_reason_show()
2177 if (WARN_ON(value >= pmc->soc->num_reset_sources)) in reset_reason_show()
2180 return sprintf(buf, "%s\n", pmc->soc->reset_sources[value]); in reset_reason_show()
2190 value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status); in reset_level_show()
2191 value &= pmc->soc->regs->rst_level_mask; in reset_level_show()
2192 value >>= pmc->soc->regs->rst_level_shift; in reset_level_show()
2194 if (WARN_ON(value >= pmc->soc->num_reset_levels)) in reset_level_show()
2197 return sprintf(buf, "%s\n", pmc->soc->reset_levels[value]); in reset_level_show()
2202 static void tegra_pmc_reset_sysfs_init(struct tegra_pmc *pmc) in tegra_pmc_reset_sysfs_init() argument
2204 struct device *dev = pmc->dev; in tegra_pmc_reset_sysfs_init()
2207 if (pmc->soc->reset_sources) { in tegra_pmc_reset_sysfs_init()
2215 if (pmc->soc->reset_levels) { in tegra_pmc_reset_sysfs_init()
2241 struct tegra_pmc *pmc = domain->host_data; in tegra_pmc_irq_alloc() local
2242 const struct tegra_pmc_soc *soc = pmc->soc; in tegra_pmc_irq_alloc()
2262 &pmc->irq, pmc); in tegra_pmc_irq_alloc()
2266 /* simple hierarchies stop at the PMC level */ in tegra_pmc_irq_alloc()
2272 spec.fwnode = &pmc->dev->of_node->fwnode; in tegra_pmc_irq_alloc()
2292 &pmc->irq, pmc); in tegra_pmc_irq_alloc()
2294 /* GPIO hierarchies stop at the PMC level */ in tegra_pmc_irq_alloc()
2302 /* If there is no wake-up event, there is no PMC mapping */ in tegra_pmc_irq_alloc()
2316 struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); in tegra210_pmc_irq_set_wake() local
2324 tegra_pmc_writel(pmc, 0, PMC_SW_WAKE_STATUS); in tegra210_pmc_irq_set_wake()
2325 tegra_pmc_writel(pmc, 0, PMC_SW_WAKE2_STATUS); in tegra210_pmc_irq_set_wake()
2327 tegra_pmc_writel(pmc, 0, PMC_WAKE_STATUS); in tegra210_pmc_irq_set_wake()
2328 tegra_pmc_writel(pmc, 0, PMC_WAKE2_STATUS); in tegra210_pmc_irq_set_wake()
2330 /* enable PMC wake */ in tegra210_pmc_irq_set_wake()
2336 value = tegra_pmc_readl(pmc, offset); in tegra210_pmc_irq_set_wake()
2343 tegra_pmc_writel(pmc, value, offset); in tegra210_pmc_irq_set_wake()
2350 struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); in tegra210_pmc_irq_set_type() local
2362 value = tegra_pmc_readl(pmc, offset); in tegra210_pmc_irq_set_type()
2383 tegra_pmc_writel(pmc, value, offset); in tegra210_pmc_irq_set_type()
2390 struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); in tegra186_pmc_irq_set_wake() local
2398 writel(0x1, pmc->wake + WAKE_AOWAKE_STATUS_W(data->hwirq)); in tegra186_pmc_irq_set_wake()
2401 value = readl(pmc->wake + WAKE_AOWAKE_TIER2_ROUTING(offset)); in tegra186_pmc_irq_set_wake()
2408 writel(value, pmc->wake + WAKE_AOWAKE_TIER2_ROUTING(offset)); in tegra186_pmc_irq_set_wake()
2411 writel(!!on, pmc->wake + WAKE_AOWAKE_MASK_W(data->hwirq)); in tegra186_pmc_irq_set_wake()
2418 struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); in tegra186_pmc_irq_set_type() local
2421 value = readl(pmc->wake + WAKE_AOWAKE_CNTRL(data->hwirq)); in tegra186_pmc_irq_set_type()
2442 writel(value, pmc->wake + WAKE_AOWAKE_CNTRL(data->hwirq)); in tegra186_pmc_irq_set_type()
2475 static int tegra_pmc_irq_init(struct tegra_pmc *pmc) in tegra_pmc_irq_init() argument
2480 np = of_irq_find_parent(pmc->dev->of_node); in tegra_pmc_irq_init()
2489 pmc->irq.name = dev_name(pmc->dev); in tegra_pmc_irq_init()
2490 pmc->irq.irq_mask = tegra_irq_mask_parent; in tegra_pmc_irq_init()
2491 pmc->irq.irq_unmask = tegra_irq_unmask_parent; in tegra_pmc_irq_init()
2492 pmc->irq.irq_eoi = tegra_irq_eoi_parent; in tegra_pmc_irq_init()
2493 pmc->irq.irq_set_affinity = tegra_irq_set_affinity_parent; in tegra_pmc_irq_init()
2494 pmc->irq.irq_set_type = pmc->soc->irq_set_type; in tegra_pmc_irq_init()
2495 pmc->irq.irq_set_wake = pmc->soc->irq_set_wake; in tegra_pmc_irq_init()
2497 pmc->domain = irq_domain_add_hierarchy(parent, 0, 96, pmc->dev->of_node, in tegra_pmc_irq_init()
2498 &tegra_pmc_irq_domain_ops, pmc); in tegra_pmc_irq_init()
2499 if (!pmc->domain) { in tegra_pmc_irq_init()
2500 dev_err(pmc->dev, "failed to allocate domain\n"); in tegra_pmc_irq_init()
2510 struct tegra_pmc *pmc = container_of(nb, struct tegra_pmc, clk_nb); in tegra_pmc_clk_notify_cb() local
2515 mutex_lock(&pmc->powergates_lock); in tegra_pmc_clk_notify_cb()
2519 pmc->rate = data->new_rate; in tegra_pmc_clk_notify_cb()
2523 mutex_unlock(&pmc->powergates_lock); in tegra_pmc_clk_notify_cb()
2536 tegra_pmc_readl(pmc, offset); in pmc_clk_fence_udelay()
2537 /* pmc clk propagation delay 2 us */ in pmc_clk_fence_udelay()
2546 val = tegra_pmc_readl(pmc, clk->offs) >> clk->mux_shift; in pmc_clk_mux_get_parent()
2557 val = tegra_pmc_readl(pmc, clk->offs); in pmc_clk_mux_set_parent()
2560 tegra_pmc_writel(pmc, val, clk->offs); in pmc_clk_mux_set_parent()
2571 val = tegra_pmc_readl(pmc, clk->offs) & BIT(clk->force_en_shift); in pmc_clk_is_enabled()
2580 val = tegra_pmc_readl(pmc, offs); in pmc_clk_set_state()
2582 tegra_pmc_writel(pmc, val, offs); in pmc_clk_set_state()
2612 tegra_pmc_clk_out_register(struct tegra_pmc *pmc, in tegra_pmc_clk_out_register() argument
2619 pmc_clk = devm_kzalloc(pmc->dev, sizeof(*pmc_clk), GFP_KERNEL); in tegra_pmc_clk_out_register()
2642 return tegra_pmc_readl(pmc, gate->offs) & BIT(gate->shift) ? 1 : 0; in pmc_clk_gate_is_enabled()
2668 tegra_pmc_clk_gate_register(struct tegra_pmc *pmc, const char *name, in tegra_pmc_clk_gate_register() argument
2675 gate = devm_kzalloc(pmc->dev, sizeof(*gate), GFP_KERNEL); in tegra_pmc_clk_gate_register()
2692 static void tegra_pmc_clock_register(struct tegra_pmc *pmc, in tegra_pmc_clock_register() argument
2700 num_clks = pmc->soc->num_pmc_clks; in tegra_pmc_clock_register()
2701 if (pmc->soc->has_blink_output) in tegra_pmc_clock_register()
2707 clk_data = devm_kmalloc(pmc->dev, sizeof(*clk_data), GFP_KERNEL); in tegra_pmc_clock_register()
2711 clk_data->clks = devm_kcalloc(pmc->dev, TEGRA_PMC_CLK_MAX, in tegra_pmc_clock_register()
2721 for (i = 0; i < pmc->soc->num_pmc_clks; i++) { in tegra_pmc_clock_register()
2724 data = pmc->soc->pmc_clks_data + i; in tegra_pmc_clock_register()
2726 clk = tegra_pmc_clk_out_register(pmc, data, PMC_CLK_OUT_CNTRL); in tegra_pmc_clock_register()
2728 dev_warn(pmc->dev, "unable to register clock %s: %d\n", in tegra_pmc_clock_register()
2735 dev_warn(pmc->dev, in tegra_pmc_clock_register()
2744 if (pmc->soc->has_blink_output) { in tegra_pmc_clock_register()
2745 tegra_pmc_writel(pmc, 0x0, PMC_BLINK_TIMER); in tegra_pmc_clock_register()
2746 clk = tegra_pmc_clk_gate_register(pmc, in tegra_pmc_clock_register()
2752 dev_warn(pmc->dev, in tegra_pmc_clock_register()
2758 clk = tegra_pmc_clk_gate_register(pmc, "pmc_blink", in tegra_pmc_clock_register()
2763 dev_warn(pmc->dev, in tegra_pmc_clock_register()
2771 dev_warn(pmc->dev, in tegra_pmc_clock_register()
2782 dev_warn(pmc->dev, "failed to add pmc clock provider: %d\n", in tegra_pmc_clock_register()
2804 struct tegra_pmc *pmc = context; in tegra_pmc_regmap_readl() local
2806 *value = tegra_pmc_readl(pmc, offset); in tegra_pmc_regmap_readl()
2812 struct tegra_pmc *pmc = context; in tegra_pmc_regmap_writel() local
2814 tegra_pmc_writel(pmc, value, offset); in tegra_pmc_regmap_writel()
2830 static int tegra_pmc_regmap_init(struct tegra_pmc *pmc) in tegra_pmc_regmap_init() argument
2835 if (pmc->soc->has_usb_sleepwalk) { in tegra_pmc_regmap_init()
2836 regmap = devm_regmap_init(pmc->dev, NULL, pmc, &usb_sleepwalk_regmap_config); in tegra_pmc_regmap_init()
2839 dev_err(pmc->dev, "failed to allocate register map (%d)\n", err); in tegra_pmc_regmap_init()
2849 pmc->suspend_mode = TEGRA_SUSPEND_NOT_READY; in tegra_pmc_reset_suspend_mode()
2863 if (WARN_ON(!pmc->base || !pmc->soc)) in tegra_pmc_probe()
2866 err = tegra_pmc_parse_dt(pmc, pdev->dev.of_node); in tegra_pmc_probe()
2882 pmc->wake = devm_ioremap_resource(&pdev->dev, res); in tegra_pmc_probe()
2883 if (IS_ERR(pmc->wake)) in tegra_pmc_probe()
2884 return PTR_ERR(pmc->wake); in tegra_pmc_probe()
2886 pmc->wake = base; in tegra_pmc_probe()
2891 pmc->aotag = devm_ioremap_resource(&pdev->dev, res); in tegra_pmc_probe()
2892 if (IS_ERR(pmc->aotag)) in tegra_pmc_probe()
2893 return PTR_ERR(pmc->aotag); in tegra_pmc_probe()
2895 pmc->aotag = base; in tegra_pmc_probe()
2900 pmc->scratch = devm_ioremap_resource(&pdev->dev, res); in tegra_pmc_probe()
2901 if (IS_ERR(pmc->scratch)) in tegra_pmc_probe()
2902 return PTR_ERR(pmc->scratch); in tegra_pmc_probe()
2904 pmc->scratch = base; in tegra_pmc_probe()
2907 pmc->clk = devm_clk_get_optional(&pdev->dev, "pclk"); in tegra_pmc_probe()
2908 if (IS_ERR(pmc->clk)) in tegra_pmc_probe()
2909 return dev_err_probe(&pdev->dev, PTR_ERR(pmc->clk), in tegra_pmc_probe()
2913 * PMC should be last resort for restarting since it soft-resets in tegra_pmc_probe()
2935 * PMC should be primary power-off method if it soft-resets CPU, in tegra_pmc_probe()
2953 if (pmc->clk) { in tegra_pmc_probe()
2954 pmc->clk_nb.notifier_call = tegra_pmc_clk_notify_cb; in tegra_pmc_probe()
2955 err = clk_notifier_register(pmc->clk, &pmc->clk_nb); in tegra_pmc_probe()
2962 pmc->rate = clk_get_rate(pmc->clk); in tegra_pmc_probe()
2965 pmc->dev = &pdev->dev; in tegra_pmc_probe()
2967 tegra_pmc_init(pmc); in tegra_pmc_probe()
2969 tegra_pmc_init_tsense_reset(pmc); in tegra_pmc_probe()
2971 tegra_pmc_reset_sysfs_init(pmc); in tegra_pmc_probe()
2979 err = tegra_pmc_pinctrl_init(pmc); in tegra_pmc_probe()
2983 err = tegra_pmc_regmap_init(pmc); in tegra_pmc_probe()
2987 err = tegra_powergate_init(pmc, pdev->dev.of_node); in tegra_pmc_probe()
2991 err = tegra_pmc_irq_init(pmc); in tegra_pmc_probe()
2995 mutex_lock(&pmc->powergates_lock); in tegra_pmc_probe()
2996 iounmap(pmc->base); in tegra_pmc_probe()
2997 pmc->base = base; in tegra_pmc_probe()
2998 mutex_unlock(&pmc->powergates_lock); in tegra_pmc_probe()
3000 tegra_pmc_clock_register(pmc, pdev->dev.of_node); in tegra_pmc_probe()
3001 platform_set_drvdata(pdev, pmc); in tegra_pmc_probe()
3009 debugfs_remove(pmc->debugfs); in tegra_pmc_probe()
3013 clk_notifier_unregister(pmc->clk, &pmc->clk_nb); in tegra_pmc_probe()
3021 struct tegra_pmc *pmc = dev_get_drvdata(dev); in tegra_pmc_suspend() local
3023 tegra_pmc_writel(pmc, virt_to_phys(tegra_resume), PMC_SCRATCH41); in tegra_pmc_suspend()
3030 struct tegra_pmc *pmc = dev_get_drvdata(dev); in tegra_pmc_resume() local
3032 tegra_pmc_writel(pmc, 0x0, PMC_SCRATCH41); in tegra_pmc_resume()
3064 static void tegra20_pmc_init(struct tegra_pmc *pmc) in tegra20_pmc_init() argument
3069 value = tegra_pmc_readl(pmc, PMC_CNTRL); in tegra20_pmc_init()
3071 tegra_pmc_writel(pmc, value, PMC_CNTRL); in tegra20_pmc_init()
3073 value = tegra_pmc_readl(pmc, PMC_CNTRL); in tegra20_pmc_init()
3075 if (pmc->sysclkreq_high) in tegra20_pmc_init()
3080 if (pmc->corereq_high) in tegra20_pmc_init()
3086 tegra_pmc_writel(pmc, value, PMC_CNTRL); in tegra20_pmc_init()
3089 value = tegra_pmc_readl(pmc, PMC_CNTRL); in tegra20_pmc_init()
3091 tegra_pmc_writel(pmc, value, PMC_CNTRL); in tegra20_pmc_init()
3094 if (pmc->suspend_mode != TEGRA_SUSPEND_NONE) { in tegra20_pmc_init()
3095 osc = DIV_ROUND_UP(pmc->core_osc_time * 8192, 1000000); in tegra20_pmc_init()
3096 pmu = DIV_ROUND_UP(pmc->core_pmu_time * 32768, 1000000); in tegra20_pmc_init()
3097 off = DIV_ROUND_UP(pmc->core_off_time * 32768, 1000000); in tegra20_pmc_init()
3098 tegra_pmc_writel(pmc, ((osc << 8) & 0xff00) | (pmu & 0xff), in tegra20_pmc_init()
3100 tegra_pmc_writel(pmc, off, PMC_COREPWROFF_TIMER); in tegra20_pmc_init()
3104 static void tegra20_pmc_setup_irq_polarity(struct tegra_pmc *pmc, in tegra20_pmc_setup_irq_polarity() argument
3110 value = tegra_pmc_readl(pmc, PMC_CNTRL); in tegra20_pmc_setup_irq_polarity()
3117 tegra_pmc_writel(pmc, value, PMC_CNTRL); in tegra20_pmc_setup_irq_polarity()
3576 static void tegra186_pmc_setup_irq_polarity(struct tegra_pmc *pmc, in tegra186_pmc_setup_irq_polarity() argument
3587 dev_err(pmc->dev, "failed to find PMC wake registers\n"); in tegra186_pmc_setup_irq_polarity()
3595 dev_err(pmc->dev, "failed to map PMC wake registers\n"); in tegra186_pmc_setup_irq_polarity()
3904 { .compatible = "nvidia,tegra234-pmc", .data = &tegra234_pmc_soc },
3905 { .compatible = "nvidia,tegra194-pmc", .data = &tegra194_pmc_soc },
3906 { .compatible = "nvidia,tegra186-pmc", .data = &tegra186_pmc_soc },
3907 { .compatible = "nvidia,tegra210-pmc", .data = &tegra210_pmc_soc },
3908 { .compatible = "nvidia,tegra132-pmc", .data = &tegra124_pmc_soc },
3909 { .compatible = "nvidia,tegra124-pmc", .data = &tegra124_pmc_soc },
3910 { .compatible = "nvidia,tegra114-pmc", .data = &tegra114_pmc_soc },
3911 { .compatible = "nvidia,tegra30-pmc", .data = &tegra30_pmc_soc },
3912 { .compatible = "nvidia,tegra20-pmc", .data = &tegra20_pmc_soc },
3925 if (!pmc->soc->supports_core_domain) in tegra_pmc_sync_state()
3933 if (!pmc->core_domain_registered) in tegra_pmc_sync_state()
3936 pmc->core_domain_state_synced = true; in tegra_pmc_sync_state()
3939 mutex_lock(&pmc->powergates_lock); in tegra_pmc_sync_state()
3941 mutex_unlock(&pmc->powergates_lock); in tegra_pmc_sync_state()
3949 .name = "tegra-pmc",
3961 static bool __init tegra_pmc_detect_tz_only(struct tegra_pmc *pmc) in tegra_pmc_detect_tz_only() argument
3965 saved = readl(pmc->base + pmc->soc->regs->scratch0); in tegra_pmc_detect_tz_only()
3972 writel(value, pmc->base + pmc->soc->regs->scratch0); in tegra_pmc_detect_tz_only()
3973 value = readl(pmc->base + pmc->soc->regs->scratch0); in tegra_pmc_detect_tz_only()
3977 pr_info("access to PMC is restricted to TZ\n"); in tegra_pmc_detect_tz_only()
3982 writel(saved, pmc->base + pmc->soc->regs->scratch0); in tegra_pmc_detect_tz_only()
3999 mutex_init(&pmc->powergates_lock); in tegra_pmc_early_init()
4006 * a PMC node. in tegra_pmc_early_init()
4009 * that didn't contain a PMC node. Note that in this case the in tegra_pmc_early_init()
4034 pr_err("failed to get PMC registers\n"); in tegra_pmc_early_init()
4040 pmc->base = ioremap(regs.start, resource_size(®s)); in tegra_pmc_early_init()
4041 if (!pmc->base) { in tegra_pmc_early_init()
4042 pr_err("failed to map PMC registers\n"); in tegra_pmc_early_init()
4048 pmc->soc = match->data; in tegra_pmc_early_init()
4050 if (pmc->soc->maybe_tz_only) in tegra_pmc_early_init()
4051 pmc->tz_only = tegra_pmc_detect_tz_only(pmc); in tegra_pmc_early_init()
4054 for (i = 0; i < pmc->soc->num_powergates; i++) in tegra_pmc_early_init()
4055 if (pmc->soc->powergates[i]) in tegra_pmc_early_init()
4056 set_bit(i, pmc->powergates_available); in tegra_pmc_early_init()
4059 * Invert the interrupt polarity if a PMC device tree node in tegra_pmc_early_init()
4064 pmc->soc->setup_irq_polarity(pmc, np, invert); in tegra_pmc_early_init()