Lines Matching +full:0 +full:x0b

21 #define SPM_CTL_INDEX		0x7f
23 #define SPM_CTL_EN		BIT(0)
42 	[SPM_REG_AVS_CTL]	= 0x904,
43 	[SPM_REG_AVS_LIMIT]	= 0x908,
48 	.avs_ctl = 0x1010031,
49 	.avs_limit = 0x4580458,
54 	.avs_ctl = 0x101c031,
55 	.avs_limit = 0x4580458,
60 	.avs_ctl = 0x1010031,
61 	.avs_limit = 0x4700470,
66 	.avs_ctl = 0x1010031,
67 	.avs_limit = 0x4200420,
71 	[SPM_REG_CFG]		= 0x08,
72 	[SPM_REG_SPM_CTL]	= 0x30,
73 	[SPM_REG_DLY]		= 0x34,
74 	[SPM_REG_SEQ_ENTRY]	= 0x400,
80 	.spm_cfg = 0x1,
81 	.spm_dly = 0x3C102800,
82 	.seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90,
83 		0x5B, 0x60, 0x03, 0x60, 0x76, 0x76, 0x0B, 0x94, 0x5B, 0x80,
84 		0x10, 0x26, 0x30, 0x0F },
85 	.start_index[PM_SLEEP_MODE_STBY] = 0,
92 	.spm_cfg = 0x1,
93 	.spm_dly = 0x3C102800,
94 	.seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90,
95 		0x5B, 0x60, 0x03, 0x60, 0x3B, 0x76, 0x76, 0x0B, 0x94, 0x5B,
96 		0x80, 0x10, 0x26, 0x30, 0x0F },
97 	.start_index[PM_SLEEP_MODE_STBY] = 0,
102 	[SPM_REG_CFG]		= 0x08,
103 	[SPM_REG_SPM_CTL]	= 0x30,
104 	[SPM_REG_DLY]		= 0x34,
105 	[SPM_REG_SEQ_ENTRY]	= 0x80,
111 	.spm_cfg = 0x1,
112 	.spm_dly = 0x3C102800,
113 	.seq = { 0x03, 0x0B, 0x0F, 0x00, 0x20, 0x80, 0x10, 0xE8, 0x5B, 0x03,
114 		0x3B, 0xE8, 0x5B, 0x82, 0x10, 0x0B, 0x30, 0x06, 0x26, 0x30,
115 		0x0F },
116 	.start_index[PM_SLEEP_MODE_STBY] = 0,
123 	.spm_cfg = 0x0,
124 	.spm_dly = 0x3C102800,
125 	.seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90,
126 		0x5B, 0x60, 0x03, 0x60, 0x3B, 0x76, 0x76, 0x0B, 0x94, 0x5B,
127 		0x80, 0x10, 0x26, 0x30, 0x0F },
128 	.start_index[PM_SLEEP_MODE_STBY] = 0,
133 	[SPM_REG_CFG]		= 0x08,
134 	[SPM_REG_SPM_CTL]	= 0x20,
135 	[SPM_REG_PMIC_DLY]	= 0x24,
136 	[SPM_REG_PMIC_DATA_0]	= 0x28,
137 	[SPM_REG_PMIC_DATA_1]	= 0x2C,
138 	[SPM_REG_SEQ_ENTRY]	= 0x80,
144 	.spm_cfg = 0x1F,
145 	.pmic_dly = 0x02020004,
146 	.pmic_data[0] = 0x0084009C,
147 	.pmic_data[1] = 0x00A4001C,
148 	.seq = { 0x03, 0x0F, 0x00, 0x24, 0x54, 0x10, 0x09, 0x03, 0x01,
149 		0x10, 0x54, 0x30, 0x0C, 0x24, 0x30, 0x0F },
150 	.start_index[PM_SLEEP_MODE_STBY] = 0,
210 	{ .compatible = "qcom,msm8909-saw2-v3.0-cpu",
212 	{ .compatible = "qcom,msm8916-saw2-v3.0-cpu",
239 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);  in spm_dev_probe()
268 				drv->reg_data->pmic_data[0]);  in spm_dev_probe()
276 	return 0;  in spm_dev_probe()