83 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);  in scpsys_sram_enable()
86 	ret = regmap_read_poll_timeout(scpsys->base, pd->data->ctl_offs, tmp,  in scpsys_sram_enable()
92 		regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_ISOINT_B_BIT);  in scpsys_sram_enable()
94 		regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_CLKISO_BIT);  in scpsys_sram_enable()
107 		regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_CLKISO_BIT);  in scpsys_sram_disable()
109 		regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_ISOINT_B_BIT);  in scpsys_sram_disable()
112 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);  in scpsys_sram_disable()
115 	return regmap_read_poll_timeout(scpsys->base, pd->data->ctl_offs, tmp,  in scpsys_sram_disable()
222 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT);  in scpsys_power_on()
223 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT);  in scpsys_power_on()
231 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT);  in scpsys_power_on()
232 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);  in scpsys_power_on()
233 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);  in scpsys_power_on()
278 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);  in scpsys_power_off()
279 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);  in scpsys_power_off()
280 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT);  in scpsys_power_off()
281 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT);  in scpsys_power_off()
282 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT);  in scpsys_power_off()