Lines Matching +full:d +full:-
5 * Copyright (C) 2009 - 2012 Paul Mundt
12 * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
33 #include <linux/radix-tree.h>
44 * - this needs to be at least 2 for 5-bit priorities on 7780
46 static unsigned int default_prio_level = 2; /* 2 - 16 */
74 struct intc_desc_int *d, in intc_register_irq() argument
84 radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq)); in intc_register_irq()
95 data[0] = intc_get_mask_handle(desc, d, enum_id, 0); in intc_register_irq()
96 data[1] = intc_get_prio_handle(desc, d, enum_id, 0); in intc_register_irq()
103 pr_warn("missing unique irq mask for irq %d (vect 0x%04x)\n", in intc_register_irq()
106 data[0] = data[0] ? data[0] : intc_get_mask_handle(desc, d, enum_id, 1); in intc_register_irq()
107 data[1] = data[1] ? data[1] : intc_get_prio_handle(desc, d, enum_id, 1); in intc_register_irq()
117 irq_set_chip_and_handler_name(irq, &d->chip, handle_level_irq, in intc_register_irq()
130 /* add irq to d->prio list if priority is available */ in intc_register_irq()
132 hp = d->prio + d->nr_prio; in intc_register_irq()
133 hp->irq = irq; in intc_register_irq()
134 hp->handle = data[1]; in intc_register_irq()
141 hp->handle &= ~_INTC_MK(0x0f, 0, 0, 0, 0, 0); in intc_register_irq()
142 hp->handle |= _INTC_MK(REG_FN_ERR, 0, 0, 0, 0, 0); in intc_register_irq()
144 d->nr_prio++; in intc_register_irq()
147 /* add irq to d->sense list if sense is available */ in intc_register_irq()
148 data[0] = intc_get_sense_handle(desc, d, enum_id); in intc_register_irq()
150 (d->sense + d->nr_sense)->irq = irq; in intc_register_irq()
151 (d->sense + d->nr_sense)->handle = data[0]; in intc_register_irq()
152 d->nr_sense++; in intc_register_irq()
156 d->chip.irq_mask(irq_data); in intc_register_irq()
158 intc_set_ack_handle(irq, desc, d, enum_id); in intc_register_irq()
159 intc_set_dist_handle(irq, desc, d, enum_id); in intc_register_irq()
164 static unsigned int __init save_reg(struct intc_desc_int *d, in save_reg() argument
170 value = intc_phys_to_virt(d, value); in save_reg()
172 d->reg[cnt] = value; in save_reg()
174 d->smp[cnt] = smp; in save_reg()
185 pr_err("uname to allocate IRQ %d\n", irq); in intc_map()
200 struct intc_hw_desc *hw = &desc->hw; in register_intc_controller()
201 struct intc_desc_int *d; in register_intc_controller() local
205 desc->name, hw->nr_vectors); in register_intc_controller()
207 d = kzalloc(sizeof(*d), GFP_NOWAIT); in register_intc_controller()
208 if (!d) in register_intc_controller()
211 INIT_LIST_HEAD(&d->list); in register_intc_controller()
212 list_add_tail(&d->list, &intc_list); in register_intc_controller()
214 raw_spin_lock_init(&d->lock); in register_intc_controller()
215 INIT_RADIX_TREE(&d->tree, GFP_ATOMIC); in register_intc_controller()
217 d->index = nr_intc_controllers; in register_intc_controller()
219 if (desc->num_resources) { in register_intc_controller()
220 d->nr_windows = desc->num_resources; in register_intc_controller()
221 d->window = kcalloc(d->nr_windows, sizeof(*d->window), in register_intc_controller()
223 if (!d->window) in register_intc_controller()
226 for (k = 0; k < d->nr_windows; k++) { in register_intc_controller()
227 res = desc->resource + k; in register_intc_controller()
229 d->window[k].phys = res->start; in register_intc_controller()
230 d->window[k].size = resource_size(res); in register_intc_controller()
231 d->window[k].virt = ioremap(res->start, in register_intc_controller()
233 if (!d->window[k].virt) in register_intc_controller()
238 d->nr_reg = hw->mask_regs ? hw->nr_mask_regs * 2 : 0; in register_intc_controller()
240 if (d->nr_reg) in register_intc_controller()
241 d->nr_reg += hw->nr_mask_regs; in register_intc_controller()
243 d->nr_reg += hw->prio_regs ? hw->nr_prio_regs * 2 : 0; in register_intc_controller()
244 d->nr_reg += hw->sense_regs ? hw->nr_sense_regs : 0; in register_intc_controller()
245 d->nr_reg += hw->ack_regs ? hw->nr_ack_regs : 0; in register_intc_controller()
246 d->nr_reg += hw->subgroups ? hw->nr_subgroups : 0; in register_intc_controller()
248 d->reg = kcalloc(d->nr_reg, sizeof(*d->reg), GFP_NOWAIT); in register_intc_controller()
249 if (!d->reg) in register_intc_controller()
253 d->smp = kcalloc(d->nr_reg, sizeof(*d->smp), GFP_NOWAIT); in register_intc_controller()
254 if (!d->smp) in register_intc_controller()
259 if (hw->mask_regs) { in register_intc_controller()
260 for (i = 0; i < hw->nr_mask_regs; i++) { in register_intc_controller()
261 smp = IS_SMP(hw->mask_regs[i]); in register_intc_controller()
262 k += save_reg(d, k, hw->mask_regs[i].set_reg, smp); in register_intc_controller()
263 k += save_reg(d, k, hw->mask_regs[i].clr_reg, smp); in register_intc_controller()
265 k += save_reg(d, k, hw->mask_regs[i].dist_reg, 0); in register_intc_controller()
270 if (hw->prio_regs) { in register_intc_controller()
271 d->prio = kcalloc(hw->nr_vectors, sizeof(*d->prio), in register_intc_controller()
273 if (!d->prio) in register_intc_controller()
276 for (i = 0; i < hw->nr_prio_regs; i++) { in register_intc_controller()
277 smp = IS_SMP(hw->prio_regs[i]); in register_intc_controller()
278 k += save_reg(d, k, hw->prio_regs[i].set_reg, smp); in register_intc_controller()
279 k += save_reg(d, k, hw->prio_regs[i].clr_reg, smp); in register_intc_controller()
282 sort(d->prio, hw->nr_prio_regs, sizeof(*d->prio), in register_intc_controller()
286 if (hw->sense_regs) { in register_intc_controller()
287 d->sense = kcalloc(hw->nr_vectors, sizeof(*d->sense), in register_intc_controller()
289 if (!d->sense) in register_intc_controller()
292 for (i = 0; i < hw->nr_sense_regs; i++) in register_intc_controller()
293 k += save_reg(d, k, hw->sense_regs[i].reg, 0); in register_intc_controller()
295 sort(d->sense, hw->nr_sense_regs, sizeof(*d->sense), in register_intc_controller()
299 if (hw->subgroups) in register_intc_controller()
300 for (i = 0; i < hw->nr_subgroups; i++) in register_intc_controller()
301 if (hw->subgroups[i].reg) in register_intc_controller()
302 k+= save_reg(d, k, hw->subgroups[i].reg, 0); in register_intc_controller()
304 memcpy(&d->chip, &intc_irq_chip, sizeof(struct irq_chip)); in register_intc_controller()
305 d->chip.name = desc->name; in register_intc_controller()
307 if (hw->ack_regs) in register_intc_controller()
308 for (i = 0; i < hw->nr_ack_regs; i++) in register_intc_controller()
309 k += save_reg(d, k, hw->ack_regs[i].set_reg, 0); in register_intc_controller()
311 d->chip.irq_mask_ack = d->chip.irq_disable; in register_intc_controller()
314 if (desc->force_disable) in register_intc_controller()
315 intc_enable_disable_enum(desc, d, desc->force_disable, 0); in register_intc_controller()
318 if (desc->force_enable) in register_intc_controller()
319 intc_enable_disable_enum(desc, d, desc->force_enable, 0); in register_intc_controller()
323 intc_irq_domain_init(d, hw); in register_intc_controller()
326 for (i = 0; i < hw->nr_vectors; i++) { in register_intc_controller()
327 struct intc_vect *vect = hw->vectors + i; in register_intc_controller()
328 unsigned int irq = evt2irq(vect->vect); in register_intc_controller()
330 if (!vect->enum_id) in register_intc_controller()
333 if (!intc_map(d->domain, irq)) in register_intc_controller()
336 intc_irq_xlate_set(irq, vect->enum_id, d); in register_intc_controller()
337 intc_register_irq(desc, d, vect->enum_id, irq); in register_intc_controller()
339 for (k = i + 1; k < hw->nr_vectors; k++) { in register_intc_controller()
340 struct intc_vect *vect2 = hw->vectors + k; in register_intc_controller()
341 unsigned int irq2 = evt2irq(vect2->vect); in register_intc_controller()
343 if (vect->enum_id != vect2->enum_id) in register_intc_controller()
347 * In the case of multi-evt handling and sparse in register_intc_controller()
351 if (!intc_map(d->domain, irq2)) in register_intc_controller()
354 vect2->enum_id = 0; in register_intc_controller()
364 intc_subgroup_init(desc, d); in register_intc_controller()
367 if (desc->force_enable) in register_intc_controller()
368 intc_enable_disable_enum(desc, d, desc->force_enable, 1); in register_intc_controller()
370 d->skip_suspend = desc->skip_syscore_suspend; in register_intc_controller()
376 kfree(d->prio); in register_intc_controller()
379 kfree(d->smp); in register_intc_controller()
382 kfree(d->reg); in register_intc_controller()
384 for (k = 0; k < d->nr_windows; k++) in register_intc_controller()
385 if (d->window[k].virt) in register_intc_controller()
386 iounmap(d->window[k].virt); in register_intc_controller()
388 kfree(d->window); in register_intc_controller()
390 kfree(d); in register_intc_controller()
394 return -ENOMEM; in register_intc_controller()
399 struct intc_desc_int *d; in intc_suspend() local
401 list_for_each_entry(d, &intc_list, list) { in intc_suspend()
404 if (d->skip_suspend) in intc_suspend()
414 if (chip != &d->chip) in intc_suspend()
417 chip->irq_enable(data); in intc_suspend()
425 struct intc_desc_int *d; in intc_resume() local
427 list_for_each_entry(d, &intc_list, list) { in intc_resume()
430 if (d->skip_suspend) in intc_resume()
443 if (chip != &d->chip) in intc_resume()
446 chip->irq_disable(data); in intc_resume()
448 chip->irq_enable(data); in intc_resume()
466 struct intc_desc_int *d; in show_intc_name() local
468 d = container_of(dev, struct intc_desc_int, dev); in show_intc_name()
470 return sprintf(buf, "%s\n", d->chip.name); in show_intc_name()
477 struct intc_desc_int *d; in register_intc_devs() local
484 list_for_each_entry(d, &intc_list, list) { in register_intc_devs()
485 d->dev.id = d->index; in register_intc_devs()
486 d->dev.bus = &intc_subsys; in register_intc_devs()
487 error = device_register(&d->dev); in register_intc_devs()
489 error = device_create_file(&d->dev, in register_intc_devs()