159 static volatile struct sun3_dma_regs *dregs;  variable
173 	dregs->udc_addr = UDC_CSR;  in sun3_udc_read()
175 	ret = dregs->udc_data;  in sun3_udc_read()
183 	dregs->udc_addr = reg;  in sun3_udc_write()
185 	dregs->udc_data = val;  in sun3_udc_write()
196 	unsigned short csr = dregs->csr;  in scsi_sun3_intr()
200 	dregs->csr &= ~CSR_DMA_ENABLE;  in scsi_sun3_intr()
238 	dregs->fifo_count = 0;  in sun3scsi_dma_setup()
242 	dregs->csr &= ~CSR_FIFO;  in sun3scsi_dma_setup()
243 	dregs->csr |= CSR_FIFO;  in sun3scsi_dma_setup()
248 		dregs->csr |= CSR_SEND;  in sun3scsi_dma_setup()
250 		dregs->csr &= ~CSR_SEND;  in sun3scsi_dma_setup()
253 	dregs->csr |= CSR_PACK_ENABLE;  in sun3scsi_dma_setup()
255 	dregs->dma_addr_hi = ((unsigned long)addr >> 16);  in sun3scsi_dma_setup()
256 	dregs->dma_addr_lo = ((unsigned long)addr & 0xffff);  in sun3scsi_dma_setup()
258 	dregs->dma_count_hi = 0;  in sun3scsi_dma_setup()
259 	dregs->dma_count_lo = 0;  in sun3scsi_dma_setup()
260 	dregs->fifo_count_hi = 0;  in sun3scsi_dma_setup()
261 	dregs->fifo_count = 0;  in sun3scsi_dma_setup()
264 	dregs->fifo_count = count;  in sun3scsi_dma_setup()
269 	dregs->csr &= ~CSR_FIFO;  in sun3scsi_dma_setup()
270 	dregs->csr |= CSR_FIFO;  in sun3scsi_dma_setup()
272 	if(dregs->fifo_count != count) {   in sun3scsi_dma_setup()
275 		             dregs->fifo_count, (unsigned int) count);  in sun3scsi_dma_setup()
350 	csr = dregs->csr;  in sun3scsi_dma_start()
352 	dregs->dma_count_hi = (sun3_dma_orig_count >> 16);  in sun3scsi_dma_start()
353 	dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff);  in sun3scsi_dma_start()
355 	dregs->fifo_count_hi = (sun3_dma_orig_count >> 16);  in sun3scsi_dma_start()
356 	dregs->fifo_count = (sun3_dma_orig_count & 0xffff);  in sun3scsi_dma_start()
379 	dregs->csr &= ~CSR_DMA_ENABLE;  in sun3scsi_dma_finish()
381 	fifo = dregs->fifo_count;  in sun3scsi_dma_finish()
389 	if ((!write_flag) && (dregs->csr & CSR_LEFT)) {  in sun3scsi_dma_finish()
397 		switch (dregs->csr & CSR_LEFT) {  in sun3scsi_dma_finish()
399 			*vaddr = (dregs->bpack_lo & 0xff00) >> 8;  in sun3scsi_dma_finish()
404 			*vaddr = (dregs->bpack_hi & 0x00ff);  in sun3scsi_dma_finish()
409 			*vaddr = (dregs->bpack_hi & 0xff00) >> 8;  in sun3scsi_dma_finish()
419 			if(dregs->csr & CSR_FIFO_EMPTY)  in sun3scsi_dma_finish()
430 	dregs->udc_addr = 0x32;  in sun3scsi_dma_finish()
432 	count = 2 * dregs->udc_data;  in sun3scsi_dma_finish()
435 	fifo = dregs->fifo_count;  in sun3scsi_dma_finish()
443 		data = dregs->fifo_data;  in sun3scsi_dma_finish()
457 	dregs->dma_addr_hi = 0;  in sun3scsi_dma_finish()
458 	dregs->dma_addr_lo = 0;  in sun3scsi_dma_finish()
459 	dregs->dma_count_hi = 0;  in sun3scsi_dma_finish()
460 	dregs->dma_count_lo = 0;  in sun3scsi_dma_finish()
462 	dregs->fifo_count = 0;  in sun3scsi_dma_finish()
463 	dregs->fifo_count_hi = 0;  in sun3scsi_dma_finish()
465 	dregs->csr &= ~CSR_SEND;  in sun3scsi_dma_finish()
469 	dregs->fifo_count = 0;  in sun3scsi_dma_finish()
470 	dregs->csr &= ~CSR_SEND;  in sun3scsi_dma_finish()
473 	dregs->csr &= ~CSR_FIFO;  in sun3scsi_dma_finish()
474 	dregs->csr |= CSR_FIFO;  in sun3scsi_dma_finish()
544 		dregs = (struct sun3_dma_regs *)(ioaddr + 8);  in sun3_scsi_probe()
546 		if (sun3_map_test((unsigned long)dregs, &x)) {  in sun3_scsi_probe()
549 			oldcsr = dregs->csr;  in sun3_scsi_probe()
550 			dregs->csr = 0;  in sun3_scsi_probe()
552 			if (dregs->csr == 0x1400)  in sun3_scsi_probe()
555 			dregs->csr = oldcsr;  in sun3_scsi_probe()
570 	dregs = (struct sun3_dma_regs *)(ioaddr + 8);  in sun3_scsi_probe()
605 	dregs->csr = 0;  in sun3_scsi_probe()
607 	dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;  in sun3_scsi_probe()
609 	dregs->fifo_count = 0;  in sun3_scsi_probe()
611 	dregs->fifo_count_hi = 0;  in sun3_scsi_probe()
612 	dregs->dma_addr_hi = 0;  in sun3_scsi_probe()
613 	dregs->dma_addr_lo = 0;  in sun3_scsi_probe()
614 	dregs->dma_count_hi = 0;  in sun3_scsi_probe()
615 	dregs->dma_count_lo = 0;  in sun3_scsi_probe()
617 	dregs->ivect = VME_DATA24 | (instance->irq & 0xff);  in sun3_scsi_probe()