Lines Matching +full:rx +full:- +full:sched +full:- +full:sp
1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2003-2014 QLogic Corporation
15 #include <linux/dma-mapping.h>
16 #include <linux/sched.h>
235 /* 83XX: Macros defining 8200 AEN Error-levels */
249 /* 83XX: Macros for defining IDC-Control bits */
258 /* 83XX: Macros for defining class in DEV-Partition Info register */
264 /* 83XX: Macros for IDC Lock-Recovery stages */
266 * lock-recovery
268 #define IDC_LOCK_RECOVERY_STAGE2 0x2 /* Stage2: Perform lock-recovery */
271 #define IDC_AUDIT_TIMESTAMP 0x0 /* IDC-AUDIT: Record timestamp of
272 * dev-state change to NEED-RESET
273 * or NEED-QUIESCENT
275 #define IDC_AUDIT_COMPLETION 0x1 /* IDC-AUDIT: Record duration of
276 * reset-recovery completion is
300 #define LOOPID_MAP_SIZE (ha->max_fibre_devices)
327 * There is no correspondence between an N-PORT id and an AL_PA. Therefore the
328 * valid range of an N-PORT id is 0 through 0x7ef.
362 #define LOOP_DOWN_RESET (LOOP_DOWN_TIME - 30)
367 /* ISP request and response entry counts (37-65535) */
411 /* To identify if a srb is of T10-CRC type. @sp => srb_t pointer */
412 #define IS_PROT_IO(sp) (sp->flags & SRB_CRC_CTX_DSD_VALID) argument
677 * line up with qla_tgt_cmd->cmd_type
722 * Report completion status @res and call sp_put(@sp). @res is
726 void (*done)(struct srb *sp, int res);
727 /* Stop the timer and free @sp. Only used by the FCP code. */
728 void (*free)(struct srb *sp);
730 * Call nvme_private->fd->done() and free @sp. Only used by the NVMe
738 void (*async_done)(struct srb *sp, int res);
741 #define GET_CMD_SP(sp) (sp->u.scmd.cmd) argument
743 #define GET_CMD_SENSE_LEN(sp) \ argument
744 (sp->u.scmd.request_sense_length)
745 #define SET_CMD_SENSE_LEN(sp, len) \ argument
746 (sp->u.scmd.request_sense_length = len)
747 #define GET_CMD_SENSE_PTR(sp) \ argument
748 (sp->u.scmd.request_sense_ptr)
749 #define SET_CMD_SENSE_PTR(sp, ptr) \ argument
750 (sp->u.scmd.request_sense_ptr = ptr)
751 #define GET_FW_SENSE_LEN(sp) \ argument
752 (sp->u.scmd.fw_sense_length)
753 #define SET_FW_SENSE_LEN(sp, len) \ argument
754 (sp->u.scmd.fw_sense_length = len)
812 __le16 req_q_in; /* In-Pointer */
813 __le16 req_q_out; /* Out-Pointer */
815 __le16 rsp_q_in; /* In-Pointer */
816 __le16 rsp_q_out; /* Out-Pointer */
973 __le32 req_q_in; /* A0 - Request Queue In-Pointer */
974 __le32 req_q_out; /* A4 - Request Queue Out-Pointer */
976 __le32 rsp_q_in; /* A8 - Response Queue In-Pointer */
977 __le32 rsp_q_out; /* AC - Response Queue Out-Pointer */
1003 &(reg)->u.isp2100.mailbox4 : \
1004 &(reg)->u.isp2300.req_q_in)
1007 &(reg)->u.isp2100.mailbox4 : \
1008 &(reg)->u.isp2300.req_q_out)
1011 &(reg)->u.isp2100.mailbox5 : \
1012 &(reg)->u.isp2300.rsp_q_in)
1015 &(reg)->u.isp2100.mailbox5 : \
1016 &(reg)->u.isp2300.rsp_q_out)
1018 #define ISP_ATIO_Q_IN(vha) (vha->hw->tgt.atio_q_in)
1019 #define ISP_ATIO_Q_OUT(vha) (vha->hw->tgt.atio_q_out)
1024 &(reg)->u.isp2100.mailbox0 + (num) : \
1025 &(reg)->u_end.isp2200.mailbox8 + (num) - 8) : \
1026 &(reg)->u.isp2300.mailbox0 + (num))
1034 &(reg)->fb_cmd_2100 : \
1035 &(reg)->u.isp2300.fb_cmd)
1079 * ISP mailbox Self-Test status codes
1114 #define MBA_WAKEUP_THRES 0x8005 /* Request Queue Wake-up. */
1155 #define MBA_DPORT_DIAGNOSTICS 0x8080 /* D-port Diagnostics */
1253 #define MBC_NON_PARTICIPATE 0x43 /* Non-Participating Mode. */
1256 #define MBC_ONLINE_SELF_TEST 0x46 /* Online self-test. */
1314 #define MBC_DPORT_DIAGNOSTICS 0x47 /* D-Port Diagnostics */
1456 /* Bits 15-0 of word 0 */
1458 /* Bits 15-0 of word 3 */
1497 * LSB BIT 2 = Enable Full-Duplex
1569 * LSB BIT 5 = FCP RSP Payload [1] / Sbus enable - 2200
1570 * LSB BIT 6 = Enable Out-of-Order frame handling
1573 * MSB BIT 0 = Sbus enable - 2300
1592 * BIT 15-14 = Reserved
1593 * BIT_13 = SAN Congestion Management (1 - Enabled, 0 - Disabled)
1594 * BIT_12 = Remote Write Optimization (1 - Enabled, 0 - Disabled)
1595 * BIT 11-0 = Reserved
1684 * LSB BIT 2 = Enable Full-Duplex
1743 * LSB BIT 5 = FCP RSP Payload [1] / Sbus enable - 2200
1744 * LSB BIT 6 = Enable Out-of-Order frame handling
1747 * MSB BIT 0 = Sbus enable - 2300
1766 * LSB BIT 4 = Rx Sensitivity 1G bit 0
1767 * LSB BIT 5 = Rx Sensitivity 1G bit 1
1768 * LSB BIT 6 = Rx Sensitivity 1G bit 2
1769 * LSB BIT 7 = Rx Sensitivity 1G bit 3
1775 * MSB BIT 4 = Rx Sensitivity 2G bit 0
1776 * MSB BIT 5 = Rx Sensitivity 2G bit 1
1777 * MSB BIT 6 = Rx Sensitivity 2G bit 2
1778 * MSB BIT 7 = Rx Sensitivity 2G bit 3
1835 * BIT 1 = Alt-Boot Enable
1866 /* Offset 200-215 : Model Number */
1873 * NVRAM Adapter Features offset 232-239
1908 * ISP queue - response queue entry definition.
1922 * ISP queue - ATIO queue entry definition.
1950 * ISP queue - command entry structure definition.
1979 * ISP queue - 64-Bit addressing, command entry structure definition.
2000 * ISP queue - continuation entry structure definition.
2013 * ISP queue - 64-Bit addressing, continuation entry structure definition.
2044 * ISP queue - 64-Bit addressing, continuation crc entry structure definition.
2099 * ISP queue - status entry structure definition.
2136 #define SS_MASK 0xfff /* Reserved bits BIT_12-BIT_15*/
2175 #define CS_EDIF_SPI_ERROR 0x67 /* rx frame unable to locate sa */
2196 * ISP queue - status continuation entry structure definition.
2208 * ISP queue - RIO Type 1 status entry (32 bit I/O entry handles)
2221 * ISP queue - RIO Type 2 status entry (16 bit I/O entry handles)
2234 * ISP queue - marker entry structure definition.
2244 uint8_t modifier; /* Modifier (7-0). */
2258 * ISP queue - Management Server entry structure definition.
2289 * ISP queue - Mailbox Command entry structure definition.
2332 * ISP queue - immediate notify entry structure definition.
2384 /* PRLI word 3 bit 0-15 */
2429 /* FCP-4 types */
2678 srb_t *sp; member
2730 * FC-CT interface
2732 * NOTE: All structures are big-endian in form.
2967 (sizeof((obj)->type) + sizeof((obj)->len))
2970 (4 - ((len) & 3))
3003 /* CT command header -- request/response common fields */
3275 * SNS command structures -- for 2200 compatibility.
3339 uint8_t loop_id_2100; /* ISP2100/ISP2200 -- 4 bytes. */
3340 __le16 loop_id; /* ISP23XX -- 6 bytes. */
3341 uint16_t reserved_1; /* ISP24XX -- 8 bytes. */
3363 /* NPIV - return codes of VP create and modify */
3439 /* MSI-X Support *************************************************************/
3535 srb_t *sp; member
3558 srb_t *sp; member
3630 ((ha->mqenable || IS_QLA83XX(ha) || \
3632 ((void __iomem *)ha->mqiobase + (QLA_QUE_PAGE * id)) :\
3633 ((void __iomem *)ha->iobase))
3668 __le32 __iomem *rsp_q_in; /* FWI2-capable only. */
3695 __le32 __iomem *req_q_in; /* FWI2-capable only. */
3742 * ha->flags.eeh_busy
3743 * ha->flags.pci_channel_io_perm_failure
3744 * base_vha->loop_state
3747 /* move vha->flags.difdix_supported here */
3767 struct qla_msix_entry *msix; /* point to &ha->msix_entries[x] */
3772 struct list_head qp_list_elem; /* vha->qp_list */
3909 (sizeof(obj) - sizeof((obj).desc_tag) - sizeof((obj).desc_len))
3972 ((ha->cur_fw_xcb_count/100) * Q_FULL_THRESH_HOLD_PERCENT)
4220 #define DT_MASK(ha) ((ha)->isp_type & (DT_ISP_LAST - 1))
4268 #define IS_NOPOLLING_TYPE(ha) (IS_QLA81XX(ha) && (ha)->flags.msix_enabled)
4275 #define IS_T10_PI_CAPABLE(ha) ((ha)->device_type & DT_T10_PI)
4276 #define IS_IIDMA_CAPABLE(ha) ((ha)->device_type & DT_IIDMA)
4277 #define IS_FWI2_CAPABLE(ha) ((ha)->device_type & DT_FWI2)
4278 #define IS_ZIO_SUPPORTED(ha) ((ha)->device_type & DT_ZIO_SUPPORTED)
4279 #define IS_OEM_001(ha) ((ha)->device_type & DT_OEM_001)
4280 #define HAS_EXTENDED_IDS(ha) ((ha)->device_type & DT_EXTENDED_IDS)
4281 #define IS_CT6_SUPPORTED(ha) ((ha)->device_type & DT_CT6_SUPPORTED)
4288 ((ha)->fw_attributes_ext[0] & BIT_0))
4289 #define QLA_ABTS_FW_ENABLED(_ha) ((_ha)->fw_attributes_ext[0] & BIT_14)
4290 #define QLA_SRB_NVME_LS(_sp) ((_sp)->type == SRB_NVME_LS)
4291 #define QLA_SRB_NVME_CMD(_sp) ((_sp)->type == SRB_NVME_CMD)
4294 (QLA_SRB_NVME_LS(_sp) && QLA_ABTS_FW_ENABLED(_sp->fcport->vha->hw))
4296 (QLA_SRB_NVME_CMD(_sp) && QLA_ABTS_FW_ENABLED(_sp->fcport->vha->hw))
4298 (QLA_NVME_IOS(_sp) && QLA_ABTS_FW_ENABLED(_sp->fcport->vha->hw))
4308 (((ha)->fw_attributes_h << 16 | (ha)->fw_attributes) & BIT_22))
4311 #define IS_TGT_MODE_CAPABLE(ha) (ha->tgt.atio_q_length)
4327 (ha->zio_mode == QLA_ZIO_MODE_6))
4391 /* Small DMA pool allocations -- maximum 256 bytes in length. */
4428 #define LOGIN_TEMPLATE_SIZE (sizeof(struct fc_els_flogi) - 4)
4447 struct mutex mq_lock; /* multi-queue synchronization */
4700 /* DPC low-priority workqueue */
4703 /* DPC high-priority workqueue */
4784 (ha->fw_ability_mask & FW_ABILITY_MAX_SPEED_MASK)
5086 srb_t *sp; member
5091 _ha->flags.fw_started = 1; \
5092 _ha->base_qpair->fw_started = 1; \
5093 for (i = 0; i < _ha->max_qpairs; i++) { \
5094 if (_ha->queue_pair_map[i]) \
5095 _ha->queue_pair_map[i]->fw_started = 1; \
5101 _ha->flags.fw_started = 0; \
5102 _ha->base_qpair->fw_started = 0; \
5103 for (i = 0; i < _ha->max_qpairs; i++) { \
5104 if (_ha->queue_pair_map[i]) \
5105 _ha->queue_pair_map[i]->fw_started = 0; \
5131 (test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || \
5132 test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || \
5133 atomic_read(&ha->loop_state) == LOOP_DOWN)
5136 (test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || \
5137 test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
5140 atomic_inc(&__vha->vref_count); \
5142 if (__vha->flags.delete_progress) { \
5143 atomic_dec(&__vha->vref_count); \
5144 wake_up(&__vha->vref_waitq); \
5152 atomic_dec(&__vha->vref_count); \
5153 wake_up(&__vha->vref_waitq); \
5157 atomic_inc(&__qpair->ref_count); \
5159 if (__qpair->delete_in_progress) { \
5160 atomic_dec(&__qpair->ref_count); \
5168 atomic_dec(&__qpair->ref_count)
5172 _ha->base_qpair->enable_explicit_conf = 1; \
5173 for (i = 0; i < _ha->max_qpairs; i++) { \
5174 if (_ha->queue_pair_map[i]) \
5175 _ha->queue_pair_map[i]->enable_explicit_conf = 1; \
5181 _ha->base_qpair->enable_explicit_conf = 0; \
5182 for (i = 0; i < _ha->max_qpairs; i++) { \
5183 if (_ha->queue_pair_map[i]) \
5184 _ha->queue_pair_map[i]->enable_explicit_conf = 0; \
5258 fc_port_t *fcport; /* needed by rx delay timer function */
5259 struct timer_list timer; /* rx delay timer */
5265 #define EDIF_RX_DELETE_FILTER_COUNT 3 /* delay queuing rx delete until this many */
5359 /* BPM -- Buffer Plus Management support. */
5366 (ql2xautodetectsfp && !vha->vp_idx && IS_BPM_CAPABLE(vha->hw))
5374 if (_ha->current_topology) \
5375 _ha->prev_topology = _ha->current_topology; \
5379 ((ha->prev_topology == ISP_CFG_N && !ha->current_topology) || \
5380 ha->current_topology == ISP_CFG_N || \
5381 !ha->current_topology)
5386 (fcport->fc4_type & FS_FC4TYPE_NVME) \
5389 (fcport->fc4_type & FS_FC4TYPE_FCP) \
5399 (ha->fc4_type_priority == FC4_PRIORITY_NVME))
5402 (fcport->do_prli_nvme || \
5472 #define IS_SESSION_DELETED(_fcport) (_fcport->disc_state == DSC_DELETE_PEND || \
5473 _fcport->disc_state == DSC_DELETED)
5477 __func__, _fp->port_name, ##_args, atomic_read(&_fp->state), \
5478 _fp->disc_state, _fp->scan_state, _fp->loop_id, _fp->deleted, \
5479 _fp->flags