Lines Matching +full:sha +full:- +full:1
2 * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
4 * Copyright (c) 2008-2009 USI Co., Ltd.
10 * 1. Redistributions of source code must retain the above copyright
18 * 3. Neither the names of the above-listed copyright holders nor the names
53 " 1: Link rate 1.5G\n"
68 [chip_8009] = {1, 8, &pm8001_80xx_dispatch,},
70 [chip_8019] = {1, 16, &pm8001_80xx_dispatch,},
86 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); in pm8001_map_queues() local
87 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; in pm8001_map_queues()
88 struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT]; in pm8001_map_queues()
90 if (pm8001_ha->number_of_intr > 1) in pm8001_map_queues()
91 blk_mq_pci_map_queues(qmap, pm8001_ha->pdev, 1); in pm8001_map_queues()
111 .can_queue = 1,
112 .this_id = -1,
124 .track_queue_depth = 1,
151 * pm8001_phy_init - initiate our adapter phys
157 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; in pm8001_phy_init()
158 struct asd_sas_phy *sas_phy = &phy->sas_phy; in pm8001_phy_init()
159 phy->phy_state = PHY_LINK_DISABLE; in pm8001_phy_init()
160 phy->pm8001_ha = pm8001_ha; in pm8001_phy_init()
161 phy->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS; in pm8001_phy_init()
162 phy->maximum_linkrate = SAS_LINK_RATE_6_0_GBPS; in pm8001_phy_init()
163 sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0; in pm8001_phy_init()
164 sas_phy->class = SAS; in pm8001_phy_init()
165 sas_phy->iproto = SAS_PROTOCOL_ALL; in pm8001_phy_init()
166 sas_phy->tproto = 0; in pm8001_phy_init()
167 sas_phy->type = PHY_TYPE_PHYSICAL; in pm8001_phy_init()
168 sas_phy->role = PHY_ROLE_INITIATOR; in pm8001_phy_init()
169 sas_phy->oob_mode = OOB_NOT_CONNECTED; in pm8001_phy_init()
170 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN; in pm8001_phy_init()
171 sas_phy->id = phy_id; in pm8001_phy_init()
172 sas_phy->sas_addr = (u8 *)&phy->dev_sas_addr; in pm8001_phy_init()
173 sas_phy->frame_rcvd = &phy->frame_rcvd[0]; in pm8001_phy_init()
174 sas_phy->ha = (struct sas_ha_struct *)pm8001_ha->shost->hostdata; in pm8001_phy_init()
175 sas_phy->lldd_phy = phy; in pm8001_phy_init()
179 * pm8001_free - free hba
190 if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) { in pm8001_free()
191 dma_free_coherent(&pm8001_ha->pdev->dev, in pm8001_free()
192 (pm8001_ha->memoryMap.region[i].total_len + in pm8001_free()
193 pm8001_ha->memoryMap.region[i].alignment), in pm8001_free()
194 pm8001_ha->memoryMap.region[i].virt_ptr, in pm8001_free()
195 pm8001_ha->memoryMap.region[i].phys_addr); in pm8001_free()
198 PM8001_CHIP_DISP->chip_iounmap(pm8001_ha); in pm8001_free()
200 bitmap_free(pm8001_ha->tags); in pm8001_free()
207 * pm8001_tasklet() - tasklet for 64 msi-x interrupt handler
217 pm8001_ha = irq_vector->drv_inst; in pm8001_tasklet()
219 BUG_ON(1); in pm8001_tasklet()
220 PM8001_CHIP_DISP->isr(pm8001_ha, irq_vector->irq_id); in pm8001_tasklet()
225 * pm8001_interrupt_handler_msix - main MSIX interrupt handler.
238 pm8001_ha = irq_vector->drv_inst; in pm8001_interrupt_handler_msix()
242 if (!PM8001_CHIP_DISP->is_our_interrupt(pm8001_ha)) in pm8001_interrupt_handler_msix()
245 tasklet_schedule(&pm8001_ha->tasklet[irq_vector->irq_id]); in pm8001_interrupt_handler_msix()
247 ret = PM8001_CHIP_DISP->isr(pm8001_ha, irq_vector->irq_id); in pm8001_interrupt_handler_msix()
253 * pm8001_interrupt_handler_intx - main INTx interrupt handler.
262 struct sas_ha_struct *sha = dev_id; in pm8001_interrupt_handler_intx() local
263 pm8001_ha = sha->lldd_ha; in pm8001_interrupt_handler_intx()
266 if (!PM8001_CHIP_DISP->is_our_interrupt(pm8001_ha)) in pm8001_interrupt_handler_intx()
270 tasklet_schedule(&pm8001_ha->tasklet[0]); in pm8001_interrupt_handler_intx()
272 ret = PM8001_CHIP_DISP->isr(pm8001_ha, 0); in pm8001_interrupt_handler_intx()
281 * pm8001_alloc - initiate our hba structure and 6 DMAs area.
293 spin_lock_init(&pm8001_ha->lock); in pm8001_alloc()
294 spin_lock_init(&pm8001_ha->bitmap_lock); in pm8001_alloc()
296 pm8001_ha->chip->n_phy); in pm8001_alloc()
310 count = pm8001_ha->max_q_num; in pm8001_alloc()
312 ib_offset = pm8001_ha->ib_offset = USI_MAX_MEMCNT_BASE; in pm8001_alloc()
313 ci_offset = pm8001_ha->ci_offset = ib_offset + count; in pm8001_alloc()
314 ob_offset = pm8001_ha->ob_offset = ci_offset + count; in pm8001_alloc()
315 pi_offset = pm8001_ha->pi_offset = ob_offset + count; in pm8001_alloc()
316 pm8001_ha->max_memcnt = pi_offset + count; in pm8001_alloc()
318 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_alloc()
320 pm8001_ha->port[i].wide_port_phymap = 0; in pm8001_alloc()
321 pm8001_ha->port[i].port_attached = 0; in pm8001_alloc()
322 pm8001_ha->port[i].port_state = 0; in pm8001_alloc()
323 INIT_LIST_HEAD(&pm8001_ha->port[i].list); in pm8001_alloc()
326 /* MPI Memory region 1 for AAP Event Log for fw */ in pm8001_alloc()
327 pm8001_ha->memoryMap.region[AAP1].num_elements = 1; in pm8001_alloc()
328 pm8001_ha->memoryMap.region[AAP1].element_size = PM8001_EVENT_LOG_SIZE; in pm8001_alloc()
329 pm8001_ha->memoryMap.region[AAP1].total_len = PM8001_EVENT_LOG_SIZE; in pm8001_alloc()
330 pm8001_ha->memoryMap.region[AAP1].alignment = 32; in pm8001_alloc()
333 pm8001_ha->memoryMap.region[IOP].num_elements = 1; in pm8001_alloc()
334 pm8001_ha->memoryMap.region[IOP].element_size = PM8001_EVENT_LOG_SIZE; in pm8001_alloc()
335 pm8001_ha->memoryMap.region[IOP].total_len = PM8001_EVENT_LOG_SIZE; in pm8001_alloc()
336 pm8001_ha->memoryMap.region[IOP].alignment = 32; in pm8001_alloc()
339 ibq = &pm8001_ha->inbnd_q_tbl[i]; in pm8001_alloc()
340 spin_lock_init(&ibq->iq_lock); in pm8001_alloc()
342 pm8001_ha->memoryMap.region[ci_offset+i].num_elements = 1; in pm8001_alloc()
343 pm8001_ha->memoryMap.region[ci_offset+i].element_size = 4; in pm8001_alloc()
344 pm8001_ha->memoryMap.region[ci_offset+i].total_len = 4; in pm8001_alloc()
345 pm8001_ha->memoryMap.region[ci_offset+i].alignment = 4; in pm8001_alloc()
347 if ((ent->driver_data) != chip_8001) { in pm8001_alloc()
349 pm8001_ha->memoryMap.region[ib_offset+i].num_elements = in pm8001_alloc()
351 pm8001_ha->memoryMap.region[ib_offset+i].element_size in pm8001_alloc()
353 pm8001_ha->memoryMap.region[ib_offset+i].total_len = in pm8001_alloc()
355 pm8001_ha->memoryMap.region[ib_offset+i].alignment in pm8001_alloc()
358 pm8001_ha->memoryMap.region[ib_offset+i].num_elements = in pm8001_alloc()
360 pm8001_ha->memoryMap.region[ib_offset+i].element_size in pm8001_alloc()
362 pm8001_ha->memoryMap.region[ib_offset+i].total_len = in pm8001_alloc()
364 pm8001_ha->memoryMap.region[ib_offset+i].alignment = 64; in pm8001_alloc()
369 obq = &pm8001_ha->outbnd_q_tbl[i]; in pm8001_alloc()
370 spin_lock_init(&obq->oq_lock); in pm8001_alloc()
372 pm8001_ha->memoryMap.region[pi_offset+i].num_elements = 1; in pm8001_alloc()
373 pm8001_ha->memoryMap.region[pi_offset+i].element_size = 4; in pm8001_alloc()
374 pm8001_ha->memoryMap.region[pi_offset+i].total_len = 4; in pm8001_alloc()
375 pm8001_ha->memoryMap.region[pi_offset+i].alignment = 4; in pm8001_alloc()
377 if (ent->driver_data != chip_8001) { in pm8001_alloc()
379 pm8001_ha->memoryMap.region[ob_offset+i].num_elements = in pm8001_alloc()
381 pm8001_ha->memoryMap.region[ob_offset+i].element_size in pm8001_alloc()
383 pm8001_ha->memoryMap.region[ob_offset+i].total_len = in pm8001_alloc()
385 pm8001_ha->memoryMap.region[ob_offset+i].alignment in pm8001_alloc()
389 pm8001_ha->memoryMap.region[ob_offset+i].num_elements = in pm8001_alloc()
391 pm8001_ha->memoryMap.region[ob_offset+i].element_size in pm8001_alloc()
393 pm8001_ha->memoryMap.region[ob_offset+i].total_len = in pm8001_alloc()
395 pm8001_ha->memoryMap.region[ob_offset+i].alignment = 64; in pm8001_alloc()
400 pm8001_ha->memoryMap.region[NVMD].num_elements = 1; in pm8001_alloc()
401 pm8001_ha->memoryMap.region[NVMD].element_size = 4096; in pm8001_alloc()
402 pm8001_ha->memoryMap.region[NVMD].total_len = 4096; in pm8001_alloc()
405 pm8001_ha->memoryMap.region[FW_FLASH].total_len = 4096; in pm8001_alloc()
407 pm8001_ha->memoryMap.region[FORENSIC_MEM].num_elements = 1; in pm8001_alloc()
408 pm8001_ha->memoryMap.region[FORENSIC_MEM].total_len = 0x10000; in pm8001_alloc()
409 pm8001_ha->memoryMap.region[FORENSIC_MEM].element_size = 0x10000; in pm8001_alloc()
410 pm8001_ha->memoryMap.region[FORENSIC_MEM].alignment = 0x10000; in pm8001_alloc()
411 for (i = 0; i < pm8001_ha->max_memcnt; i++) { in pm8001_alloc()
412 struct mpi_mem *region = &pm8001_ha->memoryMap.region[i]; in pm8001_alloc()
414 if (pm8001_mem_alloc(pm8001_ha->pdev, in pm8001_alloc()
415 ®ion->virt_ptr, in pm8001_alloc()
416 ®ion->phys_addr, in pm8001_alloc()
417 ®ion->phys_addr_hi, in pm8001_alloc()
418 ®ion->phys_addr_lo, in pm8001_alloc()
419 region->total_len, in pm8001_alloc()
420 region->alignment) != 0) { in pm8001_alloc()
427 pm8001_ha->devices = kzalloc(PM8001_MAX_DEVICES in pm8001_alloc()
429 if (!pm8001_ha->devices) { in pm8001_alloc()
430 rc = -ENOMEM; in pm8001_alloc()
434 pm8001_ha->devices[i].dev_type = SAS_PHY_UNUSED; in pm8001_alloc()
435 pm8001_ha->devices[i].id = i; in pm8001_alloc()
436 pm8001_ha->devices[i].device_id = PM8001_MAX_DEVICES; in pm8001_alloc()
437 atomic_set(&pm8001_ha->devices[i].running_req, 0); in pm8001_alloc()
439 pm8001_ha->flags = PM8001F_INIT_TIME; in pm8001_alloc()
445 for (i = 0; i < pm8001_ha->max_memcnt; i++) { in pm8001_alloc()
446 if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) { in pm8001_alloc()
447 dma_free_coherent(&pm8001_ha->pdev->dev, in pm8001_alloc()
448 (pm8001_ha->memoryMap.region[i].total_len + in pm8001_alloc()
449 pm8001_ha->memoryMap.region[i].alignment), in pm8001_alloc()
450 pm8001_ha->memoryMap.region[i].virt_ptr, in pm8001_alloc()
451 pm8001_ha->memoryMap.region[i].phys_addr); in pm8001_alloc()
455 return 1; in pm8001_alloc()
459 * pm8001_ioremap - remap the pci high physical address to kernel virtual
469 pdev = pm8001_ha->pdev; in pm8001_ioremap()
470 /* map pci mem (PMC pci base 0-3)*/ in pm8001_ioremap()
474 ** bar 0 and 1 - logical BAR0 in pm8001_ioremap()
475 ** bar 2 and 3 - logical BAR1 in pm8001_ioremap()
476 ** bar4 - logical BAR2 in pm8001_ioremap()
477 ** bar5 - logical BAR3 in pm8001_ioremap()
480 if ((bar == 1) || (bar == 3)) in pm8001_ioremap()
483 pm8001_ha->io_mem[logicalBar].membase = in pm8001_ioremap()
485 pm8001_ha->io_mem[logicalBar].memsize = in pm8001_ioremap()
487 pm8001_ha->io_mem[logicalBar].memvirtaddr = in pm8001_ioremap()
488 ioremap(pm8001_ha->io_mem[logicalBar].membase, in pm8001_ioremap()
489 pm8001_ha->io_mem[logicalBar].memsize); in pm8001_ioremap()
490 if (!pm8001_ha->io_mem[logicalBar].memvirtaddr) { in pm8001_ioremap()
494 return -ENOMEM; in pm8001_ioremap()
498 (u64)pm8001_ha->io_mem[logicalBar].membase, in pm8001_ioremap()
500 pm8001_ha->io_mem[logicalBar].memvirtaddr, in pm8001_ioremap()
501 pm8001_ha->io_mem[logicalBar].memsize); in pm8001_ioremap()
503 pm8001_ha->io_mem[logicalBar].membase = 0; in pm8001_ioremap()
504 pm8001_ha->io_mem[logicalBar].memsize = 0; in pm8001_ioremap()
505 pm8001_ha->io_mem[logicalBar].memvirtaddr = NULL; in pm8001_ioremap()
513 * pm8001_pci_alloc - initialize our ha card structure
524 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); in pm8001_pci_alloc() local
527 pm8001_ha = sha->lldd_ha; in pm8001_pci_alloc()
531 pm8001_ha->pdev = pdev; in pm8001_pci_alloc()
532 pm8001_ha->dev = &pdev->dev; in pm8001_pci_alloc()
533 pm8001_ha->chip_id = ent->driver_data; in pm8001_pci_alloc()
534 pm8001_ha->chip = &pm8001_chips[pm8001_ha->chip_id]; in pm8001_pci_alloc()
535 pm8001_ha->irq = pdev->irq; in pm8001_pci_alloc()
536 pm8001_ha->sas = sha; in pm8001_pci_alloc()
537 pm8001_ha->shost = shost; in pm8001_pci_alloc()
538 pm8001_ha->id = pm8001_id++; in pm8001_pci_alloc()
539 pm8001_ha->logging_level = logging_level; in pm8001_pci_alloc()
540 pm8001_ha->non_fatal_count = 0; in pm8001_pci_alloc()
541 if (link_rate >= 1 && link_rate <= 15) in pm8001_pci_alloc()
542 pm8001_ha->link_rate = (link_rate << 8); in pm8001_pci_alloc()
544 pm8001_ha->link_rate = LINKRATE_15 | LINKRATE_30 | in pm8001_pci_alloc()
549 sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id); in pm8001_pci_alloc()
551 if (pm8001_ha->chip_id != chip_8001) in pm8001_pci_alloc()
552 pm8001_ha->iomb_size = IOMB_SIZE_SPCV; in pm8001_pci_alloc()
554 pm8001_ha->iomb_size = IOMB_SIZE_SPC; in pm8001_pci_alloc()
557 /* Tasklet for non msi-x interrupt handler */ in pm8001_pci_alloc()
558 if ((!pdev->msix_cap || !pci_msi_enabled()) in pm8001_pci_alloc()
559 || (pm8001_ha->chip_id == chip_8001)) in pm8001_pci_alloc()
560 tasklet_init(&pm8001_ha->tasklet[0], pm8001_tasklet, in pm8001_pci_alloc()
561 (unsigned long)&(pm8001_ha->irq_vector[0])); in pm8001_pci_alloc()
564 tasklet_init(&pm8001_ha->tasklet[j], pm8001_tasklet, in pm8001_pci_alloc()
565 (unsigned long)&(pm8001_ha->irq_vector[j])); in pm8001_pci_alloc()
577 * pci_go_44 - pm8001 specified, its DMA is 44 bit rather than 64 bit
584 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(44)); in pci_go_44()
586 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); in pci_go_44()
588 dev_printk(KERN_ERR, &pdev->dev, in pci_go_44()
589 "32-bit DMA enable failed\n"); in pci_go_44()
595 * pm8001_prep_sas_ha_init - allocate memory in general hba struct && init them.
605 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); in pm8001_prep_sas_ha_init() local
607 phy_nr = chip_info->n_phy; in pm8001_prep_sas_ha_init()
609 memset(sha, 0x00, sizeof(*sha)); in pm8001_prep_sas_ha_init()
617 sha->sas_phy = arr_phy; in pm8001_prep_sas_ha_init()
618 sha->sas_port = arr_port; in pm8001_prep_sas_ha_init()
619 sha->lldd_ha = kzalloc(sizeof(struct pm8001_hba_info), GFP_KERNEL); in pm8001_prep_sas_ha_init()
620 if (!sha->lldd_ha) in pm8001_prep_sas_ha_init()
623 shost->transportt = pm8001_stt; in pm8001_prep_sas_ha_init()
624 shost->max_id = PM8001_MAX_DEVICES; in pm8001_prep_sas_ha_init()
625 shost->unique_id = pm8001_id; in pm8001_prep_sas_ha_init()
626 shost->max_cmd_len = 16; in pm8001_prep_sas_ha_init()
633 return -1; in pm8001_prep_sas_ha_init()
637 * pm8001_post_sas_ha_init - initialize general hba struct defined in libsas
646 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); in pm8001_post_sas_ha_init() local
648 pm8001_ha = sha->lldd_ha; in pm8001_post_sas_ha_init()
649 for (i = 0; i < chip_info->n_phy; i++) { in pm8001_post_sas_ha_init()
650 sha->sas_phy[i] = &pm8001_ha->phy[i].sas_phy; in pm8001_post_sas_ha_init()
651 sha->sas_port[i] = &pm8001_ha->port[i].sas_port; in pm8001_post_sas_ha_init()
652 sha->sas_phy[i]->sas_addr = in pm8001_post_sas_ha_init()
653 (u8 *)&pm8001_ha->phy[i].dev_sas_addr; in pm8001_post_sas_ha_init()
655 sha->sas_ha_name = DRV_NAME; in pm8001_post_sas_ha_init()
656 sha->dev = pm8001_ha->dev; in pm8001_post_sas_ha_init()
657 sha->strict_wide_ports = 1; in pm8001_post_sas_ha_init()
658 sha->lldd_module = THIS_MODULE; in pm8001_post_sas_ha_init()
659 sha->sas_addr = &pm8001_ha->sas_addr[0]; in pm8001_post_sas_ha_init()
660 sha->num_phys = chip_info->n_phy; in pm8001_post_sas_ha_init()
661 sha->core.shost = shost; in pm8001_post_sas_ha_init()
665 * pm8001_init_sas_add - initialize sas address
685 pci_read_config_word(pm8001_ha->pdev, PCI_DEVICE_ID, &deviceid); in pm8001_init_sas_add()
686 pm8001_ha->nvmd_completion = &completion; in pm8001_init_sas_add()
688 if (pm8001_ha->chip_id == chip_8001) { in pm8001_init_sas_add()
696 } else if ((pm8001_ha->chip_id == chip_8070 || in pm8001_init_sas_add()
697 pm8001_ha->chip_id == chip_8072) && in pm8001_init_sas_add()
698 pm8001_ha->pdev->subsystem_vendor == PCI_VENDOR_ID_ATTO) { in pm8001_init_sas_add()
702 payload.minor_function = 1; in pm8001_init_sas_add()
711 rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload); in pm8001_init_sas_add()
720 if (pm8001_ha->chip_id == chip_8001) { in pm8001_init_sas_add()
722 pm8001_ha->sas_addr[j] = in pm8001_init_sas_add()
725 pm8001_ha->sas_addr[j] = in pm8001_init_sas_add()
727 } else if ((pm8001_ha->chip_id == chip_8070 || in pm8001_init_sas_add()
728 pm8001_ha->chip_id == chip_8072) && in pm8001_init_sas_add()
729 pm8001_ha->pdev->subsystem_vendor == PCI_VENDOR_ID_ATTO) { in pm8001_init_sas_add()
730 pm8001_ha->sas_addr[j] = in pm8001_init_sas_add()
733 pm8001_ha->sas_addr[j] = in pm8001_init_sas_add()
736 memcpy(sas_add, pm8001_ha->sas_addr, SAS_ADDR_SIZE); in pm8001_init_sas_add()
737 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_init_sas_add()
740 memcpy(&pm8001_ha->phy[i].dev_sas_addr, in pm8001_init_sas_add()
743 pm8001_ha->phy[i].dev_sas_addr); in pm8001_init_sas_add()
747 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_init_sas_add()
748 pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL; in pm8001_init_sas_add()
749 pm8001_ha->phy[i].dev_sas_addr = in pm8001_init_sas_add()
751 (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr)); in pm8001_init_sas_add()
753 memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr, in pm8001_init_sas_add()
771 pm8001_ha->nvmd_completion = &completion; in pm8001_get_phy_settings_info()
778 return -ENOMEM; in pm8001_get_phy_settings_info()
780 rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload); in pm8001_get_phy_settings_info()
784 return -ENOMEM; in pm8001_get_phy_settings_info()
806 * pm8001_get_internal_phy_settings - Retrieves the internal PHY settings
814 phycfg->LaneLosCfg = 0x00000132; in pm8001_get_internal_phy_settings()
815 phycfg->LanePgaCfg1 = 0x00203949; in pm8001_get_internal_phy_settings()
816 phycfg->LanePisoCfg1 = 0x000000FF; in pm8001_get_internal_phy_settings()
817 phycfg->LanePisoCfg2 = 0xFF000001; in pm8001_get_internal_phy_settings()
818 phycfg->LanePisoCfg3 = 0xE7011300; in pm8001_get_internal_phy_settings()
819 phycfg->LanePisoCfg4 = 0x631C40C0; in pm8001_get_internal_phy_settings()
820 phycfg->LanePisoCfg5 = 0xF8102036; in pm8001_get_internal_phy_settings()
821 phycfg->LanePisoCfg6 = 0xF74A1000; in pm8001_get_internal_phy_settings()
822 phycfg->LaneBctCtrl = 0x00FB33F8; in pm8001_get_internal_phy_settings()
826 * pm8001_get_external_phy_settings - Retrieves the external PHY settings
834 phycfg->LaneLosCfg = 0x00000132; in pm8001_get_external_phy_settings()
835 phycfg->LanePgaCfg1 = 0x00203949; in pm8001_get_external_phy_settings()
836 phycfg->LanePisoCfg1 = 0x000000FF; in pm8001_get_external_phy_settings()
837 phycfg->LanePisoCfg2 = 0xFF000001; in pm8001_get_external_phy_settings()
838 phycfg->LanePisoCfg3 = 0xE7011300; in pm8001_get_external_phy_settings()
839 phycfg->LanePisoCfg4 = 0x63349140; in pm8001_get_external_phy_settings()
840 phycfg->LanePisoCfg5 = 0xF8102036; in pm8001_get_external_phy_settings()
841 phycfg->LanePisoCfg6 = 0xF80D9300; in pm8001_get_external_phy_settings()
842 phycfg->LaneBctCtrl = 0x00FB33F8; in pm8001_get_external_phy_settings()
846 * pm8001_get_phy_mask - Retrieves the mask that denotes if a PHY is int/ext
853 switch (pm8001_ha->pdev->subsystem_device) { in pm8001_get_phy_mask()
854 case 0x0070: /* H1280 - 8 external 0 internal */ in pm8001_get_phy_mask()
855 case 0x0072: /* H12F0 - 16 external 0 internal */ in pm8001_get_phy_mask()
859 case 0x0071: /* H1208 - 0 external 8 internal */ in pm8001_get_phy_mask()
860 case 0x0073: /* H120F - 0 external 16 internal */ in pm8001_get_phy_mask()
864 case 0x0080: /* H1244 - 4 external 4 internal */ in pm8001_get_phy_mask()
868 case 0x0081: /* H1248 - 4 external 8 internal */ in pm8001_get_phy_mask()
872 case 0x0082: /* H1288 - 8 external 8 internal */ in pm8001_get_phy_mask()
879 pm8001_ha->pdev->subsystem_device); in pm8001_get_phy_mask()
884 * pm8001_set_phy_settings_ven_117c_12G() - Configure ATTO 12Gb PHY settings
902 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_set_phy_settings_ven_117c_12G()
903 if (phymask & (1 << i)) {/* Internal PHY */ in pm8001_set_phy_settings_ven_117c_12G()
919 * pm8001_configure_phy_settings - Configures PHY settings based on vendor ID.
924 switch (pm8001_ha->pdev->subsystem_vendor) { in pm8001_configure_phy_settings()
926 if (pm8001_ha->pdev->device == 0x0042) /* 6Gb */ in pm8001_configure_phy_settings()
942 * pm8001_setup_msix - enable MSI-X interrupt
950 /* SPCv controllers supports 64 msi-x */ in pm8001_setup_msix()
951 if (pm8001_ha->chip_id == chip_8001) { in pm8001_setup_msix()
952 rc = pci_alloc_irq_vectors(pm8001_ha->pdev, 1, 1, in pm8001_setup_msix()
960 .pre_vectors = 1, in pm8001_setup_msix()
963 pm8001_ha->pdev, 2, PM8001_MAX_MSIX_VEC, in pm8001_setup_msix()
972 pm8001_ha->number_of_intr = allocated_irq_vectors; in pm8001_setup_msix()
975 pm8001_ha->max_q_num = allocated_irq_vectors; in pm8001_setup_msix()
979 rc, pm8001_ha->number_of_intr); in pm8001_setup_msix()
987 int nr_irqs = pm8001_ha->number_of_intr; in pm8001_request_msix()
989 if (pm8001_ha->chip_id != chip_8001) in pm8001_request_msix()
994 pm8001_ha->number_of_intr); in pm8001_request_msix()
996 if (nr_irqs > ARRAY_SIZE(pm8001_ha->intr_drvname)) in pm8001_request_msix()
997 nr_irqs = ARRAY_SIZE(pm8001_ha->intr_drvname); in pm8001_request_msix()
1000 snprintf(pm8001_ha->intr_drvname[i], in pm8001_request_msix()
1001 sizeof(pm8001_ha->intr_drvname[0]), in pm8001_request_msix()
1002 "%s-%d", pm8001_ha->name, i); in pm8001_request_msix()
1003 pm8001_ha->irq_vector[i].irq_id = i; in pm8001_request_msix()
1004 pm8001_ha->irq_vector[i].drv_inst = pm8001_ha; in pm8001_request_msix()
1006 rc = request_irq(pci_irq_vector(pm8001_ha->pdev, i), in pm8001_request_msix()
1008 pm8001_ha->intr_drvname[i], in pm8001_request_msix()
1009 &(pm8001_ha->irq_vector[i])); in pm8001_request_msix()
1012 free_irq(pci_irq_vector(pm8001_ha->pdev, i), in pm8001_request_msix()
1013 &(pm8001_ha->irq_vector[i])); in pm8001_request_msix()
1015 pci_free_irq_vectors(pm8001_ha->pdev); in pm8001_request_msix()
1028 pdev = pm8001_ha->pdev; in pm8001_setup_irq()
1039 * pm8001_request_irq - register interrupt
1047 pdev = pm8001_ha->pdev; in pm8001_request_irq()
1050 if (pdev->msix_cap && pci_msi_enabled()) in pm8001_request_irq()
1059 /* initialize the INT-X interrupt */ in pm8001_request_irq()
1060 pm8001_ha->irq_vector[0].irq_id = 0; in pm8001_request_irq()
1061 pm8001_ha->irq_vector[0].drv_inst = pm8001_ha; in pm8001_request_irq()
1062 rc = request_irq(pdev->irq, pm8001_interrupt_handler_intx, IRQF_SHARED, in pm8001_request_irq()
1063 pm8001_ha->name, SHOST_TO_SAS_HA(pm8001_ha->shost)); in pm8001_request_irq()
1068 * pm8001_pci_probe - probe supported device
1085 struct sas_ha_struct *sha; in pm8001_pci_probe() local
1087 dev_printk(KERN_INFO, &pdev->dev, in pm8001_pci_probe()
1110 rc = -ENOMEM; in pm8001_pci_probe()
1113 chip = &pm8001_chips[ent->driver_data]; in pm8001_pci_probe()
1114 sha = kzalloc(sizeof(struct sas_ha_struct), GFP_KERNEL); in pm8001_pci_probe()
1115 if (!sha) { in pm8001_pci_probe()
1116 rc = -ENOMEM; in pm8001_pci_probe()
1119 SHOST_TO_SAS_HA(shost) = sha; in pm8001_pci_probe()
1123 rc = -ENOMEM; in pm8001_pci_probe()
1127 /* ent->driver variable is used to differentiate between controllers */ in pm8001_pci_probe()
1130 rc = -ENOMEM; in pm8001_pci_probe()
1134 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); in pm8001_pci_probe()
1135 rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); in pm8001_pci_probe()
1147 PM8001_CHIP_DISP->chip_post_init(pm8001_ha); in pm8001_pci_probe()
1149 if (pm8001_ha->number_of_intr > 1) { in pm8001_pci_probe()
1150 shost->nr_hw_queues = pm8001_ha->number_of_intr - 1; in pm8001_pci_probe()
1156 shost->host_tagset = 1; in pm8001_pci_probe()
1159 rc = scsi_add_host(shost, &pdev->dev); in pm8001_pci_probe()
1163 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0); in pm8001_pci_probe()
1164 if (pm8001_ha->chip_id != chip_8001) { in pm8001_pci_probe()
1165 for (i = 1; i < pm8001_ha->number_of_intr; i++) in pm8001_pci_probe()
1166 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, i); in pm8001_pci_probe()
1184 list_add_tail(&pm8001_ha->list, &hba_list); in pm8001_pci_probe()
1185 pm8001_ha->flags = PM8001F_RUN_TIME; in pm8001_pci_probe()
1186 scsi_scan_host(pm8001_ha->shost); in pm8001_pci_probe()
1190 scsi_remove_host(pm8001_ha->shost); in pm8001_pci_probe()
1194 kfree(sha); in pm8001_pci_probe()
1206 * pm8001_init_ccb_tag - allocate memory to CCB and tag.
1211 struct Scsi_Host *shost = pm8001_ha->shost; in pm8001_init_ccb_tag()
1212 struct device *dev = pm8001_ha->dev; in pm8001_init_ccb_tag()
1217 max_out_io = pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io; in pm8001_init_ccb_tag()
1221 can_queue = ccb_count - PM8001_RESERVE_SLOT; in pm8001_init_ccb_tag()
1222 shost->can_queue = can_queue; in pm8001_init_ccb_tag()
1224 pm8001_ha->tags = bitmap_zalloc(ccb_count, GFP_KERNEL); in pm8001_init_ccb_tag()
1225 if (!pm8001_ha->tags) in pm8001_init_ccb_tag()
1229 pm8001_ha->ccb_count = ccb_count; in pm8001_init_ccb_tag()
1230 pm8001_ha->ccb_info = in pm8001_init_ccb_tag()
1232 if (!pm8001_ha->ccb_info) { in pm8001_init_ccb_tag()
1238 pm8001_ha->ccb_info[i].buf_prd = dma_alloc_coherent(dev, in pm8001_init_ccb_tag()
1240 &pm8001_ha->ccb_info[i].ccb_dma_handle, in pm8001_init_ccb_tag()
1242 if (!pm8001_ha->ccb_info[i].buf_prd) { in pm8001_init_ccb_tag()
1247 pm8001_ha->ccb_info[i].task = NULL; in pm8001_init_ccb_tag()
1248 pm8001_ha->ccb_info[i].ccb_tag = PM8001_INVALID_TAG; in pm8001_init_ccb_tag()
1249 pm8001_ha->ccb_info[i].device = NULL; in pm8001_init_ccb_tag()
1250 ++pm8001_ha->tags_num; in pm8001_init_ccb_tag()
1256 kfree(pm8001_ha->devices); in pm8001_init_ccb_tag()
1258 return -ENOMEM; in pm8001_init_ccb_tag()
1263 struct sas_ha_struct *sha = pci_get_drvdata(pdev); in pm8001_pci_remove() local
1266 pm8001_ha = sha->lldd_ha; in pm8001_pci_remove()
1267 sas_unregister_ha(sha); in pm8001_pci_remove()
1268 sas_remove_host(pm8001_ha->shost); in pm8001_pci_remove()
1269 list_del(&pm8001_ha->list); in pm8001_pci_remove()
1270 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF); in pm8001_pci_remove()
1271 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); in pm8001_pci_remove()
1274 for (i = 0; i < pm8001_ha->number_of_intr; i++) in pm8001_pci_remove()
1276 for (i = 0; i < pm8001_ha->number_of_intr; i++) in pm8001_pci_remove()
1277 free_irq(pci_irq_vector(pdev, i), &pm8001_ha->irq_vector[i]); in pm8001_pci_remove()
1280 free_irq(pm8001_ha->irq, sha); in pm8001_pci_remove()
1283 /* For non-msix and msix interrupts */ in pm8001_pci_remove()
1284 if ((!pdev->msix_cap || !pci_msi_enabled()) || in pm8001_pci_remove()
1285 (pm8001_ha->chip_id == chip_8001)) in pm8001_pci_remove()
1286 tasklet_kill(&pm8001_ha->tasklet[0]); in pm8001_pci_remove()
1289 tasklet_kill(&pm8001_ha->tasklet[j]); in pm8001_pci_remove()
1291 scsi_host_put(pm8001_ha->shost); in pm8001_pci_remove()
1293 for (i = 0; i < pm8001_ha->ccb_count; i++) { in pm8001_pci_remove()
1294 dma_free_coherent(&pm8001_ha->pdev->dev, in pm8001_pci_remove()
1296 pm8001_ha->ccb_info[i].buf_prd, in pm8001_pci_remove()
1297 pm8001_ha->ccb_info[i].ccb_dma_handle); in pm8001_pci_remove()
1299 kfree(pm8001_ha->ccb_info); in pm8001_pci_remove()
1300 kfree(pm8001_ha->devices); in pm8001_pci_remove()
1303 kfree(sha->sas_phy); in pm8001_pci_remove()
1304 kfree(sha->sas_port); in pm8001_pci_remove()
1305 kfree(sha); in pm8001_pci_remove()
1311 * pm8001_pci_suspend - power management suspend main entry point
1319 struct sas_ha_struct *sha = pci_get_drvdata(pdev); in pm8001_pci_suspend() local
1320 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; in pm8001_pci_suspend()
1322 sas_suspend_ha(sha); in pm8001_pci_suspend()
1324 scsi_block_requests(pm8001_ha->shost); in pm8001_pci_suspend()
1325 if (!pdev->pm_cap) { in pm8001_pci_suspend()
1327 return -ENODEV; in pm8001_pci_suspend()
1329 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF); in pm8001_pci_suspend()
1330 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); in pm8001_pci_suspend()
1332 for (i = 0; i < pm8001_ha->number_of_intr; i++) in pm8001_pci_suspend()
1334 for (i = 0; i < pm8001_ha->number_of_intr; i++) in pm8001_pci_suspend()
1335 free_irq(pci_irq_vector(pdev, i), &pm8001_ha->irq_vector[i]); in pm8001_pci_suspend()
1338 free_irq(pm8001_ha->irq, sha); in pm8001_pci_suspend()
1341 /* For non-msix and msix interrupts */ in pm8001_pci_suspend()
1342 if ((!pdev->msix_cap || !pci_msi_enabled()) || in pm8001_pci_suspend()
1343 (pm8001_ha->chip_id == chip_8001)) in pm8001_pci_suspend()
1344 tasklet_kill(&pm8001_ha->tasklet[0]); in pm8001_pci_suspend()
1347 tasklet_kill(&pm8001_ha->tasklet[j]); in pm8001_pci_suspend()
1351 pm8001_ha->name); in pm8001_pci_suspend()
1356 * pm8001_pci_resume - power management resume main entry point
1364 struct sas_ha_struct *sha = pci_get_drvdata(pdev); in pm8001_pci_resume() local
1370 pm8001_ha = sha->lldd_ha; in pm8001_pci_resume()
1374 pdev, pm8001_ha->name, pdev->current_state); in pm8001_pci_resume()
1379 sas_prep_resume_ha(sha); in pm8001_pci_resume()
1381 if (pm8001_ha->chip_id == chip_8001) { in pm8001_pci_resume()
1382 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); in pm8001_pci_resume()
1385 rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); in pm8001_pci_resume()
1390 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF); in pm8001_pci_resume()
1396 /* Tasklet for non msi-x interrupt handler */ in pm8001_pci_resume()
1397 if ((!pdev->msix_cap || !pci_msi_enabled()) || in pm8001_pci_resume()
1398 (pm8001_ha->chip_id == chip_8001)) in pm8001_pci_resume()
1399 tasklet_init(&pm8001_ha->tasklet[0], pm8001_tasklet, in pm8001_pci_resume()
1400 (unsigned long)&(pm8001_ha->irq_vector[0])); in pm8001_pci_resume()
1403 tasklet_init(&pm8001_ha->tasklet[j], pm8001_tasklet, in pm8001_pci_resume()
1404 (unsigned long)&(pm8001_ha->irq_vector[j])); in pm8001_pci_resume()
1406 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0); in pm8001_pci_resume()
1407 if (pm8001_ha->chip_id != chip_8001) { in pm8001_pci_resume()
1408 for (i = 1; i < pm8001_ha->number_of_intr; i++) in pm8001_pci_resume()
1409 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, i); in pm8001_pci_resume()
1417 if (pm8001_ha->chip_id == chip_8070 || in pm8001_pci_resume()
1418 pm8001_ha->chip_id == chip_8072) { in pm8001_pci_resume()
1424 pm8001_ha->flags = PM8001F_RUN_TIME; in pm8001_pci_resume()
1425 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_pci_resume()
1426 pm8001_ha->phy[i].enable_completion = &completion; in pm8001_pci_resume()
1427 PM8001_CHIP_DISP->phy_start_req(pm8001_ha, i); in pm8001_pci_resume()
1430 sas_resume_ha(sha); in pm8001_pci_resume()
1434 scsi_remove_host(pm8001_ha->shost); in pm8001_pci_resume()
1531 * pm8001_init - initialize scsi transport template
1535 int rc = -ENOMEM; in pm8001_init()
1573 "PMC-Sierra PM8001/8006/8081/8088/8089/8074/8076/8077/8070/8072 "