Lines Matching defs:mvumi_hw_regs
34 struct mvumi_hw_regs { struct
36 void *main_int_cause_reg;
37 void *enpointa_mask_reg;
38 void *enpointb_mask_reg;
39 void *rstoutn_en_reg;
40 void *ctrl_sts_reg;
41 void *rstoutn_mask_reg;
42 void *sys_soft_rst_reg;
45 void *pciea_to_arm_drbl_reg;
46 void *arm_to_pciea_drbl_reg;
47 void *arm_to_pciea_mask_reg;
48 void *pciea_to_arm_msg0;
49 void *pciea_to_arm_msg1;
50 void *arm_to_pciea_msg0;
51 void *arm_to_pciea_msg1;
54 void *reset_request;
55 void *reset_enable;
58 void *inb_list_basel;
59 void *inb_list_baseh;
60 void *inb_aval_count_basel;
61 void *inb_aval_count_baseh;
62 void *inb_write_pointer;
63 void *inb_read_pointer;
64 void *outb_list_basel;
65 void *outb_list_baseh;
66 void *outb_copy_basel;
67 void *outb_copy_baseh;
68 void *outb_copy_pointer;
69 void *outb_read_pointer;
70 void *inb_isr_cause;
71 void *outb_isr_cause;
72 void *outb_coal_cfg;
73 void *outb_coal_timeout;
76 u32 int_comaout;
77 u32 int_comaerr;
78 u32 int_dl_cpu2pciea;
79 u32 int_mu;
80 u32 int_drbl_int_mask;
81 u32 int_main_int_mask;
82 u32 cl_pointer_toggle;
83 u32 cl_slot_num_mask;
84 u32 clic_irq;
85 u32 clic_in_err;
86 u32 clic_out_err;