Lines Matching +full:sha +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
17 [chip_6320] = { 1, 2, 0x400, 17, 16, 6, 9, &mvs_64xx_dispatch, },
18 [chip_6440] = { 1, 4, 0x400, 17, 16, 6, 9, &mvs_64xx_dispatch, },
19 [chip_6485] = { 1, 8, 0x800, 33, 32, 6, 10, &mvs_64xx_dispatch, },
22 [chip_9445] = { 1, 4, 0x800, 17, 64, 8, 11, &mvs_94xx_dispatch, },
24 [chip_1300] = { 1, 4, 0x400, 17, 16, 6, 9, &mvs_64xx_dispatch, },
43 .can_queue = 1,
44 .this_id = -1,
56 .track_queue_depth = 1,
80 struct mvs_phy *phy = &mvi->phy[phy_id]; in mvs_phy_init()
81 struct asd_sas_phy *sas_phy = &phy->sas_phy; in mvs_phy_init()
83 phy->mvi = mvi; in mvs_phy_init()
84 phy->port = NULL; in mvs_phy_init()
85 timer_setup(&phy->timer, NULL, 0); in mvs_phy_init()
86 sas_phy->enabled = (phy_id < mvi->chip->n_phy) ? 1 : 0; in mvs_phy_init()
87 sas_phy->class = SAS; in mvs_phy_init()
88 sas_phy->iproto = SAS_PROTOCOL_ALL; in mvs_phy_init()
89 sas_phy->tproto = 0; in mvs_phy_init()
90 sas_phy->type = PHY_TYPE_PHYSICAL; in mvs_phy_init()
91 sas_phy->role = PHY_ROLE_INITIATOR; in mvs_phy_init()
92 sas_phy->oob_mode = OOB_NOT_CONNECTED; in mvs_phy_init()
93 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN; in mvs_phy_init()
95 sas_phy->id = phy_id; in mvs_phy_init()
96 sas_phy->sas_addr = &mvi->sas_addr[0]; in mvs_phy_init()
97 sas_phy->frame_rcvd = &phy->frame_rcvd[0]; in mvs_phy_init()
98 sas_phy->ha = (struct sas_ha_struct *)mvi->shost->hostdata; in mvs_phy_init()
99 sas_phy->lldd_phy = phy; in mvs_phy_init()
110 if (mvi->flags & MVF_FLAG_SOC) in mvs_free()
115 dma_pool_destroy(mvi->dma_pool); in mvs_free()
117 if (mvi->tx) in mvs_free()
118 dma_free_coherent(mvi->dev, in mvs_free()
119 sizeof(*mvi->tx) * MVS_CHIP_SLOT_SZ, in mvs_free()
120 mvi->tx, mvi->tx_dma); in mvs_free()
121 if (mvi->rx_fis) in mvs_free()
122 dma_free_coherent(mvi->dev, MVS_RX_FISL_SZ, in mvs_free()
123 mvi->rx_fis, mvi->rx_fis_dma); in mvs_free()
124 if (mvi->rx) in mvs_free()
125 dma_free_coherent(mvi->dev, in mvs_free()
126 sizeof(*mvi->rx) * (MVS_RX_RING_SZ + 1), in mvs_free()
127 mvi->rx, mvi->rx_dma); in mvs_free()
128 if (mvi->slot) in mvs_free()
129 dma_free_coherent(mvi->dev, in mvs_free()
130 sizeof(*mvi->slot) * slot_nr, in mvs_free()
131 mvi->slot, mvi->slot_dma); in mvs_free()
133 if (mvi->bulk_buffer) in mvs_free()
134 dma_free_coherent(mvi->dev, TRASH_BUCKET_SIZE, in mvs_free()
135 mvi->bulk_buffer, mvi->bulk_buffer_dma); in mvs_free()
136 if (mvi->bulk_buffer1) in mvs_free()
137 dma_free_coherent(mvi->dev, TRASH_BUCKET_SIZE, in mvs_free()
138 mvi->bulk_buffer1, mvi->bulk_buffer_dma1); in mvs_free()
140 MVS_CHIP_DISP->chip_iounmap(mvi); in mvs_free()
141 if (mvi->shost) in mvs_free()
142 scsi_host_put(mvi->shost); in mvs_free()
143 list_for_each_entry(mwq, &mvi->wq_list, entry) in mvs_free()
144 cancel_delayed_work(&mwq->work_q); in mvs_free()
145 kfree(mvi->tags); in mvs_free()
156 struct sas_ha_struct *sha = (struct sas_ha_struct *)opaque; in mvs_tasklet() local
158 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; in mvs_tasklet()
159 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[0]; in mvs_tasklet()
162 BUG_ON(1); in mvs_tasklet()
164 stat = MVS_CHIP_DISP->isr_status(mvi, mvi->pdev->irq); in mvs_tasklet()
169 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[i]; in mvs_tasklet()
170 MVS_CHIP_DISP->isr(mvi, mvi->pdev->irq, stat); in mvs_tasklet()
173 MVS_CHIP_DISP->interrupt_enable(mvi); in mvs_tasklet()
182 struct sas_ha_struct *sha = opaque; in mvs_interrupt() local
187 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; in mvs_interrupt()
190 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[0]; in mvs_interrupt()
195 MVS_CHIP_DISP->interrupt_disable(mvi); in mvs_interrupt()
198 stat = MVS_CHIP_DISP->isr_status(mvi, irq); in mvs_interrupt()
201 MVS_CHIP_DISP->interrupt_enable(mvi); in mvs_interrupt()
207 tasklet_schedule(&((struct mvs_prv_info *)sha->lldd_ha)->mv_tasklet); in mvs_interrupt()
210 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[i]; in mvs_interrupt()
211 MVS_CHIP_DISP->isr(mvi, irq, stat); in mvs_interrupt()
222 if (mvi->flags & MVF_FLAG_SOC) in mvs_alloc()
227 spin_lock_init(&mvi->lock); in mvs_alloc()
228 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_alloc()
230 mvi->port[i].wide_port_phymap = 0; in mvs_alloc()
231 mvi->port[i].port_attached = 0; in mvs_alloc()
232 INIT_LIST_HEAD(&mvi->port[i].list); in mvs_alloc()
235 mvi->devices[i].taskfileset = MVS_ID_NOT_MAPPED; in mvs_alloc()
236 mvi->devices[i].dev_type = SAS_PHY_UNUSED; in mvs_alloc()
237 mvi->devices[i].device_id = i; in mvs_alloc()
238 mvi->devices[i].dev_status = MVS_DEV_NORMAL; in mvs_alloc()
244 mvi->tx = dma_alloc_coherent(mvi->dev, in mvs_alloc()
245 sizeof(*mvi->tx) * MVS_CHIP_SLOT_SZ, in mvs_alloc()
246 &mvi->tx_dma, GFP_KERNEL); in mvs_alloc()
247 if (!mvi->tx) in mvs_alloc()
249 mvi->rx_fis = dma_alloc_coherent(mvi->dev, MVS_RX_FISL_SZ, in mvs_alloc()
250 &mvi->rx_fis_dma, GFP_KERNEL); in mvs_alloc()
251 if (!mvi->rx_fis) in mvs_alloc()
254 mvi->rx = dma_alloc_coherent(mvi->dev, in mvs_alloc()
255 sizeof(*mvi->rx) * (MVS_RX_RING_SZ + 1), in mvs_alloc()
256 &mvi->rx_dma, GFP_KERNEL); in mvs_alloc()
257 if (!mvi->rx) in mvs_alloc()
259 mvi->rx[0] = cpu_to_le32(0xfff); in mvs_alloc()
260 mvi->rx_cons = 0xfff; in mvs_alloc()
262 mvi->slot = dma_alloc_coherent(mvi->dev, in mvs_alloc()
263 sizeof(*mvi->slot) * slot_nr, in mvs_alloc()
264 &mvi->slot_dma, GFP_KERNEL); in mvs_alloc()
265 if (!mvi->slot) in mvs_alloc()
268 mvi->bulk_buffer = dma_alloc_coherent(mvi->dev, in mvs_alloc()
270 &mvi->bulk_buffer_dma, GFP_KERNEL); in mvs_alloc()
271 if (!mvi->bulk_buffer) in mvs_alloc()
274 mvi->bulk_buffer1 = dma_alloc_coherent(mvi->dev, in mvs_alloc()
276 &mvi->bulk_buffer_dma1, GFP_KERNEL); in mvs_alloc()
277 if (!mvi->bulk_buffer1) in mvs_alloc()
280 sprintf(pool_name, "%s%d", "mvs_dma_pool", mvi->id); in mvs_alloc()
281 mvi->dma_pool = dma_pool_create(pool_name, &mvi->pdev->dev, in mvs_alloc()
283 if (!mvi->dma_pool) { in mvs_alloc()
287 mvi->tags_num = slot_nr; in mvs_alloc()
293 return 1; in mvs_alloc()
300 struct pci_dev *pdev = mvi->pdev; in mvs_ioremap()
301 if (bar_ex != -1) { in mvs_ioremap()
312 mvi->regs_ex = ioremap(res_start, res_len); in mvs_ioremap()
314 mvi->regs_ex = (void *)res_start; in mvs_ioremap()
315 if (!mvi->regs_ex) in mvs_ioremap()
322 iounmap(mvi->regs_ex); in mvs_ioremap()
323 mvi->regs_ex = NULL; in mvs_ioremap()
327 mvi->regs = ioremap(res_start, res_len); in mvs_ioremap()
329 if (!mvi->regs) { in mvs_ioremap()
330 if (mvi->regs_ex && (res_flag_ex & IORESOURCE_MEM)) in mvs_ioremap()
331 iounmap(mvi->regs_ex); in mvs_ioremap()
332 mvi->regs_ex = NULL; in mvs_ioremap()
338 return -1; in mvs_ioremap()
351 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); in mvs_pci_alloc() local
354 (1L << mvs_chips[ent->driver_data].slot_width) * in mvs_pci_alloc()
359 mvi->pdev = pdev; in mvs_pci_alloc()
360 mvi->dev = &pdev->dev; in mvs_pci_alloc()
361 mvi->chip_id = ent->driver_data; in mvs_pci_alloc()
362 mvi->chip = &mvs_chips[mvi->chip_id]; in mvs_pci_alloc()
363 INIT_LIST_HEAD(&mvi->wq_list); in mvs_pci_alloc()
365 ((struct mvs_prv_info *)sha->lldd_ha)->mvi[id] = mvi; in mvs_pci_alloc()
366 ((struct mvs_prv_info *)sha->lldd_ha)->n_phy = mvi->chip->n_phy; in mvs_pci_alloc()
368 mvi->id = id; in mvs_pci_alloc()
369 mvi->sas = sha; in mvs_pci_alloc()
370 mvi->shost = shost; in mvs_pci_alloc()
372 mvi->tags = kzalloc(MVS_CHIP_SLOT_SZ>>3, GFP_KERNEL); in mvs_pci_alloc()
373 if (!mvi->tags) in mvs_pci_alloc()
376 if (MVS_CHIP_DISP->chip_ioremap(mvi)) in mvs_pci_alloc()
389 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in pci_go_64()
391 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); in pci_go_64()
393 dev_printk(KERN_ERR, &pdev->dev, in pci_go_64()
394 "32-bit DMA enable failed\n"); in pci_go_64()
408 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); in mvs_prep_sas_ha_init() local
410 core_nr = chip_info->n_host; in mvs_prep_sas_ha_init()
411 phy_nr = core_nr * chip_info->n_phy; in mvs_prep_sas_ha_init()
414 memset(sha, 0x00, sizeof(struct sas_ha_struct)); in mvs_prep_sas_ha_init()
420 sha->sas_phy = arr_phy; in mvs_prep_sas_ha_init()
421 sha->sas_port = arr_port; in mvs_prep_sas_ha_init()
422 sha->core.shost = shost; in mvs_prep_sas_ha_init()
424 sha->lldd_ha = kzalloc(sizeof(struct mvs_prv_info), GFP_KERNEL); in mvs_prep_sas_ha_init()
425 if (!sha->lldd_ha) in mvs_prep_sas_ha_init()
428 ((struct mvs_prv_info *)sha->lldd_ha)->n_host = core_nr; in mvs_prep_sas_ha_init()
430 shost->transportt = mvs_stt; in mvs_prep_sas_ha_init()
431 shost->max_id = MVS_MAX_DEVICES; in mvs_prep_sas_ha_init()
432 shost->max_lun = ~0; in mvs_prep_sas_ha_init()
433 shost->max_channel = 1; in mvs_prep_sas_ha_init()
434 shost->max_cmd_len = 16; in mvs_prep_sas_ha_init()
440 return -1; in mvs_prep_sas_ha_init()
449 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); in mvs_post_sas_ha_init() local
450 unsigned short nr_core = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; in mvs_post_sas_ha_init()
453 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j]; in mvs_post_sas_ha_init()
454 for (i = 0; i < chip_info->n_phy; i++) { in mvs_post_sas_ha_init()
455 sha->sas_phy[j * chip_info->n_phy + i] = in mvs_post_sas_ha_init()
456 &mvi->phy[i].sas_phy; in mvs_post_sas_ha_init()
457 sha->sas_port[j * chip_info->n_phy + i] = in mvs_post_sas_ha_init()
458 &mvi->port[i].sas_port; in mvs_post_sas_ha_init()
462 sha->sas_ha_name = DRV_NAME; in mvs_post_sas_ha_init()
463 sha->dev = mvi->dev; in mvs_post_sas_ha_init()
464 sha->lldd_module = THIS_MODULE; in mvs_post_sas_ha_init()
465 sha->sas_addr = &mvi->sas_addr[0]; in mvs_post_sas_ha_init()
467 sha->num_phys = nr_core * chip_info->n_phy; in mvs_post_sas_ha_init()
469 if (mvi->flags & MVF_FLAG_SOC) in mvs_post_sas_ha_init()
474 shost->sg_tablesize = min_t(u16, SG_ALL, MVS_MAX_SG); in mvs_post_sas_ha_init()
475 shost->can_queue = can_queue; in mvs_post_sas_ha_init()
476 mvi->shost->cmd_per_lun = MVS_QUEUE_SIZE; in mvs_post_sas_ha_init()
477 sha->core.shost = mvi->shost; in mvs_post_sas_ha_init()
483 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_init_sas_add()
484 mvi->phy[i].dev_sas_addr = 0x5005043011ab0000ULL; in mvs_init_sas_add()
485 mvi->phy[i].dev_sas_addr = in mvs_init_sas_add()
486 cpu_to_be64((u64)(*(u64 *)&mvi->phy[i].dev_sas_addr)); in mvs_init_sas_add()
489 memcpy(mvi->sas_addr, &mvi->phy[0].dev_sas_addr, SAS_ADDR_SIZE); in mvs_init_sas_add()
500 dev_printk(KERN_INFO, &pdev->dev, in mvs_pci_init()
518 rc = -ENOMEM; in mvs_pci_init()
522 chip = &mvs_chips[ent->driver_data]; in mvs_pci_init()
524 kcalloc(1, sizeof(struct sas_ha_struct), GFP_KERNEL); in mvs_pci_init()
527 rc = -ENOMEM; in mvs_pci_init()
534 rc = -ENOMEM; in mvs_pci_init()
543 rc = -ENOMEM; in mvs_pci_init()
547 memset(&mvi->hba_info_param, 0xFF, in mvs_pci_init()
552 mvi->instance = nhost; in mvs_pci_init()
553 rc = MVS_CHIP_DISP->chip_init(mvi); in mvs_pci_init()
559 } while (nhost < chip->n_host); in mvs_pci_init()
562 struct mvs_prv_info *mpi = SHOST_TO_SAS_HA(shost)->lldd_ha; in mvs_pci_init()
564 tasklet_init(&(mpi->mv_tasklet), mvs_tasklet, in mvs_pci_init()
571 rc = scsi_add_host(shost, &pdev->dev); in mvs_pci_init()
578 rc = request_irq(pdev->irq, irq_handler, IRQF_SHARED, in mvs_pci_init()
583 MVS_CHIP_DISP->interrupt_enable(mvi); in mvs_pci_init()
585 scsi_scan_host(mvi->shost); in mvs_pci_init()
592 scsi_remove_host(mvi->shost); in mvs_pci_init()
604 struct sas_ha_struct *sha = pci_get_drvdata(pdev); in mvs_pci_remove() local
607 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; in mvs_pci_remove()
608 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[0]; in mvs_pci_remove()
611 tasklet_kill(&((struct mvs_prv_info *)sha->lldd_ha)->mv_tasklet); in mvs_pci_remove()
614 sas_unregister_ha(sha); in mvs_pci_remove()
615 sas_remove_host(mvi->shost); in mvs_pci_remove()
617 MVS_CHIP_DISP->interrupt_disable(mvi); in mvs_pci_remove()
618 free_irq(mvi->pdev->irq, sha); in mvs_pci_remove()
620 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[i]; in mvs_pci_remove()
623 kfree(sha->sas_phy); in mvs_pci_remove()
624 kfree(sha->sas_port); in mvs_pci_remove()
625 kfree(sha); in mvs_pci_remove()
713 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); in interrupt_coalescing_store() local
718 if (sscanf(buffer, "%u", &val) != 1) in interrupt_coalescing_store()
719 return -EINVAL; in interrupt_coalescing_store()
729 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; in interrupt_coalescing_store()
730 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[0]; in interrupt_coalescing_store()
733 return -EINVAL; in interrupt_coalescing_store()
736 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[i]; in interrupt_coalescing_store()
737 if (MVS_CHIP_DISP->tune_interrupt) in interrupt_coalescing_store()
738 MVS_CHIP_DISP->tune_interrupt(mvi, in interrupt_coalescing_store()
759 return -ENOMEM; in mvs_init()