Lines Matching +full:dw +full:- +full:pcie +full:- +full:ep
6 * Copyright (C) 2012-2014 LSI Corporation
7 * Copyright (C) 2013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
57 #include <linux/dma-mapping.h>
76 static int max_queue_depth = -1;
80 static int max_sgl_entries = -1;
84 static int msix_disable = -1;
92 static int max_msix_vectors = -1;
97 static int irqpoll_weight = -1;
104 " enable detection of firmware fault and halt firmware - (default=0)");
106 static int perf_mode = -1;
110 "0 - balanced: high iops mode is enabled &\n\t\t"
112 "1 - iops: high iops mode is disabled &\n\t\t"
114 "2 - latency: high iops mode is disabled &\n\t\t"
116 "\t\tdefault - default perf_mode is 'balanced'"
128 MPT_PERF_MODE_DEFAULT = -1,
143 * mpt3sas_base_check_cmd_timeout - Function
171 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
190 ioc->fwfault_debug = mpt3sas_fwfault_debug; in _scsih_set_fwfault_debug()
198 * _base_readl_aero - retry readl for max three times.
224 * _base_clone_reply_to_sys_mem - copies reply to reply free iomem
240 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_clone_reply_to_sys_mem()
241 void __iomem *reply_free_iomem = (void __iomem *)ioc->chip + in _base_clone_reply_to_sys_mem()
243 (cmd_credit * ioc->request_sz) + (index * sizeof(u32)); in _base_clone_reply_to_sys_mem()
249 * _base_clone_mpi_to_sys_mem - Writes/copies MPI frames
268 * _base_clone_to_sys_mem - Writes/copies data to system/BAR0 region
286 * _base_get_chain - Calculates and Returns virtual chain address
300 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_chain()
302 base_chain = (void __iomem *)ioc->chip + MPI_FRAME_START_OFFSET + in _base_get_chain()
303 (cmd_credit * ioc->request_sz) + in _base_get_chain()
305 chain_virt = base_chain + (smid * ioc->facts.MaxChainDepth * in _base_get_chain()
306 ioc->request_sz) + (sge_chain_count * ioc->request_sz); in _base_get_chain()
311 * _base_get_chain_phys - Calculates and Returns physical address
326 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_chain_phys()
328 base_chain_phys = ioc->chip_phys + MPI_FRAME_START_OFFSET + in _base_get_chain_phys()
329 (cmd_credit * ioc->request_sz) + in _base_get_chain_phys()
331 chain_phys = base_chain_phys + (smid * ioc->facts.MaxChainDepth * in _base_get_chain_phys()
332 ioc->request_sz) + (sge_chain_count * ioc->request_sz); in _base_get_chain_phys()
337 * _base_get_buffer_bar0 - Calculates and Returns BAR0 mapped Host
350 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_buffer_bar0()
354 ioc->facts.MaxChainDepth); in _base_get_buffer_bar0()
359 * _base_get_buffer_phys_bar0 - Calculates and Returns BAR0 mapped
371 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_buffer_phys_bar0()
374 ioc->facts.MaxChainDepth); in _base_get_buffer_phys_bar0()
379 * _base_get_chain_buffer_dma_to_chain_buffer - Iterates chain
396 for (index = 0; index < ioc->scsiio_depth; index++) { in _base_get_chain_buffer_dma_to_chain_buffer()
397 for (j = 0; j < ioc->chains_needed_per_io; j++) { in _base_get_chain_buffer_dma_to_chain_buffer()
398 ct = &ioc->chain_lookup[index].chains_per_smid[j]; in _base_get_chain_buffer_dma_to_chain_buffer()
399 if (ct && ct->chain_buffer_dma == chain_buffer_dma) in _base_get_chain_buffer_dma_to_chain_buffer()
400 return ct->chain_buffer; in _base_get_chain_buffer_dma_to_chain_buffer()
408 * _clone_sg_entries - MPI EP's scsiio and config requests
438 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST) { in _clone_sg_entries()
441 sgel = (Mpi2SGESimple32_t *) &scsiio_request->SGL; in _clone_sg_entries()
443 } else if (request_hdr->Function == MPI2_FUNCTION_CONFIG) { in _clone_sg_entries()
446 sgel = (Mpi2SGESimple32_t *) &config_req->PageBufferSGE; in _clone_sg_entries()
452 * address associated with sgel->Address. in _clone_sg_entries()
468 * 0 - 255 System register in _clone_sg_entries()
469 * 256 - 4352 MPI Frame. (This is based on maxCredit 32) in _clone_sg_entries()
470 * 4352 - 4864 Reply_free pool (512 byte is reserved in _clone_sg_entries()
474 * 4864 - 17152 SGE chain element. (32cmd * 3 chain of in _clone_sg_entries()
476 * 17152 - x Host buffer mapped with smid. in _clone_sg_entries()
489 if (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
493 for (i = 0; i < MPT_MIN_PHYS_SEGMENTS + ioc->facts.MaxChainDepth; i++) { in _clone_sg_entries()
496 (le32_to_cpu(sgel->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT); in _clone_sg_entries()
503 * the virtual address for sgel->Address in _clone_sg_entries()
507 le32_to_cpu(sgel->Address)); in _clone_sg_entries()
522 sgel->Address = in _clone_sg_entries()
532 (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
538 sgel->Address = in _clone_sg_entries()
542 ioc->config_vaddr, in _clone_sg_entries()
543 (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
545 sgel->Address = in _clone_sg_entries()
549 buff_ptr += (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
551 buff_ptr_phys += (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
553 if ((le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
580 src_chain_addr[i], ioc->request_sz); in _clone_sg_entries()
585 * mpt3sas_remove_dead_ioc_func - kthread context to remove dead ioc
590 * -1 for other case.
598 return -1; in mpt3sas_remove_dead_ioc_func()
600 pdev = ioc->pdev; in mpt3sas_remove_dead_ioc_func()
602 return -1; in mpt3sas_remove_dead_ioc_func()
608 * _base_sync_drv_fw_timestamp - Sync Drive-Fw TimeStamp.
622 mutex_lock(&ioc->scsih_cmds.mutex); in _base_sync_drv_fw_timestamp()
623 if (ioc->scsih_cmds.status != MPT3_CMD_NOT_USED) { in _base_sync_drv_fw_timestamp()
627 ioc->scsih_cmds.status = MPT3_CMD_PENDING; in _base_sync_drv_fw_timestamp()
628 smid = mpt3sas_base_get_smid(ioc, ioc->scsih_cb_idx); in _base_sync_drv_fw_timestamp()
631 ioc->scsih_cmds.status = MPT3_CMD_NOT_USED; in _base_sync_drv_fw_timestamp()
635 ioc->scsih_cmds.smid = smid; in _base_sync_drv_fw_timestamp()
637 mpi_request->Function = MPI2_FUNCTION_IO_UNIT_CONTROL; in _base_sync_drv_fw_timestamp()
638 mpi_request->Operation = MPI26_CTRL_OP_SET_IOC_PARAMETER; in _base_sync_drv_fw_timestamp()
639 mpi_request->IOCParameter = MPI26_SET_IOC_PARAMETER_SYNC_TIMESTAMP; in _base_sync_drv_fw_timestamp()
642 mpi_request->Reserved7 = cpu_to_le32(TimeStamp >> 32); in _base_sync_drv_fw_timestamp()
643 mpi_request->IOCParameterValue = cpu_to_le32(TimeStamp & 0xFFFFFFFF); in _base_sync_drv_fw_timestamp()
644 init_completion(&ioc->scsih_cmds.done); in _base_sync_drv_fw_timestamp()
645 ioc->put_smid_default(ioc, smid); in _base_sync_drv_fw_timestamp()
649 wait_for_completion_timeout(&ioc->scsih_cmds.done, in _base_sync_drv_fw_timestamp()
651 if (!(ioc->scsih_cmds.status & MPT3_CMD_COMPLETE)) { in _base_sync_drv_fw_timestamp()
653 ioc->scsih_cmds.status, mpi_request, in _base_sync_drv_fw_timestamp()
657 if (ioc->scsih_cmds.status & MPT3_CMD_REPLY_VALID) { in _base_sync_drv_fw_timestamp()
658 mpi_reply = ioc->scsih_cmds.reply; in _base_sync_drv_fw_timestamp()
661 le16_to_cpu(mpi_reply->IOCStatus), in _base_sync_drv_fw_timestamp()
662 le32_to_cpu(mpi_reply->IOCLogInfo))); in _base_sync_drv_fw_timestamp()
667 ioc->scsih_cmds.status = MPT3_CMD_NOT_USED; in _base_sync_drv_fw_timestamp()
669 mutex_unlock(&ioc->scsih_cmds.mutex); in _base_sync_drv_fw_timestamp()
673 * _base_fault_reset_work - workq handling ioc fault conditions
689 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
690 if ((ioc->shost_recovery && (ioc->ioc_coredump_loop == 0)) || in _base_fault_reset_work()
691 ioc->pci_error_recovery) in _base_fault_reset_work()
693 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
697 ioc_err(ioc, "SAS host is non-operational !!!!\n"); in _base_fault_reset_work()
701 * by considering controller is in a non-operational state. So in _base_fault_reset_work()
704 * controller to non-operational state and remove the dead ioc in _base_fault_reset_work()
707 if (ioc->non_operational_loop++ < 5) { in _base_fault_reset_work()
708 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, in _base_fault_reset_work()
721 ioc->schedule_dead_ioc_flush_running_cmds(ioc); in _base_fault_reset_work()
726 ioc->remove_host = 1; in _base_fault_reset_work()
729 "%s_dead_ioc_%d", ioc->driver_name, ioc->id); in _base_fault_reset_work()
740 u8 timeout = (ioc->manu_pg11.CoreDumpTOSec) ? in _base_fault_reset_work()
741 ioc->manu_pg11.CoreDumpTOSec : in _base_fault_reset_work()
746 if (ioc->ioc_coredump_loop == 0) { in _base_fault_reset_work()
751 &ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
752 ioc->shost_recovery = 1; in _base_fault_reset_work()
754 &ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
761 __func__, ioc->ioc_coredump_loop); in _base_fault_reset_work()
764 if (ioc->ioc_coredump_loop++ < timeout) { in _base_fault_reset_work()
766 &ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
771 if (ioc->ioc_coredump_loop) { in _base_fault_reset_work()
774 __func__, ioc->ioc_coredump_loop); in _base_fault_reset_work()
777 __func__, ioc->ioc_coredump_loop); in _base_fault_reset_work()
778 ioc->ioc_coredump_loop = MPT3SAS_COREDUMP_LOOP_DONE; in _base_fault_reset_work()
780 ioc->non_operational_loop = 0; in _base_fault_reset_work()
797 ioc->ioc_coredump_loop = 0; in _base_fault_reset_work()
798 if (ioc->time_sync_interval && in _base_fault_reset_work()
799 ++ioc->timestamp_update_count >= ioc->time_sync_interval) { in _base_fault_reset_work()
800 ioc->timestamp_update_count = 0; in _base_fault_reset_work()
803 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
805 if (ioc->fault_reset_work_q) in _base_fault_reset_work()
806 queue_delayed_work(ioc->fault_reset_work_q, in _base_fault_reset_work()
807 &ioc->fault_reset_work, in _base_fault_reset_work()
809 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
813 * mpt3sas_base_start_watchdog - start the fault_reset_work_q
823 if (ioc->fault_reset_work_q) in mpt3sas_base_start_watchdog()
826 ioc->timestamp_update_count = 0; in mpt3sas_base_start_watchdog()
829 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); in mpt3sas_base_start_watchdog()
830 snprintf(ioc->fault_reset_work_q_name, in mpt3sas_base_start_watchdog()
831 sizeof(ioc->fault_reset_work_q_name), "poll_%s%d_status", in mpt3sas_base_start_watchdog()
832 ioc->driver_name, ioc->id); in mpt3sas_base_start_watchdog()
833 ioc->fault_reset_work_q = in mpt3sas_base_start_watchdog()
834 create_singlethread_workqueue(ioc->fault_reset_work_q_name); in mpt3sas_base_start_watchdog()
835 if (!ioc->fault_reset_work_q) { in mpt3sas_base_start_watchdog()
839 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_start_watchdog()
840 if (ioc->fault_reset_work_q) in mpt3sas_base_start_watchdog()
841 queue_delayed_work(ioc->fault_reset_work_q, in mpt3sas_base_start_watchdog()
842 &ioc->fault_reset_work, in mpt3sas_base_start_watchdog()
844 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_start_watchdog()
848 * mpt3sas_base_stop_watchdog - stop the fault_reset_work_q
859 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_stop_watchdog()
860 wq = ioc->fault_reset_work_q; in mpt3sas_base_stop_watchdog()
861 ioc->fault_reset_work_q = NULL; in mpt3sas_base_stop_watchdog()
862 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_stop_watchdog()
864 if (!cancel_delayed_work_sync(&ioc->fault_reset_work)) in mpt3sas_base_stop_watchdog()
871 * mpt3sas_base_fault_info - verbose translation of firmware FAULT code
882 * mpt3sas_base_coredump_info - verbose translation of firmware CoreDump state
895 * mpt3sas_base_wait_for_coredump_completion - Wait until coredump
900 * Return: 0 for success, non-zero for failure.
906 u8 timeout = (ioc->manu_pg11.CoreDumpTOSec) ? in mpt3sas_base_wait_for_coredump_completion()
907 ioc->manu_pg11.CoreDumpTOSec : in mpt3sas_base_wait_for_coredump_completion()
926 * mpt3sas_halt_firmware - halt's mpt controller firmware
939 if (!ioc->fwfault_debug) in mpt3sas_halt_firmware()
944 doorbell = ioc->base_readl(&ioc->chip->Doorbell); in mpt3sas_halt_firmware()
953 writel(0xC0FFEE00, &ioc->chip->Doorbell); in mpt3sas_halt_firmware()
957 if (ioc->fwfault_debug == 2) in mpt3sas_halt_firmware()
965 * _base_sas_ioc_info - verbose translation of the ioc status
974 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & in _base_sas_ioc_info()
981 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || in _base_sas_ioc_info()
982 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || in _base_sas_ioc_info()
983 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) in _base_sas_ioc_info()
993 if (request_hdr->Function == MPI2_FUNCTION_CONFIG) { in _base_sas_ioc_info()
996 if ((rqst->ExtPageType == in _base_sas_ioc_info()
998 !(ioc->logging_level & MPT_DEBUG_CONFIG)) { in _base_sas_ioc_info()
1082 * For use by SCSI Initiator and SCSI Target end-to-end data protection in _base_sas_ioc_info()
1155 switch (request_hdr->Function) { in _base_sas_ioc_info()
1157 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; in _base_sas_ioc_info()
1181 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; in _base_sas_ioc_info()
1186 ioc->sge_size; in _base_sas_ioc_info()
1202 * _base_display_event_data - verbose translation of firmware asyn events
1213 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) in _base_display_event_data()
1216 event = le16_to_cpu(mpi_reply->Event); in _base_display_event_data()
1235 if (!ioc->hide_ir_msg) in _base_display_event_data()
1241 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData; in _base_display_event_data()
1243 event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED ? in _base_display_event_data()
1245 if (event_data->DiscoveryStatus) in _base_display_event_data()
1247 le32_to_cpu(event_data->DiscoveryStatus)); in _base_display_event_data()
1267 if (!ioc->hide_ir_msg) in _base_display_event_data()
1271 if (!ioc->hide_ir_msg) in _base_display_event_data()
1275 if (!ioc->hide_ir_msg) in _base_display_event_data()
1279 if (!ioc->hide_ir_msg) in _base_display_event_data()
1292 desc = "PCIE Device Status Change"; in _base_display_event_data()
1297 (Mpi26EventDataPCIeEnumeration_t *)mpi_reply->EventData; in _base_display_event_data()
1298 ioc_info(ioc, "PCIE Enumeration: (%s)", in _base_display_event_data()
1299 event_data->ReasonCode == MPI26_EVENT_PCIE_ENUM_RC_STARTED ? in _base_display_event_data()
1301 if (event_data->EnumerationStatus) in _base_display_event_data()
1303 le32_to_cpu(event_data->EnumerationStatus)); in _base_display_event_data()
1308 desc = "PCIE Topology Change List"; in _base_display_event_data()
1319 * _base_sas_log_info - verbose translation of firmware log info
1333 } dw; in _base_sas_log_info() member
1339 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) in _base_sas_log_info()
1347 if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info == in _base_sas_log_info()
1351 switch (sas_loginfo.dw.originator) { in _base_sas_log_info()
1359 if (!ioc->hide_ir_msg) in _base_sas_log_info()
1368 originator_str, sas_loginfo.dw.code, sas_loginfo.dw.subcode); in _base_sas_log_info()
1372 * _base_display_reply_info - handle reply descriptors depending on IOC Status
1392 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); in _base_display_reply_info()
1395 (ioc->logging_level & MPT_DEBUG_REPLY)) { in _base_display_reply_info()
1401 loginfo = le32_to_cpu(mpi_reply->IOCLogInfo); in _base_display_reply_info()
1412 * mpt3sas_base_done - base internal command completion routine
1429 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) in mpt3sas_base_done()
1432 if (ioc->base_cmds.status == MPT3_CMD_NOT_USED) in mpt3sas_base_done()
1435 ioc->base_cmds.status |= MPT3_CMD_COMPLETE; in mpt3sas_base_done()
1437 ioc->base_cmds.status |= MPT3_CMD_REPLY_VALID; in mpt3sas_base_done()
1438 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); in mpt3sas_base_done()
1440 ioc->base_cmds.status &= ~MPT3_CMD_PENDING; in mpt3sas_base_done()
1442 complete(&ioc->base_cmds.done); in mpt3sas_base_done()
1447 * _base_async_event - main callback handler for firmware asyn events
1467 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) in _base_async_event()
1472 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) in _base_async_event()
1474 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in _base_async_event()
1480 INIT_LIST_HEAD(&delayed_event_ack->list); in _base_async_event()
1481 delayed_event_ack->Event = mpi_reply->Event; in _base_async_event()
1482 delayed_event_ack->EventContext = mpi_reply->EventContext; in _base_async_event()
1483 list_add_tail(&delayed_event_ack->list, in _base_async_event()
1484 &ioc->delayed_event_ack_list); in _base_async_event()
1487 le16_to_cpu(mpi_reply->Event))); in _base_async_event()
1493 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; in _base_async_event()
1494 ack_request->Event = mpi_reply->Event; in _base_async_event()
1495 ack_request->EventContext = mpi_reply->EventContext; in _base_async_event()
1496 ack_request->VF_ID = 0; /* TODO */ in _base_async_event()
1497 ack_request->VP_ID = 0; in _base_async_event()
1498 ioc->put_smid_default(ioc, smid); in _base_async_event()
1517 WARN_ON(smid >= ioc->hi_priority_smid)) in _get_st_from_smid()
1528 * _base_get_cb_idx - obtain the callback index
1538 u16 ctl_smid = ioc->scsiio_depth - INTERNAL_SCSIIO_CMDS_COUNT + 1; in _base_get_cb_idx()
1541 if (smid < ioc->hi_priority_smid) { in _base_get_cb_idx()
1547 cb_idx = st->cb_idx; in _base_get_cb_idx()
1549 cb_idx = ioc->ctl_cb_idx; in _base_get_cb_idx()
1550 } else if (smid < ioc->internal_smid) { in _base_get_cb_idx()
1551 i = smid - ioc->hi_priority_smid; in _base_get_cb_idx()
1552 cb_idx = ioc->hpr_lookup[i].cb_idx; in _base_get_cb_idx()
1553 } else if (smid <= ioc->hba_queue_depth) { in _base_get_cb_idx()
1554 i = smid - ioc->internal_smid; in _base_get_cb_idx()
1555 cb_idx = ioc->internal_lookup[i].cb_idx; in _base_get_cb_idx()
1561 * mpt3sas_base_pause_mq_polling - pause polling on the mq poll queues
1575 ioc->reply_queue_count - ioc->iopoll_q_start_index; in mpt3sas_base_pause_mq_polling()
1579 atomic_set(&ioc->io_uring_poll_queues[qid].pause, 1); in mpt3sas_base_pause_mq_polling()
1585 while (atomic_read(&ioc->io_uring_poll_queues[qid].busy)) { in mpt3sas_base_pause_mq_polling()
1593 * mpt3sas_base_resume_mq_polling - Resume polling on mq poll queues.
1602 ioc->reply_queue_count - ioc->iopoll_q_start_index; in mpt3sas_base_resume_mq_polling()
1606 atomic_set(&ioc->io_uring_poll_queues[qid].pause, 0); in mpt3sas_base_resume_mq_polling()
1610 * mpt3sas_base_mask_interrupts - disable interrupts
1620 ioc->mask_interrupts = 1; in mpt3sas_base_mask_interrupts()
1621 him_register = ioc->base_readl(&ioc->chip->HostInterruptMask); in mpt3sas_base_mask_interrupts()
1623 writel(him_register, &ioc->chip->HostInterruptMask); in mpt3sas_base_mask_interrupts()
1624 ioc->base_readl(&ioc->chip->HostInterruptMask); in mpt3sas_base_mask_interrupts()
1628 * mpt3sas_base_unmask_interrupts - enable interrupts
1638 him_register = ioc->base_readl(&ioc->chip->HostInterruptMask); in mpt3sas_base_unmask_interrupts()
1640 writel(him_register, &ioc->chip->HostInterruptMask); in mpt3sas_base_unmask_interrupts()
1641 ioc->mask_interrupts = 0; in mpt3sas_base_unmask_interrupts()
1663 * _base_process_reply_queue - Process reply descriptors from reply
1679 u8 msix_index = reply_q->msix_index; in _base_process_reply_queue()
1680 struct MPT3SAS_ADAPTER *ioc = reply_q->ioc; in _base_process_reply_queue()
1685 if (!atomic_add_unless(&reply_q->busy, 1, 1)) in _base_process_reply_queue()
1688 rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index]; in _base_process_reply_queue()
1689 request_descript_type = rpf->Default.ReplyFlags in _base_process_reply_queue()
1692 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1698 rd.word = le64_to_cpu(rpf->Words); in _base_process_reply_queue()
1702 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1); in _base_process_reply_queue()
1720 rpf->AddressReply.ReplyFrameAddress); in _base_process_reply_queue()
1721 if (reply > ioc->reply_dma_max_address || in _base_process_reply_queue()
1722 reply < ioc->reply_dma_min_address) in _base_process_reply_queue()
1743 ioc->reply_free_host_index = in _base_process_reply_queue()
1744 (ioc->reply_free_host_index == in _base_process_reply_queue()
1745 (ioc->reply_free_queue_depth - 1)) ? in _base_process_reply_queue()
1746 0 : ioc->reply_free_host_index + 1; in _base_process_reply_queue()
1747 ioc->reply_free[ioc->reply_free_host_index] = in _base_process_reply_queue()
1749 if (ioc->is_mcpu_endpoint) in _base_process_reply_queue()
1752 ioc->reply_free_host_index); in _base_process_reply_queue()
1753 writel(ioc->reply_free_host_index, in _base_process_reply_queue()
1754 &ioc->chip->ReplyFreeHostIndex); in _base_process_reply_queue()
1758 rpf->Words = cpu_to_le64(ULLONG_MAX); in _base_process_reply_queue()
1759 reply_q->reply_post_host_index = in _base_process_reply_queue()
1760 (reply_q->reply_post_host_index == in _base_process_reply_queue()
1761 (ioc->reply_post_queue_depth - 1)) ? 0 : in _base_process_reply_queue()
1762 reply_q->reply_post_host_index + 1; in _base_process_reply_queue()
1764 reply_q->reply_post_free[reply_q->reply_post_host_index]. in _base_process_reply_queue()
1772 if (completed_cmds >= ioc->thresh_hold) { in _base_process_reply_queue()
1773 if (ioc->combined_reply_queue) { in _base_process_reply_queue()
1774 writel(reply_q->reply_post_host_index | in _base_process_reply_queue()
1777 ioc->replyPostRegisterIndex[msix_index/8]); in _base_process_reply_queue()
1779 writel(reply_q->reply_post_host_index | in _base_process_reply_queue()
1782 &ioc->chip->ReplyPostHostIndex); in _base_process_reply_queue()
1784 if (!reply_q->is_iouring_poll_q && in _base_process_reply_queue()
1785 !reply_q->irq_poll_scheduled) { in _base_process_reply_queue()
1786 reply_q->irq_poll_scheduled = true; in _base_process_reply_queue()
1787 irq_poll_sched(&reply_q->irqpoll); in _base_process_reply_queue()
1789 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1794 if (!reply_q->reply_post_host_index) in _base_process_reply_queue()
1795 rpf = reply_q->reply_post_free; in _base_process_reply_queue()
1803 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1807 if (ioc->is_warpdrive) { in _base_process_reply_queue()
1808 writel(reply_q->reply_post_host_index, in _base_process_reply_queue()
1809 ioc->reply_post_host_index[msix_index]); in _base_process_reply_queue()
1810 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1823 * Host Index Register supports 8 MSI-X vectors. in _base_process_reply_queue()
1829 if (ioc->combined_reply_queue) in _base_process_reply_queue()
1830 writel(reply_q->reply_post_host_index | ((msix_index & 7) << in _base_process_reply_queue()
1832 ioc->replyPostRegisterIndex[msix_index/8]); in _base_process_reply_queue()
1834 writel(reply_q->reply_post_host_index | (msix_index << in _base_process_reply_queue()
1836 &ioc->chip->ReplyPostHostIndex); in _base_process_reply_queue()
1837 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1842 * mpt3sas_blk_mq_poll - poll the blk mq poll queue
1851 (struct MPT3SAS_ADAPTER *)shost->hostdata; in mpt3sas_blk_mq_poll()
1854 int qid = queue_num - ioc->iopoll_q_start_index; in mpt3sas_blk_mq_poll()
1856 if (atomic_read(&ioc->io_uring_poll_queues[qid].pause) || in mpt3sas_blk_mq_poll()
1857 !atomic_add_unless(&ioc->io_uring_poll_queues[qid].busy, 1, 1)) in mpt3sas_blk_mq_poll()
1860 reply_q = ioc->io_uring_poll_queues[qid].reply_q; in mpt3sas_blk_mq_poll()
1863 atomic_dec(&ioc->io_uring_poll_queues[qid].busy); in mpt3sas_blk_mq_poll()
1869 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
1879 struct MPT3SAS_ADAPTER *ioc = reply_q->ioc; in _base_interrupt()
1881 if (ioc->mask_interrupts) in _base_interrupt()
1883 if (reply_q->irq_poll_scheduled) in _base_interrupt()
1890 * _base_irqpoll - IRQ poll callback handler
1904 if (reply_q->irq_line_enable) { in _base_irqpoll()
1905 disable_irq_nosync(reply_q->os_irq); in _base_irqpoll()
1906 reply_q->irq_line_enable = false; in _base_irqpoll()
1911 reply_q->irq_poll_scheduled = false; in _base_irqpoll()
1912 reply_q->irq_line_enable = true; in _base_irqpoll()
1913 enable_irq(reply_q->os_irq); in _base_irqpoll()
1927 * _base_init_irqpolls - initliaze IRQ polls
1937 if (list_empty(&ioc->reply_queue_list)) in _base_init_irqpolls()
1940 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) { in _base_init_irqpolls()
1941 if (reply_q->is_iouring_poll_q) in _base_init_irqpolls()
1943 irq_poll_init(&reply_q->irqpoll, in _base_init_irqpolls()
1944 ioc->hba_queue_depth/4, _base_irqpoll); in _base_init_irqpolls()
1945 reply_q->irq_poll_scheduled = false; in _base_init_irqpolls()
1946 reply_q->irq_line_enable = true; in _base_init_irqpolls()
1947 reply_q->os_irq = pci_irq_vector(ioc->pdev, in _base_init_irqpolls()
1948 reply_q->msix_index); in _base_init_irqpolls()
1953 * _base_is_controller_msix_enabled - is controller support muli-reply queues
1961 return (ioc->facts.IOCCapabilities & in _base_is_controller_msix_enabled()
1962 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable; in _base_is_controller_msix_enabled()
1966 * mpt3sas_base_sync_reply_irqs - flush pending MSIX interrupts
1969 * timed-out SCSI command got delayed
1970 * Context: non-ISR context
1980 * then multi-queues are not enabled in mpt3sas_base_sync_reply_irqs()
1985 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in mpt3sas_base_sync_reply_irqs()
1986 if (ioc->shost_recovery || ioc->remove_host || in mpt3sas_base_sync_reply_irqs()
1987 ioc->pci_error_recovery) in mpt3sas_base_sync_reply_irqs()
1990 if (reply_q->msix_index == 0) in mpt3sas_base_sync_reply_irqs()
1993 if (reply_q->is_iouring_poll_q) { in mpt3sas_base_sync_reply_irqs()
1998 synchronize_irq(pci_irq_vector(ioc->pdev, reply_q->msix_index)); in mpt3sas_base_sync_reply_irqs()
1999 if (reply_q->irq_poll_scheduled) { in mpt3sas_base_sync_reply_irqs()
2003 irq_poll_disable(&reply_q->irqpoll); in mpt3sas_base_sync_reply_irqs()
2004 irq_poll_enable(&reply_q->irqpoll); in mpt3sas_base_sync_reply_irqs()
2008 if (reply_q->irq_poll_scheduled) { in mpt3sas_base_sync_reply_irqs()
2009 reply_q->irq_poll_scheduled = false; in mpt3sas_base_sync_reply_irqs()
2010 reply_q->irq_line_enable = true; in mpt3sas_base_sync_reply_irqs()
2011 enable_irq(reply_q->os_irq); in mpt3sas_base_sync_reply_irqs()
2021 * mpt3sas_base_release_callback_handler - clear interrupt callback handler
2031 * mpt3sas_base_register_callback_handler - obtain index for the interrupt callback handler
2041 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) in mpt3sas_base_register_callback_handler()
2050 * mpt3sas_base_initialize_callback_handler - initialize the interrupt callback handler
2063 * _base_build_zero_len_sge - build zero length sg entry
2078 ioc->base_add_sg_single(paddr, flags_length, -1); in _base_build_zero_len_sge()
2082 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
2094 sgel->FlagsLength = cpu_to_le32(flags_length); in _base_add_sg_single_32()
2095 sgel->Address = cpu_to_le32(dma_addr); in _base_add_sg_single_32()
2100 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
2112 sgel->FlagsLength = cpu_to_le32(flags_length); in _base_add_sg_single_64()
2113 sgel->Address = cpu_to_le64(dma_addr); in _base_add_sg_single_64()
2117 * _base_get_chain_buffer_tracker - obtain chain tracker
2130 u16 smid = st->smid; in _base_get_chain_buffer_tracker()
2132 atomic_read(&ioc->chain_lookup[smid - 1].chain_offset); in _base_get_chain_buffer_tracker()
2134 if (chain_offset == ioc->chains_needed_per_io) in _base_get_chain_buffer_tracker()
2137 chain_req = &ioc->chain_lookup[smid - 1].chains_per_smid[chain_offset]; in _base_get_chain_buffer_tracker()
2138 atomic_inc(&ioc->chain_lookup[smid - 1].chain_offset); in _base_get_chain_buffer_tracker()
2144 * _base_build_sg - build generic sg
2169 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2173 psge += ioc->sge_size; in _base_build_sg()
2180 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2187 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2194 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2202 * _base_build_nvme_prp - This function is called for NVMe end devices to build
2226 * non-contiguous SGL into a PRP in this case. All PRPs will describe
2238 * Each 64-bit PRP entry comprises an address and an offset field. The address
2241 * first element in a PRP list may contain a non-zero offset, implying that all
2246 * by the list begins at a non-zero offset within the first 4KB page, then the
2247 * first PRP element will contain a non-zero offset indicating where the region
2270 (void *)nvme_encap_request->NVMe_Command; in _base_build_nvme_prp()
2278 prp1_entry = &nvme_cmd->prp1; in _base_build_nvme_prp()
2279 prp2_entry = &nvme_cmd->prp2; in _base_build_nvme_prp()
2292 page_mask = ioc->page_size - 1; in _base_build_nvme_prp()
2319 * page boundary - prp_size (8 bytes). in _base_build_nvme_prp()
2326 * - bump the current memory pointer to the next in _base_build_nvme_prp()
2328 * - set the PRP Entry to point to that page. This in _base_build_nvme_prp()
2330 * - bump the PRP Entry pointer the start of the in _base_build_nvme_prp()
2332 * contiguous, no need to get a new page - it's in _base_build_nvme_prp()
2342 entry_len = ioc->page_size - offset; in _base_build_nvme_prp()
2362 if (length > ioc->page_size) { in _base_build_nvme_prp()
2406 length -= entry_len; in _base_build_nvme_prp()
2411 * base_make_prp_nvme - Prepare PRPs (Physical Region Page) -
2415 * @scmd: SCSI command from the mid-layer
2439 nvme_pg_size = max_t(u32, ioc->page_size, NVME_PRP_PAGE_SIZE); in base_make_prp_nvme()
2450 * of the PRP entries are built in the contiguous pcie buffer. in base_make_prp_nvme()
2452 page_mask = nvme_pg_size - 1; in base_make_prp_nvme()
2464 main_chain_element = (pMpi25IeeeSgeChain64_t)&mpi_request->SGL; in base_make_prp_nvme()
2481 main_chain_element->Address = cpu_to_le64(msg_dma); in base_make_prp_nvme()
2482 main_chain_element->NextChainOffset = 0; in base_make_prp_nvme()
2483 main_chain_element->Flags = MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT | in base_make_prp_nvme()
2488 ptr_first_sgl = (pMpi25IeeeSgeChain64_t)&mpi_request->SGL; in base_make_prp_nvme()
2494 first_prp_len = nvme_pg_size - offset; in base_make_prp_nvme()
2496 ptr_first_sgl->Address = cpu_to_le64(sge_addr); in base_make_prp_nvme()
2497 ptr_first_sgl->Length = cpu_to_le32(first_prp_len); in base_make_prp_nvme()
2499 data_len -= first_prp_len; in base_make_prp_nvme()
2503 sge_len -= first_prp_len; in base_make_prp_nvme()
2531 sge_len -= nvme_pg_size; in base_make_prp_nvme()
2532 data_len -= nvme_pg_size; in base_make_prp_nvme()
2545 main_chain_element->Length = in base_make_prp_nvme()
2559 (mpt3sas_scsih_is_pcie_scsi_device(pcie_device->device_info))) { in base_is_prp_possible()
2574 * _base_check_pcie_native_sgl - This function is called for PCIe end devices to
2577 * PCIe SGL creation. If the driver will not build a native SGL, return
2584 * @pcie_device: points to the PCIe device's info
2620 * _base_add_sg_single_ieee - add sg element for IEEE format
2633 sgel->Flags = flags; in _base_add_sg_single_ieee()
2634 sgel->NextChainOffset = chain_offset; in _base_add_sg_single_ieee()
2635 sgel->Length = cpu_to_le32(length); in _base_add_sg_single_ieee()
2636 sgel->Address = cpu_to_le64(dma_addr); in _base_add_sg_single_ieee()
2640 * _base_build_zero_len_sge_ieee - build zero length sg entry for IEEE format
2655 _base_add_sg_single_ieee(paddr, sgl_flags, 0, 0, -1); in _base_build_zero_len_sge_ieee()
2659 * _base_build_sg_scmd - main sg creation routine
2694 if (scmd->sc_data_direction == DMA_TO_DEVICE) in _base_build_sg_scmd()
2706 return -ENOMEM; in _base_build_sg_scmd()
2708 sg_local = &mpi_request->SGL; in _base_build_sg_scmd()
2709 sges_in_segment = ioc->max_sges_in_main_message; in _base_build_sg_scmd()
2713 mpi_request->ChainOffset = (offsetof(Mpi2SCSIIORequest_t, SGL) + in _base_build_sg_scmd()
2714 (sges_in_segment * ioc->sge_size))/4; in _base_build_sg_scmd()
2719 ioc->base_add_sg_single(sg_local, in _base_build_sg_scmd()
2723 ioc->base_add_sg_single(sg_local, sgl_flags | in _base_build_sg_scmd()
2726 sg_local += ioc->sge_size; in _base_build_sg_scmd()
2727 sges_left--; in _base_build_sg_scmd()
2728 sges_in_segment--; in _base_build_sg_scmd()
2735 return -1; in _base_build_sg_scmd()
2736 chain = chain_req->chain_buffer; in _base_build_sg_scmd()
2737 chain_dma = chain_req->chain_buffer_dma; in _base_build_sg_scmd()
2740 ioc->max_sges_in_chain_message) ? sges_left : in _base_build_sg_scmd()
2741 ioc->max_sges_in_chain_message; in _base_build_sg_scmd()
2743 0 : (sges_in_segment * ioc->sge_size)/4; in _base_build_sg_scmd()
2744 chain_length = sges_in_segment * ioc->sge_size; in _base_build_sg_scmd()
2748 chain_length += ioc->sge_size; in _base_build_sg_scmd()
2750 ioc->base_add_sg_single(sg_local, chain_flags | chain_offset | in _base_build_sg_scmd()
2759 ioc->base_add_sg_single(sg_local, in _base_build_sg_scmd()
2764 ioc->base_add_sg_single(sg_local, sgl_flags | in _base_build_sg_scmd()
2768 sg_local += ioc->sge_size; in _base_build_sg_scmd()
2769 sges_left--; in _base_build_sg_scmd()
2770 sges_in_segment--; in _base_build_sg_scmd()
2775 return -1; in _base_build_sg_scmd()
2776 chain = chain_req->chain_buffer; in _base_build_sg_scmd()
2777 chain_dma = chain_req->chain_buffer_dma; in _base_build_sg_scmd()
2786 ioc->base_add_sg_single(sg_local, sgl_flags_end_buffer | in _base_build_sg_scmd()
2789 ioc->base_add_sg_single(sg_local, sgl_flags | in _base_build_sg_scmd()
2792 sg_local += ioc->sge_size; in _base_build_sg_scmd()
2793 sges_left--; in _base_build_sg_scmd()
2800 * _base_build_sg_scmd_ieee - main sg creation routine for IEEE format
2804 * @pcie_device: Pointer to pcie_device. If set, the pcie native sgl will be
2850 return -ENOMEM; in _base_build_sg_scmd_ieee()
2852 sg_local = &mpi_request->SGL; in _base_build_sg_scmd_ieee()
2853 sges_in_segment = (ioc->request_sz - in _base_build_sg_scmd_ieee()
2854 offsetof(Mpi25SCSIIORequest_t, SGL))/ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2858 mpi_request->ChainOffset = (sges_in_segment - 1 /* chain element */) + in _base_build_sg_scmd_ieee()
2859 (offsetof(Mpi25SCSIIORequest_t, SGL)/ioc->sge_size_ieee); in _base_build_sg_scmd_ieee()
2866 sg_local += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2867 sges_left--; in _base_build_sg_scmd_ieee()
2868 sges_in_segment--; in _base_build_sg_scmd_ieee()
2874 return -1; in _base_build_sg_scmd_ieee()
2875 chain = chain_req->chain_buffer; in _base_build_sg_scmd_ieee()
2876 chain_dma = chain_req->chain_buffer_dma; in _base_build_sg_scmd_ieee()
2879 ioc->max_sges_in_chain_message) ? sges_left : in _base_build_sg_scmd_ieee()
2880 ioc->max_sges_in_chain_message; in _base_build_sg_scmd_ieee()
2883 chain_length = sges_in_segment * ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2885 chain_length += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2898 sg_local += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2899 sges_left--; in _base_build_sg_scmd_ieee()
2900 sges_in_segment--; in _base_build_sg_scmd_ieee()
2905 return -1; in _base_build_sg_scmd_ieee()
2906 chain = chain_req->chain_buffer; in _base_build_sg_scmd_ieee()
2907 chain_dma = chain_req->chain_buffer_dma; in _base_build_sg_scmd_ieee()
2923 sg_local += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2924 sges_left--; in _base_build_sg_scmd_ieee()
2931 * _base_build_sg_ieee - build generic sg for IEEE format
2959 psge += ioc->sge_size_ieee; in _base_build_sg_ieee()
2980 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
2983 * _base_config_dma_addressing - set dma addressing
2987 * Return: 0 for success, non-zero for failure.
2995 if (ioc->is_mcpu_endpoint || sizeof(dma_addr_t) == 4 || in _base_config_dma_addressing()
2996 dma_get_required_mask(&pdev->dev) <= DMA_BIT_MASK(32)) { in _base_config_dma_addressing()
2997 ioc->dma_mask = 32; in _base_config_dma_addressing()
3000 } else if (ioc->hba_mpi_version_belonged > MPI2_VERSION) { in _base_config_dma_addressing()
3001 ioc->dma_mask = 63; in _base_config_dma_addressing()
3004 ioc->dma_mask = 64; in _base_config_dma_addressing()
3008 if (ioc->use_32bit_dma) in _base_config_dma_addressing()
3011 if (dma_set_mask(&pdev->dev, dma_mask) || in _base_config_dma_addressing()
3012 dma_set_coherent_mask(&pdev->dev, coherent_dma_mask)) in _base_config_dma_addressing()
3013 return -ENODEV; in _base_config_dma_addressing()
3015 if (ioc->dma_mask > 32) { in _base_config_dma_addressing()
3016 ioc->base_add_sg_single = &_base_add_sg_single_64; in _base_config_dma_addressing()
3017 ioc->sge_size = sizeof(Mpi2SGESimple64_t); in _base_config_dma_addressing()
3019 ioc->base_add_sg_single = &_base_add_sg_single_32; in _base_config_dma_addressing()
3020 ioc->sge_size = sizeof(Mpi2SGESimple32_t); in _base_config_dma_addressing()
3025 ioc->dma_mask, convert_to_kb(s.totalram)); in _base_config_dma_addressing()
3031 * _base_check_enable_msix - checks MSIX capabable.
3044 * if it is SAS2008 B0 controller use IO-APIC instead of MSIX in _base_check_enable_msix()
3046 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 && in _base_check_enable_msix()
3047 ioc->pdev->revision == SAS2_PCI_DEVICE_B0_REVISION) { in _base_check_enable_msix()
3048 return -EINVAL; in _base_check_enable_msix()
3051 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); in _base_check_enable_msix()
3054 return -EINVAL; in _base_check_enable_msix()
3059 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 || in _base_check_enable_msix()
3060 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 || in _base_check_enable_msix()
3061 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 || in _base_check_enable_msix()
3062 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 || in _base_check_enable_msix()
3063 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 || in _base_check_enable_msix()
3064 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 || in _base_check_enable_msix()
3065 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2) in _base_check_enable_msix()
3066 ioc->msix_vector_count = 1; in _base_check_enable_msix()
3068 pci_read_config_word(ioc->pdev, base + 2, &message_control); in _base_check_enable_msix()
3069 ioc->msix_vector_count = (message_control & 0x3FF) + 1; in _base_check_enable_msix()
3072 ioc->msix_vector_count)); in _base_check_enable_msix()
3077 * mpt3sas_base_free_irq - free irq
3088 if (list_empty(&ioc->reply_queue_list)) in mpt3sas_base_free_irq()
3091 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) { in mpt3sas_base_free_irq()
3092 list_del(&reply_q->list); in mpt3sas_base_free_irq()
3093 if (reply_q->is_iouring_poll_q) { in mpt3sas_base_free_irq()
3098 if (ioc->smp_affinity_enable) { in mpt3sas_base_free_irq()
3099 irq = pci_irq_vector(ioc->pdev, reply_q->msix_index); in mpt3sas_base_free_irq()
3102 free_irq(pci_irq_vector(ioc->pdev, reply_q->msix_index), in mpt3sas_base_free_irq()
3109 * _base_request_irq - request irq
3118 struct pci_dev *pdev = ioc->pdev; in _base_request_irq()
3126 return -ENOMEM; in _base_request_irq()
3128 reply_q->ioc = ioc; in _base_request_irq()
3129 reply_q->msix_index = index; in _base_request_irq()
3131 atomic_set(&reply_q->busy, 0); in _base_request_irq()
3133 if (index >= ioc->iopoll_q_start_index) { in _base_request_irq()
3134 qid = index - ioc->iopoll_q_start_index; in _base_request_irq()
3135 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-mq-poll%d", in _base_request_irq()
3136 ioc->driver_name, ioc->id, qid); in _base_request_irq()
3137 reply_q->is_iouring_poll_q = 1; in _base_request_irq()
3138 ioc->io_uring_poll_queues[qid].reply_q = reply_q; in _base_request_irq()
3143 if (ioc->msix_enable) in _base_request_irq()
3144 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d", in _base_request_irq()
3145 ioc->driver_name, ioc->id, index); in _base_request_irq()
3147 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d", in _base_request_irq()
3148 ioc->driver_name, ioc->id); in _base_request_irq()
3150 IRQF_SHARED, reply_q->name, reply_q); in _base_request_irq()
3153 reply_q->name, pci_irq_vector(pdev, index)); in _base_request_irq()
3155 return -EBUSY; in _base_request_irq()
3158 INIT_LIST_HEAD(&reply_q->list); in _base_request_irq()
3159 list_add_tail(&reply_q->list, &ioc->reply_queue_list); in _base_request_irq()
3164 * _base_assign_reply_queues - assigning msix index for each cpu
3174 int iopoll_q_count = ioc->reply_queue_count - in _base_assign_reply_queues()
3175 ioc->iopoll_q_start_index; in _base_assign_reply_queues()
3181 if (ioc->msix_load_balance) in _base_assign_reply_queues()
3184 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz); in _base_assign_reply_queues()
3187 nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count, in _base_assign_reply_queues()
3188 ioc->facts.MaxMSIxVectors); in _base_assign_reply_queues()
3192 if (ioc->smp_affinity_enable) { in _base_assign_reply_queues()
3198 if (ioc->high_iops_queues) { in _base_assign_reply_queues()
3199 mask = cpumask_of_node(dev_to_node(&ioc->pdev->dev)); in _base_assign_reply_queues()
3200 for (index = 0; index < ioc->high_iops_queues; in _base_assign_reply_queues()
3202 irq = pci_irq_vector(ioc->pdev, index); in _base_assign_reply_queues()
3207 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_assign_reply_queues()
3210 if (reply_q->msix_index < ioc->high_iops_queues || in _base_assign_reply_queues()
3211 reply_q->msix_index >= ioc->iopoll_q_start_index) in _base_assign_reply_queues()
3214 mask = pci_irq_get_affinity(ioc->pdev, in _base_assign_reply_queues()
3215 reply_q->msix_index); in _base_assign_reply_queues()
3218 reply_q->msix_index); in _base_assign_reply_queues()
3223 if (cpu >= ioc->cpu_msix_table_sz) in _base_assign_reply_queues()
3225 ioc->cpu_msix_table[cpu] = reply_q->msix_index; in _base_assign_reply_queues()
3233 nr_msix -= (ioc->high_iops_queues - iopoll_q_count); in _base_assign_reply_queues()
3236 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_assign_reply_queues()
3239 if (reply_q->msix_index < ioc->high_iops_queues || in _base_assign_reply_queues()
3240 reply_q->msix_index >= ioc->iopoll_q_start_index) in _base_assign_reply_queues()
3250 ioc->cpu_msix_table[cpu] = reply_q->msix_index; in _base_assign_reply_queues()
3258 * _base_check_and_enable_high_iops_queues - enable high iops mode
3263 * - HBA is a SEA/AERO controller and
3264 * - MSI-Xs vector supported by the HBA is 128 and
3265 * - total CPU count in the system >=16 and
3266 * - loaded driver with default max_msix_vectors module parameter and
3267 * - system booted in non kdump mode
3282 ioc->io_uring_poll_queues) { in _base_check_and_enable_high_iops_queues()
3283 ioc->high_iops_queues = 0; in _base_check_and_enable_high_iops_queues()
3289 pcie_capability_read_word(ioc->pdev, PCI_EXP_LNKSTA, &lnksta); in _base_check_and_enable_high_iops_queues()
3293 ioc->high_iops_queues = 0; in _base_check_and_enable_high_iops_queues()
3298 if (!reset_devices && ioc->is_aero_ioc && in _base_check_and_enable_high_iops_queues()
3301 max_msix_vectors == -1) in _base_check_and_enable_high_iops_queues()
3302 ioc->high_iops_queues = MPT3SAS_HIGH_IOPS_REPLY_QUEUES; in _base_check_and_enable_high_iops_queues()
3304 ioc->high_iops_queues = 0; in _base_check_and_enable_high_iops_queues()
3308 * mpt3sas_base_disable_msix - disables msix
3315 if (!ioc->msix_enable) in mpt3sas_base_disable_msix()
3317 pci_free_irq_vectors(ioc->pdev); in mpt3sas_base_disable_msix()
3318 ioc->msix_enable = 0; in mpt3sas_base_disable_msix()
3319 kfree(ioc->io_uring_poll_queues); in mpt3sas_base_disable_msix()
3323 * _base_alloc_irq_vectors - allocate msix vectors
3331 struct irq_affinity desc = { .pre_vectors = ioc->high_iops_queues }; in _base_alloc_irq_vectors()
3337 int nr_msix_vectors = ioc->iopoll_q_start_index; in _base_alloc_irq_vectors()
3340 if (ioc->smp_affinity_enable) in _base_alloc_irq_vectors()
3345 ioc_info(ioc, " %d %d %d\n", ioc->high_iops_queues, in _base_alloc_irq_vectors()
3346 ioc->reply_queue_count, nr_msix_vectors); in _base_alloc_irq_vectors()
3348 i = pci_alloc_irq_vectors_affinity(ioc->pdev, in _base_alloc_irq_vectors()
3349 ioc->high_iops_queues, in _base_alloc_irq_vectors()
3356 * _base_enable_msix - enables msix, failback to io_apic
3368 ioc->msix_load_balance = false; in _base_enable_msix()
3370 if (msix_disable == -1 || msix_disable == 0) in _base_enable_msix()
3379 ioc_info(ioc, "MSI-X vectors supported: %d\n", ioc->msix_vector_count); in _base_enable_msix()
3381 ioc->cpu_count, max_msix_vectors); in _base_enable_msix()
3383 ioc->reply_queue_count = in _base_enable_msix()
3384 min_t(int, ioc->cpu_count, ioc->msix_vector_count); in _base_enable_msix()
3386 if (!ioc->rdpq_array_enable && max_msix_vectors == -1) in _base_enable_msix()
3398 if (!ioc->combined_reply_queue && in _base_enable_msix()
3399 ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_enable_msix()
3402 ioc->msix_load_balance = true; in _base_enable_msix()
3409 if (ioc->msix_load_balance) in _base_enable_msix()
3410 ioc->smp_affinity_enable = 0; in _base_enable_msix()
3412 if (!ioc->smp_affinity_enable || ioc->reply_queue_count <= 1) in _base_enable_msix()
3413 ioc->shost->host_tagset = 0; in _base_enable_msix()
3418 if (ioc->shost->host_tagset) in _base_enable_msix()
3422 ioc->io_uring_poll_queues = kcalloc(iopoll_q_count, in _base_enable_msix()
3424 if (!ioc->io_uring_poll_queues) in _base_enable_msix()
3428 if (ioc->is_aero_ioc) in _base_enable_msix()
3430 ioc->msix_vector_count); in _base_enable_msix()
3436 ioc->reply_queue_count = min_t(int, in _base_enable_msix()
3437 ioc->reply_queue_count + ioc->high_iops_queues, in _base_enable_msix()
3438 ioc->msix_vector_count); in _base_enable_msix()
3445 ioc->reply_queue_count = min_t(int, local_max_msix_vectors, in _base_enable_msix()
3446 ioc->reply_queue_count); in _base_enable_msix()
3452 if (ioc->reply_queue_count < (iopoll_q_count + MPT3_MIN_IRQS)) in _base_enable_msix()
3454 ioc->reply_queue_count = min_t(int, in _base_enable_msix()
3455 ioc->reply_queue_count + iopoll_q_count, in _base_enable_msix()
3456 ioc->msix_vector_count); in _base_enable_msix()
3462 ioc->iopoll_q_start_index = in _base_enable_msix()
3463 ioc->reply_queue_count - iopoll_q_count; in _base_enable_msix()
3476 if (r < ioc->iopoll_q_start_index) { in _base_enable_msix()
3477 ioc->reply_queue_count = r + iopoll_q_count; in _base_enable_msix()
3478 ioc->iopoll_q_start_index = in _base_enable_msix()
3479 ioc->reply_queue_count - iopoll_q_count; in _base_enable_msix()
3482 ioc->msix_enable = 1; in _base_enable_msix()
3483 for (i = 0; i < ioc->reply_queue_count; i++) { in _base_enable_msix()
3493 ioc->high_iops_queues ? "enabled" : "disabled"); in _base_enable_msix()
3499 ioc->high_iops_queues = 0; in _base_enable_msix()
3501 ioc->reply_queue_count = 1; in _base_enable_msix()
3502 ioc->iopoll_q_start_index = ioc->reply_queue_count - 0; in _base_enable_msix()
3503 r = pci_alloc_irq_vectors(ioc->pdev, 1, 1, PCI_IRQ_LEGACY); in _base_enable_msix()
3515 * mpt3sas_base_unmap_resources - free controller resources
3521 struct pci_dev *pdev = ioc->pdev; in mpt3sas_base_unmap_resources()
3528 kfree(ioc->replyPostRegisterIndex); in mpt3sas_base_unmap_resources()
3529 ioc->replyPostRegisterIndex = NULL; in mpt3sas_base_unmap_resources()
3532 if (ioc->chip_phys) { in mpt3sas_base_unmap_resources()
3533 iounmap(ioc->chip); in mpt3sas_base_unmap_resources()
3534 ioc->chip_phys = 0; in mpt3sas_base_unmap_resources()
3538 pci_release_selected_regions(ioc->pdev, ioc->bars); in mpt3sas_base_unmap_resources()
3548 * mpt3sas_base_check_for_fault_and_issue_reset - check if IOC is in fault state
3552 * Return: 0 for success, non-zero for failure.
3558 int rc = -EFAULT; in mpt3sas_base_check_for_fault_and_issue_reset()
3561 if (ioc->pci_error_recovery) in mpt3sas_base_check_for_fault_and_issue_reset()
3584 * mpt3sas_base_map_resources - map in controller resources (io/irq/memap)
3587 * Return: 0 for success, non-zero for failure.
3592 struct pci_dev *pdev = ioc->pdev; in mpt3sas_base_map_resources()
3603 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); in mpt3sas_base_map_resources()
3606 ioc->bars = 0; in mpt3sas_base_map_resources()
3607 return -ENODEV; in mpt3sas_base_map_resources()
3611 if (pci_request_selected_regions(pdev, ioc->bars, in mpt3sas_base_map_resources()
3612 ioc->driver_name)) { in mpt3sas_base_map_resources()
3614 ioc->bars = 0; in mpt3sas_base_map_resources()
3615 r = -ENODEV; in mpt3sas_base_map_resources()
3627 r = -ENODEV; in mpt3sas_base_map_resources()
3641 ioc->chip_phys = pci_resource_start(pdev, i); in mpt3sas_base_map_resources()
3642 chip_phys = ioc->chip_phys; in mpt3sas_base_map_resources()
3644 ioc->chip = ioremap(ioc->chip_phys, memap_sz); in mpt3sas_base_map_resources()
3648 if (ioc->chip == NULL) { in mpt3sas_base_map_resources()
3651 r = -EINVAL; in mpt3sas_base_map_resources()
3664 if (!ioc->rdpq_array_enable_assigned) { in mpt3sas_base_map_resources()
3665 ioc->rdpq_array_enable = ioc->rdpq_array_capable; in mpt3sas_base_map_resources()
3666 ioc->rdpq_array_enable_assigned = 1; in mpt3sas_base_map_resources()
3673 iopoll_q_count = ioc->reply_queue_count - ioc->iopoll_q_start_index; in mpt3sas_base_map_resources()
3675 atomic_set(&ioc->io_uring_poll_queues[i].busy, 0); in mpt3sas_base_map_resources()
3676 atomic_set(&ioc->io_uring_poll_queues[i].pause, 0); in mpt3sas_base_map_resources()
3679 if (!ioc->is_driver_loading) in mpt3sas_base_map_resources()
3684 if (ioc->combined_reply_queue) { in mpt3sas_base_map_resources()
3691 ioc->replyPostRegisterIndex = kcalloc( in mpt3sas_base_map_resources()
3692 ioc->combined_reply_index_count, in mpt3sas_base_map_resources()
3694 if (!ioc->replyPostRegisterIndex) { in mpt3sas_base_map_resources()
3697 r = -ENOMEM; in mpt3sas_base_map_resources()
3701 for (i = 0; i < ioc->combined_reply_index_count; i++) { in mpt3sas_base_map_resources()
3702 ioc->replyPostRegisterIndex[i] = in mpt3sas_base_map_resources()
3704 ((u8 __force *)&ioc->chip->Doorbell + in mpt3sas_base_map_resources()
3710 if (ioc->is_warpdrive) { in mpt3sas_base_map_resources()
3711 ioc->reply_post_host_index[0] = (resource_size_t __iomem *) in mpt3sas_base_map_resources()
3712 &ioc->chip->ReplyPostHostIndex; in mpt3sas_base_map_resources()
3714 for (i = 1; i < ioc->cpu_msix_table_sz; i++) in mpt3sas_base_map_resources()
3715 ioc->reply_post_host_index[i] = in mpt3sas_base_map_resources()
3717 ((u8 __iomem *)&ioc->chip->Doorbell + (0x4000 + ((i - 1) in mpt3sas_base_map_resources()
3721 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in mpt3sas_base_map_resources()
3722 if (reply_q->msix_index >= ioc->iopoll_q_start_index) { in mpt3sas_base_map_resources()
3724 reply_q->name, reply_q->msix_index); in mpt3sas_base_map_resources()
3729 reply_q->name, in mpt3sas_base_map_resources()
3730 ioc->msix_enable ? "PCI-MSI-X" : "IO-APIC", in mpt3sas_base_map_resources()
3731 pci_irq_vector(ioc->pdev, reply_q->msix_index)); in mpt3sas_base_map_resources()
3735 &chip_phys, ioc->chip, memap_sz); in mpt3sas_base_map_resources()
3749 * mpt3sas_base_get_msg_frame - obtain request mf pointer
3758 return (void *)(ioc->request + (smid * ioc->request_sz)); in mpt3sas_base_get_msg_frame()
3762 * mpt3sas_base_get_sense_buffer - obtain a sense buffer virt addr
3771 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); in mpt3sas_base_get_sense_buffer()
3775 * mpt3sas_base_get_sense_buffer_dma - obtain a sense buffer dma addr
3784 return cpu_to_le32(ioc->sense_dma + ((smid - 1) * in mpt3sas_base_get_sense_buffer_dma()
3789 * mpt3sas_base_get_pcie_sgl - obtain a PCIe SGL virt addr
3793 * Return: virt pointer to a PCIe SGL.
3798 return (void *)(ioc->pcie_sg_lookup[smid - 1].pcie_sgl); in mpt3sas_base_get_pcie_sgl()
3802 * mpt3sas_base_get_pcie_sgl_dma - obtain a PCIe SGL dma addr
3806 * Return: phys pointer to the address of the PCIe buffer.
3811 return ioc->pcie_sg_lookup[smid - 1].pcie_sgl_dma; in mpt3sas_base_get_pcie_sgl_dma()
3815 * mpt3sas_base_get_reply_virt_addr - obtain reply frames virt address
3826 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); in mpt3sas_base_get_reply_virt_addr()
3830 * _base_get_msix_index - get the msix index
3843 if (ioc->msix_load_balance) in _base_get_msix_index()
3844 return ioc->reply_queue_count ? in _base_get_msix_index()
3846 &ioc->total_io_cnt), ioc->reply_queue_count) : 0; in _base_get_msix_index()
3848 if (scmd && ioc->shost->nr_hw_queues > 1) { in _base_get_msix_index()
3852 ioc->high_iops_queues; in _base_get_msix_index()
3855 return ioc->cpu_msix_table[raw_smp_processor_id()]; in _base_get_msix_index()
3859 * _base_get_high_iops_msix_index - get the msix index of
3878 if (scsi_device_busy(scmd->device) > MPT3SAS_DEVICE_HIGH_IOPS_DEPTH) in _base_get_high_iops_msix_index()
3880 atomic64_add_return(1, &ioc->high_iops_outstanding) / in _base_get_high_iops_msix_index()
3888 * mpt3sas_base_get_smid - obtain a free smid from internal queue
3901 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid()
3902 if (list_empty(&ioc->internal_free_list)) { in mpt3sas_base_get_smid()
3903 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid()
3908 request = list_entry(ioc->internal_free_list.next, in mpt3sas_base_get_smid()
3910 request->cb_idx = cb_idx; in mpt3sas_base_get_smid()
3911 smid = request->smid; in mpt3sas_base_get_smid()
3912 list_del(&request->tracker_list); in mpt3sas_base_get_smid()
3913 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid()
3918 * mpt3sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
3943 * tag = smid - 1; in mpt3sas_base_get_smid_scsiio()
3944 * unique_tag = ioc->io_queue_num[tag] << BLK_MQ_UNIQUE_TAG_BITS | tag; in mpt3sas_base_get_smid_scsiio()
3946 ioc->io_queue_num[tag] = blk_mq_unique_tag_to_hwq(unique_tag); in mpt3sas_base_get_smid_scsiio()
3949 request->cb_idx = cb_idx; in mpt3sas_base_get_smid_scsiio()
3950 request->smid = smid; in mpt3sas_base_get_smid_scsiio()
3951 request->scmd = scmd; in mpt3sas_base_get_smid_scsiio()
3952 INIT_LIST_HEAD(&request->chain_list); in mpt3sas_base_get_smid_scsiio()
3957 * mpt3sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
3970 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid_hpr()
3971 if (list_empty(&ioc->hpr_free_list)) { in mpt3sas_base_get_smid_hpr()
3972 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid_hpr()
3976 request = list_entry(ioc->hpr_free_list.next, in mpt3sas_base_get_smid_hpr()
3978 request->cb_idx = cb_idx; in mpt3sas_base_get_smid_hpr()
3979 smid = request->smid; in mpt3sas_base_get_smid_hpr()
3980 list_del(&request->tracker_list); in mpt3sas_base_get_smid_hpr()
3981 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid_hpr()
3991 if (ioc->shost_recovery && ioc->pending_io_count) { in _base_recovery_check()
3992 ioc->pending_io_count = scsi_host_busy(ioc->shost); in _base_recovery_check()
3993 if (ioc->pending_io_count == 0) in _base_recovery_check()
3994 wake_up(&ioc->reset_wq); in _base_recovery_check()
4001 if (WARN_ON(st->smid == 0)) in mpt3sas_base_clear_st()
4003 st->cb_idx = 0xFF; in mpt3sas_base_clear_st()
4004 st->direct_io = 0; in mpt3sas_base_clear_st()
4005 st->scmd = NULL; in mpt3sas_base_clear_st()
4006 atomic_set(&ioc->chain_lookup[st->smid - 1].chain_offset, 0); in mpt3sas_base_clear_st()
4007 st->smid = 0; in mpt3sas_base_clear_st()
4011 * mpt3sas_base_free_smid - put smid back on free_list
4021 if (smid < ioc->hi_priority_smid) { in mpt3sas_base_free_smid()
4033 memset(request, 0, ioc->request_sz); in mpt3sas_base_free_smid()
4037 ioc->io_queue_num[smid - 1] = 0; in mpt3sas_base_free_smid()
4041 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_free_smid()
4042 if (smid < ioc->internal_smid) { in mpt3sas_base_free_smid()
4043 /* hi-priority */ in mpt3sas_base_free_smid()
4044 i = smid - ioc->hi_priority_smid; in mpt3sas_base_free_smid()
4045 ioc->hpr_lookup[i].cb_idx = 0xFF; in mpt3sas_base_free_smid()
4046 list_add(&ioc->hpr_lookup[i].tracker_list, &ioc->hpr_free_list); in mpt3sas_base_free_smid()
4047 } else if (smid <= ioc->hba_queue_depth) { in mpt3sas_base_free_smid()
4049 i = smid - ioc->internal_smid; in mpt3sas_base_free_smid()
4050 ioc->internal_lookup[i].cb_idx = 0xFF; in mpt3sas_base_free_smid()
4051 list_add(&ioc->internal_lookup[i].tracker_list, in mpt3sas_base_free_smid()
4052 &ioc->internal_free_list); in mpt3sas_base_free_smid()
4054 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_free_smid()
4058 * _base_mpi_ep_writeq - 32 bit write to MMIO
4063 * This special handling for MPI EP to take care of 32 bit
4080 * _base_writeq - 64 bit write to MMIO
4106 * _base_set_and_get_msix_index - get the msix index and assign to msix_io
4118 if (smid < ioc->hi_priority_smid) in _base_set_and_get_msix_index()
4124 st->msix_io = ioc->get_msix_index_for_smlio(ioc, st->scmd); in _base_set_and_get_msix_index()
4125 return st->msix_io; in _base_set_and_get_msix_index()
4129 * _base_put_smid_mpi_ep_scsi_io - send SCSI_IO request to firmware
4144 mpi_req_iomem = (void __force *)ioc->chip + in _base_put_smid_mpi_ep_scsi_io()
4145 MPI_FRAME_START_OFFSET + (smid * ioc->request_sz); in _base_put_smid_mpi_ep_scsi_io()
4147 ioc->request_sz); in _base_put_smid_mpi_ep_scsi_io()
4153 _base_mpi_ep_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_mpi_ep_scsi_io()
4154 &ioc->scsi_lookup_lock); in _base_put_smid_mpi_ep_scsi_io()
4158 * _base_put_smid_scsi_io - send SCSI_IO request to firmware
4175 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_scsi_io()
4176 &ioc->scsi_lookup_lock); in _base_put_smid_scsi_io()
4180 * _base_put_smid_fast_path - send fast path request to firmware
4198 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_fast_path()
4199 &ioc->scsi_lookup_lock); in _base_put_smid_fast_path()
4203 * _base_put_smid_hi_priority - send Task Management request to firmware
4216 if (ioc->is_mcpu_endpoint) { in _base_put_smid_hi_priority()
4220 mpi_req_iomem = (void __force *)ioc->chip in _base_put_smid_hi_priority()
4222 + (smid * ioc->request_sz); in _base_put_smid_hi_priority()
4224 ioc->request_sz); in _base_put_smid_hi_priority()
4235 if (ioc->is_mcpu_endpoint) in _base_put_smid_hi_priority()
4237 &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_hi_priority()
4238 &ioc->scsi_lookup_lock); in _base_put_smid_hi_priority()
4240 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_hi_priority()
4241 &ioc->scsi_lookup_lock); in _base_put_smid_hi_priority()
4245 * mpt3sas_base_put_smid_nvme_encap - send NVMe encapsulated request to
4262 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in mpt3sas_base_put_smid_nvme_encap()
4263 &ioc->scsi_lookup_lock); in mpt3sas_base_put_smid_nvme_encap()
4267 * _base_put_smid_default - Default, primarily used for config pages
4278 if (ioc->is_mcpu_endpoint) { in _base_put_smid_default()
4283 mpi_req_iomem = (void __force *)ioc->chip + in _base_put_smid_default()
4284 MPI_FRAME_START_OFFSET + (smid * ioc->request_sz); in _base_put_smid_default()
4286 ioc->request_sz); in _base_put_smid_default()
4294 if (ioc->is_mcpu_endpoint) in _base_put_smid_default()
4296 &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_default()
4297 &ioc->scsi_lookup_lock); in _base_put_smid_default()
4299 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_default()
4300 &ioc->scsi_lookup_lock); in _base_put_smid_default()
4304 * _base_put_smid_scsi_io_atomic - send SCSI_IO request to firmware using
4323 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_scsi_io_atomic()
4327 * _base_put_smid_fast_path_atomic - send fast path request to firmware
4345 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_fast_path_atomic()
4349 * _base_put_smid_hi_priority_atomic - send Task Management request to
4368 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_hi_priority_atomic()
4372 * _base_put_smid_default_atomic - Default, primarily used for config pages
4389 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_default_atomic()
4393 * _base_display_OEMs_branding - Display branding string
4399 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL) in _base_display_OEMs_branding()
4402 switch (ioc->pdev->subsystem_vendor) { in _base_display_OEMs_branding()
4404 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4406 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4421 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4426 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4457 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4462 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4482 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4488 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4493 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4495 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4526 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4531 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4538 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4544 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4549 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4551 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4566 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4571 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4582 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4588 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4593 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4595 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4602 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4607 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4626 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4632 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4642 * _base_display_fwpkg_version - sends FWUpload request to pull FWPkg
4646 * Return: 0 for success, non-zero for failure.
4664 if (ioc->base_cmds.status & MPT3_CMD_PENDING) { in _base_display_fwpkg_version()
4666 return -EAGAIN; in _base_display_fwpkg_version()
4670 fwpkg_data = dma_alloc_coherent(&ioc->pdev->dev, data_length, in _base_display_fwpkg_version()
4676 return -ENOMEM; in _base_display_fwpkg_version()
4679 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in _base_display_fwpkg_version()
4682 r = -EAGAIN; in _base_display_fwpkg_version()
4686 ioc->base_cmds.status = MPT3_CMD_PENDING; in _base_display_fwpkg_version()
4688 ioc->base_cmds.smid = smid; in _base_display_fwpkg_version()
4690 mpi_request->Function = MPI2_FUNCTION_FW_UPLOAD; in _base_display_fwpkg_version()
4691 mpi_request->ImageType = MPI2_FW_UPLOAD_ITYPE_FW_FLASH; in _base_display_fwpkg_version()
4692 mpi_request->ImageSize = cpu_to_le32(data_length); in _base_display_fwpkg_version()
4693 ioc->build_sg(ioc, &mpi_request->SGL, 0, 0, fwpkg_data_dma, in _base_display_fwpkg_version()
4695 init_completion(&ioc->base_cmds.done); in _base_display_fwpkg_version()
4696 ioc->put_smid_default(ioc, smid); in _base_display_fwpkg_version()
4698 wait_for_completion_timeout(&ioc->base_cmds.done, in _base_display_fwpkg_version()
4701 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in _base_display_fwpkg_version()
4708 if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID) { in _base_display_fwpkg_version()
4709 memcpy(&mpi_reply, ioc->base_cmds.reply, in _base_display_fwpkg_version()
4715 if (le32_to_cpu(fw_img_hdr->Signature) == in _base_display_fwpkg_version()
4722 cmp_img_hdr->ApplicationSpecific); in _base_display_fwpkg_version()
4726 fw_img_hdr->PackageVersion.Word); in _base_display_fwpkg_version()
4740 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in _base_display_fwpkg_version()
4743 dma_free_coherent(&ioc->pdev->dev, data_length, fwpkg_data, in _base_display_fwpkg_version()
4746 if (ioc->drv_internal_flags & MPT_DRV_INTERNAL_FIRST_PE_ISSUED) in _base_display_fwpkg_version()
4747 return -EFAULT; in _base_display_fwpkg_version()
4749 return -EFAULT; in _base_display_fwpkg_version()
4750 r = -EAGAIN; in _base_display_fwpkg_version()
4756 * _base_display_ioc_capabilities - Display IOC's capabilities.
4767 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion); in _base_display_ioc_capabilities()
4768 strncpy(desc, ioc->manu_pg0.ChipName, 16); in _base_display_ioc_capabilities()
4771 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, in _base_display_ioc_capabilities()
4772 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, in _base_display_ioc_capabilities()
4773 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, in _base_display_ioc_capabilities()
4774 ioc->facts.FWVersion.Word & 0x000000FF, in _base_display_ioc_capabilities()
4775 ioc->pdev->revision, in _base_display_ioc_capabilities()
4783 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_NVME_DEVICES) { in _base_display_ioc_capabilities()
4790 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { in _base_display_ioc_capabilities()
4795 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { in _base_display_ioc_capabilities()
4803 if (!ioc->hide_ir_msg) { in _base_display_ioc_capabilities()
4804 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4811 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { in _base_display_ioc_capabilities()
4816 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { in _base_display_ioc_capabilities()
4821 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4827 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { in _base_display_ioc_capabilities()
4832 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4838 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4844 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4850 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4856 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); in _base_display_ioc_capabilities()
4866 * mpt3sas_base_update_missing_delay - change the missing delay timers
4914 dmd = sas_iounit_pg1->ReportDeviceMissingDelay; in mpt3sas_base_update_missing_delay()
4927 sas_iounit_pg1->ReportDeviceMissingDelay = dmd; in mpt3sas_base_update_missing_delay()
4930 io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay; in mpt3sas_base_update_missing_delay()
4931 sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay; in mpt3sas_base_update_missing_delay()
4946 ioc->device_missing_delay = dmd_new; in mpt3sas_base_update_missing_delay()
4947 ioc->io_missing_delay = io_missing_delay; in mpt3sas_base_update_missing_delay()
4955 * _base_update_ioc_page1_inlinewith_perf_mode - Update IOC Page1 fields
4969 rc = mpt3sas_config_get_ioc_pg1(ioc, &mpi_reply, &ioc->ioc_pg1_copy); in _base_update_ioc_page1_inlinewith_perf_mode()
4972 memcpy(&ioc_pg1, &ioc->ioc_pg1_copy, sizeof(Mpi2IOCPage1_t)); in _base_update_ioc_page1_inlinewith_perf_mode()
4977 if (ioc->high_iops_queues) { in _base_update_ioc_page1_inlinewith_perf_mode()
4992 ((1 << MPT3SAS_HIGH_IOPS_REPLY_QUEUES/8) - 1)); in _base_update_ioc_page1_inlinewith_perf_mode()
5031 * _base_get_event_diag_triggers - get event diag trigger values from
5066 ioc->diag_trigger_event.ValidEntries = count; in _base_get_event_diag_triggers()
5068 event_tg = &ioc->diag_trigger_event.EventTriggerEntry[0]; in _base_get_event_diag_triggers()
5071 event_tg->EventValue = le16_to_cpu( in _base_get_event_diag_triggers()
5072 mpi_event_tg->MPIEventCode); in _base_get_event_diag_triggers()
5073 event_tg->LogEntryQualifier = le16_to_cpu( in _base_get_event_diag_triggers()
5074 mpi_event_tg->MPIEventCodeSpecific); in _base_get_event_diag_triggers()
5083 * _base_get_scsi_diag_triggers - get scsi diag trigger values from
5118 ioc->diag_trigger_scsi.ValidEntries = count; in _base_get_scsi_diag_triggers()
5120 scsi_tg = &ioc->diag_trigger_scsi.SCSITriggerEntry[0]; in _base_get_scsi_diag_triggers()
5123 scsi_tg->ASCQ = mpi_scsi_tg->ASCQ; in _base_get_scsi_diag_triggers()
5124 scsi_tg->ASC = mpi_scsi_tg->ASC; in _base_get_scsi_diag_triggers()
5125 scsi_tg->SenseKey = mpi_scsi_tg->SenseKey; in _base_get_scsi_diag_triggers()
5135 * _base_get_mpi_diag_triggers - get mpi diag trigger values from
5170 ioc->diag_trigger_mpi.ValidEntries = count; in _base_get_mpi_diag_triggers()
5172 status_tg = &ioc->diag_trigger_mpi.MPITriggerEntry[0]; in _base_get_mpi_diag_triggers()
5176 status_tg->IOCStatus = le16_to_cpu( in _base_get_mpi_diag_triggers()
5177 mpi_status_tg->IOCStatus); in _base_get_mpi_diag_triggers()
5178 status_tg->IocLogInfo = le32_to_cpu( in _base_get_mpi_diag_triggers()
5179 mpi_status_tg->LogInfo); in _base_get_mpi_diag_triggers()
5189 * _base_get_master_diag_triggers - get master diag trigger values from
5219 ioc->diag_trigger_master.MasterData |= in _base_get_master_diag_triggers()
5226 * _base_check_for_trigger_pages_support - checks whether HBA FW supports
5232 * otherwise returns %-EFAULT if driver trigger pages are not supported by FW or
5253 return -EFAULT; in _base_check_for_trigger_pages_support()
5260 * _base_get_diag_triggers - Retrieve diag trigger values from
5276 ioc->diag_trigger_master.MasterData = in _base_get_diag_triggers()
5281 if (r == -EAGAIN) in _base_get_diag_triggers()
5290 ioc->supports_trigger_pages = 1; in _base_get_diag_triggers()
5338 * _base_update_diag_trigger_pages - Update the driver trigger pages after
5349 if (ioc->diag_trigger_master.MasterData) in _base_update_diag_trigger_pages()
5351 &ioc->diag_trigger_master, 1); in _base_update_diag_trigger_pages()
5353 if (ioc->diag_trigger_event.ValidEntries) in _base_update_diag_trigger_pages()
5355 &ioc->diag_trigger_event, 1); in _base_update_diag_trigger_pages()
5357 if (ioc->diag_trigger_scsi.ValidEntries) in _base_update_diag_trigger_pages()
5359 &ioc->diag_trigger_scsi, 1); in _base_update_diag_trigger_pages()
5361 if (ioc->diag_trigger_mpi.ValidEntries) in _base_update_diag_trigger_pages()
5363 &ioc->diag_trigger_mpi, 1); in _base_update_diag_trigger_pages()
5367 * _base_assign_fw_reported_qd - Get FW reported QD for SAS/SATA devices.
5368 * - On failure set default QD values.
5371 * Returns 0 for success, non-zero for failure.
5383 ioc->max_wideport_qd = MPT3SAS_SAS_QUEUE_DEPTH; in _base_assign_fw_reported_qd()
5384 ioc->max_narrowport_qd = MPT3SAS_SAS_QUEUE_DEPTH; in _base_assign_fw_reported_qd()
5385 ioc->max_sata_qd = MPT3SAS_SATA_QUEUE_DEPTH; in _base_assign_fw_reported_qd()
5386 ioc->max_nvme_qd = MPT3SAS_NVME_QUEUE_DEPTH; in _base_assign_fw_reported_qd()
5387 if (!ioc->is_gen35_ioc) in _base_assign_fw_reported_qd()
5394 ioc->name, __FILE__, __LINE__, __func__); in _base_assign_fw_reported_qd()
5401 ioc->name, __FILE__, __LINE__, __func__); in _base_assign_fw_reported_qd()
5405 depth = le16_to_cpu(sas_iounit_pg1->SASWideMaxQueueDepth); in _base_assign_fw_reported_qd()
5406 ioc->max_wideport_qd = (depth ? depth : MPT3SAS_SAS_QUEUE_DEPTH); in _base_assign_fw_reported_qd()
5408 depth = le16_to_cpu(sas_iounit_pg1->SASNarrowMaxQueueDepth); in _base_assign_fw_reported_qd()
5409 ioc->max_narrowport_qd = (depth ? depth : MPT3SAS_SAS_QUEUE_DEPTH); in _base_assign_fw_reported_qd()
5411 depth = sas_iounit_pg1->SATAMaxQDepth; in _base_assign_fw_reported_qd()
5412 ioc->max_sata_qd = (depth ? depth : MPT3SAS_SATA_QUEUE_DEPTH); in _base_assign_fw_reported_qd()
5414 /* pcie iounit page 1 */ in _base_assign_fw_reported_qd()
5419 ioc->name, __FILE__, __LINE__, __func__); in _base_assign_fw_reported_qd()
5422 ioc->max_nvme_qd = (le16_to_cpu(pcie_iounit_pg1.NVMeMaxQueueDepth)) ? in _base_assign_fw_reported_qd()
5428 ioc->max_wideport_qd, ioc->max_narrowport_qd, in _base_assign_fw_reported_qd()
5429 ioc->max_sata_qd, ioc->max_nvme_qd)); in _base_assign_fw_reported_qd()
5435 * mpt3sas_atto_validate_nvram - validate the ATTO nvram read from mfg pg1
5439 * Return: 0 for success, non-zero for failure.
5445 int r = -EINVAL; in mpt3sas_atto_validate_nvram()
5456 while (len--) in mpt3sas_atto_validate_nvram()
5464 s1 = (union ATTO_SAS_ADDRESS *) n->SasAddr; in mpt3sas_atto_validate_nvram()
5466 if (n->Signature[0] != 'E' in mpt3sas_atto_validate_nvram()
5467 || n->Signature[1] != 'S' in mpt3sas_atto_validate_nvram()
5468 || n->Signature[2] != 'A' in mpt3sas_atto_validate_nvram()
5469 || n->Signature[3] != 'S') in mpt3sas_atto_validate_nvram()
5471 else if (n->Version > ATTO_SASNVR_VERSION) in mpt3sas_atto_validate_nvram()
5473 else if ((n->SasAddr[7] & (ATTO_SAS_ADDR_ALIGN - 1)) in mpt3sas_atto_validate_nvram()
5474 || s1->b[0] != 0x50 in mpt3sas_atto_validate_nvram()
5475 || s1->b[1] != 0x01 in mpt3sas_atto_validate_nvram()
5476 || s1->b[2] != 0x08 in mpt3sas_atto_validate_nvram()
5477 || (s1->b[3] & 0xF0) != 0x60 in mpt3sas_atto_validate_nvram()
5478 || ((s1->b[3] & 0x0F) | le32_to_cpu(s1->d[1])) == 0) { in mpt3sas_atto_validate_nvram()
5486 * mpt3sas_atto_get_sas_addr - get the ATTO SAS address from mfg page 1
5490 * Return: 0 for success, non-zero for failure.
5513 addr = *((__be64 *) nvram->SasAddr); in mpt3sas_atto_get_sas_addr()
5514 sas_addr->q = cpu_to_le64(be64_to_cpu(addr)); in mpt3sas_atto_get_sas_addr()
5519 * mpt3sas_atto_init - perform initializaion for ATTO branded
5523 * Return: 0 for success, non-zero for failure.
5552 return -ENOMEM; in mpt3sas_atto_init()
5566 for (ix = 0; ix < bios_pg4->NumPhys; ix++) { in mpt3sas_atto_init()
5569 bios_pg4->Phy[ix].ReassignmentWWID = temp.q; in mpt3sas_atto_init()
5570 bios_pg4->Phy[ix].ReassignmentDeviceName = bias.q; in mpt3sas_atto_init()
5580 * _base_static_config_pages - static start of day config pages
5590 ioc->nvme_abort_timeout = 30; in _base_static_config_pages()
5593 &ioc->manu_pg0); in _base_static_config_pages()
5596 if (ioc->ir_firmware) { in _base_static_config_pages()
5598 &ioc->manu_pg10); in _base_static_config_pages()
5603 if (ioc->pdev->vendor == MPI2_MFGPAGE_VENDORID_ATTO) { in _base_static_config_pages()
5614 &ioc->manu_pg11); in _base_static_config_pages()
5617 if (!ioc->is_gen35_ioc && ioc->manu_pg11.EEDPTagMode == 0) { in _base_static_config_pages()
5619 ioc->name); in _base_static_config_pages()
5620 ioc->manu_pg11.EEDPTagMode &= ~0x3; in _base_static_config_pages()
5621 ioc->manu_pg11.EEDPTagMode |= 0x1; in _base_static_config_pages()
5623 &ioc->manu_pg11); in _base_static_config_pages()
5625 if (ioc->manu_pg11.AddlFlags2 & NVME_TASK_MNGT_CUSTOM_MASK) in _base_static_config_pages()
5626 ioc->tm_custom_handling = 1; in _base_static_config_pages()
5628 ioc->tm_custom_handling = 0; in _base_static_config_pages()
5629 if (ioc->manu_pg11.NVMeAbortTO < NVME_TASK_ABORT_MIN_TIMEOUT) in _base_static_config_pages()
5630 ioc->nvme_abort_timeout = NVME_TASK_ABORT_MIN_TIMEOUT; in _base_static_config_pages()
5631 else if (ioc->manu_pg11.NVMeAbortTO > in _base_static_config_pages()
5633 ioc->nvme_abort_timeout = NVME_TASK_ABORT_MAX_TIMEOUT; in _base_static_config_pages()
5635 ioc->nvme_abort_timeout = ioc->manu_pg11.NVMeAbortTO; in _base_static_config_pages()
5637 ioc->time_sync_interval = in _base_static_config_pages()
5638 ioc->manu_pg11.TimeSyncInterval & MPT3SAS_TIMESYNC_MASK; in _base_static_config_pages()
5639 if (ioc->time_sync_interval) { in _base_static_config_pages()
5640 if (ioc->manu_pg11.TimeSyncInterval & MPT3SAS_TIMESYNC_UNIT_MASK) in _base_static_config_pages()
5641 ioc->time_sync_interval = in _base_static_config_pages()
5642 ioc->time_sync_interval * SECONDS_PER_HOUR; in _base_static_config_pages()
5644 ioc->time_sync_interval = in _base_static_config_pages()
5645 ioc->time_sync_interval * SECONDS_PER_MIN; in _base_static_config_pages()
5647 "Driver-FW TimeSync interval is %d seconds. ManuPg11 TimeSync Unit is in %s\n", in _base_static_config_pages()
5648 ioc->time_sync_interval, (ioc->manu_pg11.TimeSyncInterval & in _base_static_config_pages()
5651 if (ioc->is_gen35_ioc) in _base_static_config_pages()
5653 "TimeSync Interval in Manuf page-11 is not enabled. Periodic Time-Sync will be disabled\n"); in _base_static_config_pages()
5662 if (ioc->pdev->vendor == MPI2_MFGPAGE_VENDORID_ATTO) in _base_static_config_pages()
5663 ioc->bios_pg3.BiosVersion = 0; in _base_static_config_pages()
5665 rc = mpt3sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); in _base_static_config_pages()
5668 rc = mpt3sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); in _base_static_config_pages()
5673 rc = mpt3sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); in _base_static_config_pages()
5676 rc = mpt3sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); in _base_static_config_pages()
5679 rc = mpt3sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); in _base_static_config_pages()
5682 rc = mpt3sas_config_get_iounit_pg8(ioc, &mpi_reply, &ioc->iounit_pg8); in _base_static_config_pages()
5691 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); in _base_static_config_pages()
5692 if ((ioc->facts.IOCCapabilities & in _base_static_config_pages()
5699 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); in _base_static_config_pages()
5700 rc = mpt3sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); in _base_static_config_pages()
5704 if (ioc->iounit_pg8.NumSensors) in _base_static_config_pages()
5705 ioc->temp_sensors_count = ioc->iounit_pg8.NumSensors; in _base_static_config_pages()
5706 if (ioc->is_aero_ioc) { in _base_static_config_pages()
5711 if (ioc->is_gen35_ioc) { in _base_static_config_pages()
5712 if (ioc->is_driver_loading) { in _base_static_config_pages()
5721 * - If previous FW has not supported driver trigger in _base_static_config_pages()
5724 * - If previous FW has supported driver trigger pages in _base_static_config_pages()
5729 if (!ioc->supports_trigger_pages && tg_flags != -EFAULT) in _base_static_config_pages()
5731 else if (ioc->supports_trigger_pages && in _base_static_config_pages()
5732 tg_flags == -EFAULT) in _base_static_config_pages()
5733 ioc->supports_trigger_pages = 0; in _base_static_config_pages()
5740 * mpt3sas_free_enclosure_list - release memory
5752 enclosure_dev_next, &ioc->enclosure_list, list) { in mpt3sas_free_enclosure_list()
5753 list_del(&enclosure_dev->list); in mpt3sas_free_enclosure_list()
5759 * _base_release_memory_pools - release memory
5771 int count = ioc->rdpq_array_enable ? ioc->reply_queue_count : 1; in _base_release_memory_pools()
5775 if (ioc->request) { in _base_release_memory_pools()
5776 dma_free_coherent(&ioc->pdev->dev, ioc->request_dma_sz, in _base_release_memory_pools()
5777 ioc->request, ioc->request_dma); in _base_release_memory_pools()
5780 ioc->request)); in _base_release_memory_pools()
5781 ioc->request = NULL; in _base_release_memory_pools()
5784 if (ioc->sense) { in _base_release_memory_pools()
5785 dma_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); in _base_release_memory_pools()
5786 dma_pool_destroy(ioc->sense_dma_pool); in _base_release_memory_pools()
5789 ioc->sense)); in _base_release_memory_pools()
5790 ioc->sense = NULL; in _base_release_memory_pools()
5793 if (ioc->reply) { in _base_release_memory_pools()
5794 dma_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); in _base_release_memory_pools()
5795 dma_pool_destroy(ioc->reply_dma_pool); in _base_release_memory_pools()
5798 ioc->reply)); in _base_release_memory_pools()
5799 ioc->reply = NULL; in _base_release_memory_pools()
5802 if (ioc->reply_free) { in _base_release_memory_pools()
5803 dma_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, in _base_release_memory_pools()
5804 ioc->reply_free_dma); in _base_release_memory_pools()
5805 dma_pool_destroy(ioc->reply_free_dma_pool); in _base_release_memory_pools()
5808 ioc->reply_free)); in _base_release_memory_pools()
5809 ioc->reply_free = NULL; in _base_release_memory_pools()
5812 if (ioc->reply_post) { in _base_release_memory_pools()
5818 if (ioc->reply_post[i].reply_post_free) { in _base_release_memory_pools()
5820 ioc->reply_post_free_dma_pool, in _base_release_memory_pools()
5821 ioc->reply_post[i].reply_post_free, in _base_release_memory_pools()
5822 ioc->reply_post[i].reply_post_free_dma); in _base_release_memory_pools()
5825 ioc->reply_post[i].reply_post_free)); in _base_release_memory_pools()
5826 ioc->reply_post[i].reply_post_free = in _base_release_memory_pools()
5829 --dma_alloc_count; in _base_release_memory_pools()
5832 dma_pool_destroy(ioc->reply_post_free_dma_pool); in _base_release_memory_pools()
5833 if (ioc->reply_post_free_array && in _base_release_memory_pools()
5834 ioc->rdpq_array_enable) { in _base_release_memory_pools()
5835 dma_pool_free(ioc->reply_post_free_array_dma_pool, in _base_release_memory_pools()
5836 ioc->reply_post_free_array, in _base_release_memory_pools()
5837 ioc->reply_post_free_array_dma); in _base_release_memory_pools()
5838 ioc->reply_post_free_array = NULL; in _base_release_memory_pools()
5840 dma_pool_destroy(ioc->reply_post_free_array_dma_pool); in _base_release_memory_pools()
5841 kfree(ioc->reply_post); in _base_release_memory_pools()
5844 if (ioc->pcie_sgl_dma_pool) { in _base_release_memory_pools()
5845 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_release_memory_pools()
5846 dma_pool_free(ioc->pcie_sgl_dma_pool, in _base_release_memory_pools()
5847 ioc->pcie_sg_lookup[i].pcie_sgl, in _base_release_memory_pools()
5848 ioc->pcie_sg_lookup[i].pcie_sgl_dma); in _base_release_memory_pools()
5849 ioc->pcie_sg_lookup[i].pcie_sgl = NULL; in _base_release_memory_pools()
5851 dma_pool_destroy(ioc->pcie_sgl_dma_pool); in _base_release_memory_pools()
5853 if (ioc->config_page) { in _base_release_memory_pools()
5856 ioc->config_page)); in _base_release_memory_pools()
5857 dma_free_coherent(&ioc->pdev->dev, ioc->config_page_sz, in _base_release_memory_pools()
5858 ioc->config_page, ioc->config_page_dma); in _base_release_memory_pools()
5861 kfree(ioc->hpr_lookup); in _base_release_memory_pools()
5862 ioc->hpr_lookup = NULL; in _base_release_memory_pools()
5863 kfree(ioc->internal_lookup); in _base_release_memory_pools()
5864 ioc->internal_lookup = NULL; in _base_release_memory_pools()
5865 if (ioc->chain_lookup) { in _base_release_memory_pools()
5866 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_release_memory_pools()
5867 for (j = ioc->chains_per_prp_buffer; in _base_release_memory_pools()
5868 j < ioc->chains_needed_per_io; j++) { in _base_release_memory_pools()
5869 ct = &ioc->chain_lookup[i].chains_per_smid[j]; in _base_release_memory_pools()
5870 if (ct && ct->chain_buffer) in _base_release_memory_pools()
5871 dma_pool_free(ioc->chain_dma_pool, in _base_release_memory_pools()
5872 ct->chain_buffer, in _base_release_memory_pools()
5873 ct->chain_buffer_dma); in _base_release_memory_pools()
5875 kfree(ioc->chain_lookup[i].chains_per_smid); in _base_release_memory_pools()
5877 dma_pool_destroy(ioc->chain_dma_pool); in _base_release_memory_pools()
5878 kfree(ioc->chain_lookup); in _base_release_memory_pools()
5879 ioc->chain_lookup = NULL; in _base_release_memory_pools()
5882 kfree(ioc->io_queue_num); in _base_release_memory_pools()
5883 ioc->io_queue_num = NULL; in _base_release_memory_pools()
5887 * mpt3sas_check_same_4gb_region - checks whether all reply queues in a set are
5900 end_address = start_address + pool_sz - 1; in mpt3sas_check_same_4gb_region()
5909 * _base_reduce_hba_queue_depth- Retry with reduced queue depth
5912 * Return: 0 for success, non-zero for failure.
5919 if ((ioc->hba_queue_depth - reduce_sz) > in _base_reduce_hba_queue_depth()
5920 (ioc->internal_depth + INTERNAL_SCSIIO_CMDS_COUNT)) { in _base_reduce_hba_queue_depth()
5921 ioc->hba_queue_depth -= reduce_sz; in _base_reduce_hba_queue_depth()
5924 return -ENOMEM; in _base_reduce_hba_queue_depth()
5928 * _base_allocate_pcie_sgl_pool - Allocating DMA'able memory
5929 * for pcie sgl pools.
5933 * Return: 0 for success, non-zero for failure.
5942 ioc->pcie_sgl_dma_pool = in _base_allocate_pcie_sgl_pool()
5943 dma_pool_create("PCIe SGL pool", &ioc->pdev->dev, sz, in _base_allocate_pcie_sgl_pool()
5944 ioc->page_size, 0); in _base_allocate_pcie_sgl_pool()
5945 if (!ioc->pcie_sgl_dma_pool) { in _base_allocate_pcie_sgl_pool()
5946 ioc_err(ioc, "PCIe SGL pool: dma_pool_create failed\n"); in _base_allocate_pcie_sgl_pool()
5947 return -ENOMEM; in _base_allocate_pcie_sgl_pool()
5950 ioc->chains_per_prp_buffer = sz/ioc->chain_segment_sz; in _base_allocate_pcie_sgl_pool()
5951 ioc->chains_per_prp_buffer = in _base_allocate_pcie_sgl_pool()
5952 min(ioc->chains_per_prp_buffer, ioc->chains_needed_per_io); in _base_allocate_pcie_sgl_pool()
5953 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_allocate_pcie_sgl_pool()
5954 ioc->pcie_sg_lookup[i].pcie_sgl = in _base_allocate_pcie_sgl_pool()
5955 dma_pool_alloc(ioc->pcie_sgl_dma_pool, GFP_KERNEL, in _base_allocate_pcie_sgl_pool()
5956 &ioc->pcie_sg_lookup[i].pcie_sgl_dma); in _base_allocate_pcie_sgl_pool()
5957 if (!ioc->pcie_sg_lookup[i].pcie_sgl) { in _base_allocate_pcie_sgl_pool()
5958 ioc_err(ioc, "PCIe SGL pool: dma_pool_alloc failed\n"); in _base_allocate_pcie_sgl_pool()
5959 return -EAGAIN; in _base_allocate_pcie_sgl_pool()
5963 ioc->pcie_sg_lookup[i].pcie_sgl_dma, sz)) { in _base_allocate_pcie_sgl_pool()
5964 ioc_err(ioc, "PCIE SGLs are not in same 4G !! pcie sgl (0x%p) dma = (0x%llx)\n", in _base_allocate_pcie_sgl_pool()
5965 ioc->pcie_sg_lookup[i].pcie_sgl, in _base_allocate_pcie_sgl_pool()
5967 ioc->pcie_sg_lookup[i].pcie_sgl_dma); in _base_allocate_pcie_sgl_pool()
5968 ioc->use_32bit_dma = true; in _base_allocate_pcie_sgl_pool()
5969 return -EAGAIN; in _base_allocate_pcie_sgl_pool()
5972 for (j = 0; j < ioc->chains_per_prp_buffer; j++) { in _base_allocate_pcie_sgl_pool()
5973 ct = &ioc->chain_lookup[i].chains_per_smid[j]; in _base_allocate_pcie_sgl_pool()
5974 ct->chain_buffer = in _base_allocate_pcie_sgl_pool()
5975 ioc->pcie_sg_lookup[i].pcie_sgl + in _base_allocate_pcie_sgl_pool()
5976 (j * ioc->chain_segment_sz); in _base_allocate_pcie_sgl_pool()
5977 ct->chain_buffer_dma = in _base_allocate_pcie_sgl_pool()
5978 ioc->pcie_sg_lookup[i].pcie_sgl_dma + in _base_allocate_pcie_sgl_pool()
5979 (j * ioc->chain_segment_sz); in _base_allocate_pcie_sgl_pool()
5983 "PCIe sgl pool depth(%d), element_size(%d), pool_size(%d kB)\n", in _base_allocate_pcie_sgl_pool()
5984 ioc->scsiio_depth, sz, (sz * ioc->scsiio_depth)/1024)); in _base_allocate_pcie_sgl_pool()
5987 ioc->chains_per_prp_buffer)); in _base_allocate_pcie_sgl_pool()
5992 * _base_allocate_chain_dma_pool - Allocating DMA'able memory
5997 * Return: 0 for success, non-zero for failure.
6005 ioc->chain_dma_pool = dma_pool_create("chain pool", &ioc->pdev->dev, in _base_allocate_chain_dma_pool()
6006 ioc->chain_segment_sz, 16, 0); in _base_allocate_chain_dma_pool()
6007 if (!ioc->chain_dma_pool) in _base_allocate_chain_dma_pool()
6008 return -ENOMEM; in _base_allocate_chain_dma_pool()
6010 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_allocate_chain_dma_pool()
6011 for (j = ioc->chains_per_prp_buffer; in _base_allocate_chain_dma_pool()
6012 j < ioc->chains_needed_per_io; j++) { in _base_allocate_chain_dma_pool()
6013 ctr = &ioc->chain_lookup[i].chains_per_smid[j]; in _base_allocate_chain_dma_pool()
6014 ctr->chain_buffer = dma_pool_alloc(ioc->chain_dma_pool, in _base_allocate_chain_dma_pool()
6015 GFP_KERNEL, &ctr->chain_buffer_dma); in _base_allocate_chain_dma_pool()
6016 if (!ctr->chain_buffer) in _base_allocate_chain_dma_pool()
6017 return -EAGAIN; in _base_allocate_chain_dma_pool()
6019 ctr->chain_buffer_dma, ioc->chain_segment_sz)) { in _base_allocate_chain_dma_pool()
6022 ctr->chain_buffer, in _base_allocate_chain_dma_pool()
6023 (unsigned long long)ctr->chain_buffer_dma); in _base_allocate_chain_dma_pool()
6024 ioc->use_32bit_dma = true; in _base_allocate_chain_dma_pool()
6025 return -EAGAIN; in _base_allocate_chain_dma_pool()
6031 ioc->scsiio_depth, ioc->chain_segment_sz, ((ioc->scsiio_depth * in _base_allocate_chain_dma_pool()
6032 (ioc->chains_needed_per_io - ioc->chains_per_prp_buffer) * in _base_allocate_chain_dma_pool()
6033 ioc->chain_segment_sz))/1024)); in _base_allocate_chain_dma_pool()
6038 * _base_allocate_sense_dma_pool - Allocating DMA'able memory
6042 * Return: 0 for success, non-zero for failure.
6047 ioc->sense_dma_pool = in _base_allocate_sense_dma_pool()
6048 dma_pool_create("sense pool", &ioc->pdev->dev, sz, 4, 0); in _base_allocate_sense_dma_pool()
6049 if (!ioc->sense_dma_pool) in _base_allocate_sense_dma_pool()
6050 return -ENOMEM; in _base_allocate_sense_dma_pool()
6051 ioc->sense = dma_pool_alloc(ioc->sense_dma_pool, in _base_allocate_sense_dma_pool()
6052 GFP_KERNEL, &ioc->sense_dma); in _base_allocate_sense_dma_pool()
6053 if (!ioc->sense) in _base_allocate_sense_dma_pool()
6054 return -EAGAIN; in _base_allocate_sense_dma_pool()
6055 if (!mpt3sas_check_same_4gb_region(ioc->sense_dma, sz)) { in _base_allocate_sense_dma_pool()
6058 ioc->sense, (unsigned long long) ioc->sense_dma)); in _base_allocate_sense_dma_pool()
6059 ioc->use_32bit_dma = true; in _base_allocate_sense_dma_pool()
6060 return -EAGAIN; in _base_allocate_sense_dma_pool()
6063 "sense pool(0x%p) - dma(0x%llx): depth(%d), element_size(%d), pool_size (%d kB)\n", in _base_allocate_sense_dma_pool()
6064 ioc->sense, (unsigned long long)ioc->sense_dma, in _base_allocate_sense_dma_pool()
6065 ioc->scsiio_depth, SCSI_SENSE_BUFFERSIZE, sz/1024); in _base_allocate_sense_dma_pool()
6070 * _base_allocate_reply_pool - Allocating DMA'able memory
6074 * Return: 0 for success, non-zero for failure.
6080 ioc->reply_dma_pool = dma_pool_create("reply pool", in _base_allocate_reply_pool()
6081 &ioc->pdev->dev, sz, 4, 0); in _base_allocate_reply_pool()
6082 if (!ioc->reply_dma_pool) in _base_allocate_reply_pool()
6083 return -ENOMEM; in _base_allocate_reply_pool()
6084 ioc->reply = dma_pool_alloc(ioc->reply_dma_pool, GFP_KERNEL, in _base_allocate_reply_pool()
6085 &ioc->reply_dma); in _base_allocate_reply_pool()
6086 if (!ioc->reply) in _base_allocate_reply_pool()
6087 return -EAGAIN; in _base_allocate_reply_pool()
6088 if (!mpt3sas_check_same_4gb_region(ioc->reply_dma, sz)) { in _base_allocate_reply_pool()
6091 ioc->reply, (unsigned long long) ioc->reply_dma)); in _base_allocate_reply_pool()
6092 ioc->use_32bit_dma = true; in _base_allocate_reply_pool()
6093 return -EAGAIN; in _base_allocate_reply_pool()
6095 ioc->reply_dma_min_address = (u32)(ioc->reply_dma); in _base_allocate_reply_pool()
6096 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz; in _base_allocate_reply_pool()
6098 "reply pool(0x%p) - dma(0x%llx): depth(%d), frame_size(%d), pool_size(%d kB)\n", in _base_allocate_reply_pool()
6099 ioc->reply, (unsigned long long)ioc->reply_dma, in _base_allocate_reply_pool()
6100 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024); in _base_allocate_reply_pool()
6105 * _base_allocate_reply_free_dma_pool - Allocating DMA'able memory
6109 * Return: 0 for success, non-zero for failure.
6115 ioc->reply_free_dma_pool = dma_pool_create( in _base_allocate_reply_free_dma_pool()
6116 "reply_free pool", &ioc->pdev->dev, sz, 16, 0); in _base_allocate_reply_free_dma_pool()
6117 if (!ioc->reply_free_dma_pool) in _base_allocate_reply_free_dma_pool()
6118 return -ENOMEM; in _base_allocate_reply_free_dma_pool()
6119 ioc->reply_free = dma_pool_alloc(ioc->reply_free_dma_pool, in _base_allocate_reply_free_dma_pool()
6120 GFP_KERNEL, &ioc->reply_free_dma); in _base_allocate_reply_free_dma_pool()
6121 if (!ioc->reply_free) in _base_allocate_reply_free_dma_pool()
6122 return -EAGAIN; in _base_allocate_reply_free_dma_pool()
6123 if (!mpt3sas_check_same_4gb_region(ioc->reply_free_dma, sz)) { in _base_allocate_reply_free_dma_pool()
6126 ioc->reply_free, (unsigned long long) ioc->reply_free_dma)); in _base_allocate_reply_free_dma_pool()
6127 ioc->use_32bit_dma = true; in _base_allocate_reply_free_dma_pool()
6128 return -EAGAIN; in _base_allocate_reply_free_dma_pool()
6130 memset(ioc->reply_free, 0, sz); in _base_allocate_reply_free_dma_pool()
6133 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); in _base_allocate_reply_free_dma_pool()
6136 (unsigned long long)ioc->reply_free_dma)); in _base_allocate_reply_free_dma_pool()
6141 * _base_allocate_reply_post_free_array - Allocating DMA'able memory
6145 * Return: 0 for success, non-zero for failure.
6152 ioc->reply_post_free_array_dma_pool = in _base_allocate_reply_post_free_array()
6154 &ioc->pdev->dev, reply_post_free_array_sz, 16, 0); in _base_allocate_reply_post_free_array()
6155 if (!ioc->reply_post_free_array_dma_pool) in _base_allocate_reply_post_free_array()
6156 return -ENOMEM; in _base_allocate_reply_post_free_array()
6157 ioc->reply_post_free_array = in _base_allocate_reply_post_free_array()
6158 dma_pool_alloc(ioc->reply_post_free_array_dma_pool, in _base_allocate_reply_post_free_array()
6159 GFP_KERNEL, &ioc->reply_post_free_array_dma); in _base_allocate_reply_post_free_array()
6160 if (!ioc->reply_post_free_array) in _base_allocate_reply_post_free_array()
6161 return -EAGAIN; in _base_allocate_reply_post_free_array()
6162 if (!mpt3sas_check_same_4gb_region(ioc->reply_post_free_array_dma, in _base_allocate_reply_post_free_array()
6166 ioc->reply_free, in _base_allocate_reply_post_free_array()
6167 (unsigned long long) ioc->reply_free_dma)); in _base_allocate_reply_post_free_array()
6168 ioc->use_32bit_dma = true; in _base_allocate_reply_post_free_array()
6169 return -EAGAIN; in _base_allocate_reply_post_free_array()
6174 * base_alloc_rdpq_dma_pool - Allocating DMA'able memory
6178 * Return: 0 for success, non-zero for failure.
6185 int reply_post_free_sz = ioc->reply_post_queue_depth * in base_alloc_rdpq_dma_pool()
6187 int count = ioc->rdpq_array_enable ? ioc->reply_queue_count : 1; in base_alloc_rdpq_dma_pool()
6189 ioc->reply_post = kcalloc(count, sizeof(struct reply_post_struct), in base_alloc_rdpq_dma_pool()
6191 if (!ioc->reply_post) in base_alloc_rdpq_dma_pool()
6192 return -ENOMEM; in base_alloc_rdpq_dma_pool()
6194 * For INVADER_SERIES each set of 8 reply queues(0-7, 8-15, ..) and in base_alloc_rdpq_dma_pool()
6195 * VENTURA_SERIES each set of 16 reply queues(0-15, 16-31, ..) should in base_alloc_rdpq_dma_pool()
6197 * upper 32-bits in their memory address. so here driver is allocating in base_alloc_rdpq_dma_pool()
6204 ioc->reply_post_free_dma_pool = in base_alloc_rdpq_dma_pool()
6206 &ioc->pdev->dev, sz, 16, 0); in base_alloc_rdpq_dma_pool()
6207 if (!ioc->reply_post_free_dma_pool) in base_alloc_rdpq_dma_pool()
6208 return -ENOMEM; in base_alloc_rdpq_dma_pool()
6211 ioc->reply_post[i].reply_post_free = in base_alloc_rdpq_dma_pool()
6212 dma_pool_zalloc(ioc->reply_post_free_dma_pool, in base_alloc_rdpq_dma_pool()
6214 &ioc->reply_post[i].reply_post_free_dma); in base_alloc_rdpq_dma_pool()
6215 if (!ioc->reply_post[i].reply_post_free) in base_alloc_rdpq_dma_pool()
6216 return -ENOMEM; in base_alloc_rdpq_dma_pool()
6227 ioc->reply_post[i].reply_post_free_dma, sz)) { in base_alloc_rdpq_dma_pool()
6231 ioc->reply_post[i].reply_post_free, in base_alloc_rdpq_dma_pool()
6233 ioc->reply_post[i].reply_post_free_dma)); in base_alloc_rdpq_dma_pool()
6234 return -EAGAIN; in base_alloc_rdpq_dma_pool()
6236 dma_alloc_count--; in base_alloc_rdpq_dma_pool()
6239 ioc->reply_post[i].reply_post_free = in base_alloc_rdpq_dma_pool()
6241 ((long)ioc->reply_post[i-1].reply_post_free in base_alloc_rdpq_dma_pool()
6243 ioc->reply_post[i].reply_post_free_dma = in base_alloc_rdpq_dma_pool()
6245 (ioc->reply_post[i-1].reply_post_free_dma + in base_alloc_rdpq_dma_pool()
6253 * _base_allocate_memory_pools - allocate start of day memory pools
6277 facts = &ioc->facts; in _base_allocate_memory_pools()
6280 if (max_sgl_entries != -1) in _base_allocate_memory_pools()
6283 if (ioc->hba_mpi_version_belonged == MPI2_VERSION) in _base_allocate_memory_pools()
6294 if (ioc->is_mcpu_endpoint) in _base_allocate_memory_pools()
6295 ioc->shost->sg_tablesize = MPT_MIN_PHYS_SEGMENTS; in _base_allocate_memory_pools()
6305 ioc->shost->sg_tablesize = sg_tablesize; in _base_allocate_memory_pools()
6308 ioc->internal_depth = min_t(int, (facts->HighPriorityCredit + (5)), in _base_allocate_memory_pools()
6309 (facts->RequestCredit / 4)); in _base_allocate_memory_pools()
6310 if (ioc->internal_depth < INTERNAL_CMDS_COUNT) { in _base_allocate_memory_pools()
6311 if (facts->RequestCredit <= (INTERNAL_CMDS_COUNT + in _base_allocate_memory_pools()
6314 facts->RequestCredit); in _base_allocate_memory_pools()
6315 return -ENOMEM; in _base_allocate_memory_pools()
6317 ioc->internal_depth = 10; in _base_allocate_memory_pools()
6320 ioc->hi_priority_depth = ioc->internal_depth - (5); in _base_allocate_memory_pools()
6322 if (max_queue_depth != -1 && max_queue_depth != 0) { in _base_allocate_memory_pools()
6324 ioc->internal_depth, facts->RequestCredit); in _base_allocate_memory_pools()
6328 max_request_credit = min_t(u16, facts->RequestCredit, in _base_allocate_memory_pools()
6329 (MPT3SAS_KDUMP_SCSI_IO_DEPTH + ioc->internal_depth)); in _base_allocate_memory_pools()
6331 max_request_credit = min_t(u16, facts->RequestCredit, in _base_allocate_memory_pools()
6334 /* Firmware maintains additional facts->HighPriorityCredit number of in _base_allocate_memory_pools()
6338 ioc->hba_queue_depth = max_request_credit + ioc->hi_priority_depth; in _base_allocate_memory_pools()
6341 ioc->request_sz = facts->IOCRequestFrameSize * 4; in _base_allocate_memory_pools()
6344 ioc->reply_sz = facts->ReplyFrameSize * 4; in _base_allocate_memory_pools()
6347 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_allocate_memory_pools()
6348 if (facts->IOCMaxChainSegmentSize) in _base_allocate_memory_pools()
6349 ioc->chain_segment_sz = in _base_allocate_memory_pools()
6350 facts->IOCMaxChainSegmentSize * in _base_allocate_memory_pools()
6354 ioc->chain_segment_sz = DEFAULT_NUM_FWCHAIN_ELEMTS * in _base_allocate_memory_pools()
6357 ioc->chain_segment_sz = ioc->request_sz; in _base_allocate_memory_pools()
6360 sge_size = max_t(u16, ioc->sge_size, ioc->sge_size_ieee); in _base_allocate_memory_pools()
6365 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - in _base_allocate_memory_pools()
6367 ioc->max_sges_in_main_message = max_sge_elements/sge_size; in _base_allocate_memory_pools()
6370 max_sge_elements = ioc->chain_segment_sz - sge_size; in _base_allocate_memory_pools()
6371 ioc->max_sges_in_chain_message = max_sge_elements/sge_size; in _base_allocate_memory_pools()
6376 chains_needed_per_io = ((ioc->shost->sg_tablesize - in _base_allocate_memory_pools()
6377 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) in _base_allocate_memory_pools()
6379 if (chains_needed_per_io > facts->MaxChainDepth) { in _base_allocate_memory_pools()
6380 chains_needed_per_io = facts->MaxChainDepth; in _base_allocate_memory_pools()
6381 ioc->shost->sg_tablesize = min_t(u16, in _base_allocate_memory_pools()
6382 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message in _base_allocate_memory_pools()
6383 * chains_needed_per_io), ioc->shost->sg_tablesize); in _base_allocate_memory_pools()
6385 ioc->chains_needed_per_io = chains_needed_per_io; in _base_allocate_memory_pools()
6387 /* reply free queue sizing - taking into account for 64 FW events */ in _base_allocate_memory_pools()
6388 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; in _base_allocate_memory_pools()
6391 if (ioc->is_mcpu_endpoint) in _base_allocate_memory_pools()
6392 ioc->reply_post_queue_depth = ioc->reply_free_queue_depth; in _base_allocate_memory_pools()
6395 ioc->reply_post_queue_depth = ioc->hba_queue_depth + in _base_allocate_memory_pools()
6396 ioc->reply_free_queue_depth + 1; in _base_allocate_memory_pools()
6398 if (ioc->reply_post_queue_depth % 16) in _base_allocate_memory_pools()
6399 ioc->reply_post_queue_depth += 16 - in _base_allocate_memory_pools()
6400 (ioc->reply_post_queue_depth % 16); in _base_allocate_memory_pools()
6403 if (ioc->reply_post_queue_depth > in _base_allocate_memory_pools()
6404 facts->MaxReplyDescriptorPostQueueDepth) { in _base_allocate_memory_pools()
6405 ioc->reply_post_queue_depth = in _base_allocate_memory_pools()
6406 facts->MaxReplyDescriptorPostQueueDepth - in _base_allocate_memory_pools()
6407 (facts->MaxReplyDescriptorPostQueueDepth % 16); in _base_allocate_memory_pools()
6408 ioc->hba_queue_depth = in _base_allocate_memory_pools()
6409 ((ioc->reply_post_queue_depth - 64) / 2) - 1; in _base_allocate_memory_pools()
6410 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; in _base_allocate_memory_pools()
6416 ioc->max_sges_in_main_message, in _base_allocate_memory_pools()
6417 ioc->max_sges_in_chain_message, in _base_allocate_memory_pools()
6418 ioc->shost->sg_tablesize, in _base_allocate_memory_pools()
6419 ioc->chains_needed_per_io); in _base_allocate_memory_pools()
6422 reply_post_free_sz = ioc->reply_post_queue_depth * in _base_allocate_memory_pools()
6425 if ((_base_is_controller_msix_enabled(ioc) && !ioc->rdpq_array_enable) in _base_allocate_memory_pools()
6426 || (ioc->reply_queue_count < RDPQ_MAX_INDEX_IN_ONE_CHUNK)) in _base_allocate_memory_pools()
6427 rdpq_sz = reply_post_free_sz * ioc->reply_queue_count; in _base_allocate_memory_pools()
6429 if (ret == -EAGAIN) { in _base_allocate_memory_pools()
6435 ioc->use_32bit_dma = true; in _base_allocate_memory_pools()
6436 if (_base_config_dma_addressing(ioc, ioc->pdev) != 0) { in _base_allocate_memory_pools()
6438 "32 DMA mask failed %s\n", pci_name(ioc->pdev)); in _base_allocate_memory_pools()
6439 return -ENODEV; in _base_allocate_memory_pools()
6442 return -ENOMEM; in _base_allocate_memory_pools()
6443 } else if (ret == -ENOMEM) in _base_allocate_memory_pools()
6444 return -ENOMEM; in _base_allocate_memory_pools()
6445 total_sz = rdpq_sz * (!ioc->rdpq_array_enable ? 1 : in _base_allocate_memory_pools()
6446 DIV_ROUND_UP(ioc->reply_queue_count, RDPQ_MAX_INDEX_IN_ONE_CHUNK)); in _base_allocate_memory_pools()
6447 ioc->scsiio_depth = ioc->hba_queue_depth - in _base_allocate_memory_pools()
6448 ioc->hi_priority_depth - ioc->internal_depth; in _base_allocate_memory_pools()
6453 ioc->shost->can_queue = ioc->scsiio_depth - INTERNAL_SCSIIO_CMDS_COUNT; in _base_allocate_memory_pools()
6456 ioc->shost->can_queue)); in _base_allocate_memory_pools()
6461 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth; in _base_allocate_memory_pools()
6462 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz); in _base_allocate_memory_pools()
6464 /* hi-priority queue */ in _base_allocate_memory_pools()
6465 sz += (ioc->hi_priority_depth * ioc->request_sz); in _base_allocate_memory_pools()
6468 sz += (ioc->internal_depth * ioc->request_sz); in _base_allocate_memory_pools()
6470 ioc->request_dma_sz = sz; in _base_allocate_memory_pools()
6471 ioc->request = dma_alloc_coherent(&ioc->pdev->dev, sz, in _base_allocate_memory_pools()
6472 &ioc->request_dma, GFP_KERNEL); in _base_allocate_memory_pools()
6473 if (!ioc->request) { in _base_allocate_memory_pools()
6475 ioc->hba_queue_depth, ioc->chains_needed_per_io, in _base_allocate_memory_pools()
6476 ioc->request_sz, sz / 1024); in _base_allocate_memory_pools()
6477 if (ioc->scsiio_depth < MPT3SAS_SAS_QUEUE_DEPTH) in _base_allocate_memory_pools()
6480 ioc->hba_queue_depth -= retry_sz; in _base_allocate_memory_pools()
6487 ioc->hba_queue_depth, ioc->chains_needed_per_io, in _base_allocate_memory_pools()
6488 ioc->request_sz, sz / 1024); in _base_allocate_memory_pools()
6490 /* hi-priority queue */ in _base_allocate_memory_pools()
6491 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) * in _base_allocate_memory_pools()
6492 ioc->request_sz); in _base_allocate_memory_pools()
6493 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) * in _base_allocate_memory_pools()
6494 ioc->request_sz); in _base_allocate_memory_pools()
6497 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth * in _base_allocate_memory_pools()
6498 ioc->request_sz); in _base_allocate_memory_pools()
6499 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth * in _base_allocate_memory_pools()
6500 ioc->request_sz); in _base_allocate_memory_pools()
6503 "request pool(0x%p) - dma(0x%llx): " in _base_allocate_memory_pools()
6505 ioc->request, (unsigned long long) ioc->request_dma, in _base_allocate_memory_pools()
6506 ioc->hba_queue_depth, ioc->request_sz, in _base_allocate_memory_pools()
6507 (ioc->hba_queue_depth * ioc->request_sz) / 1024); in _base_allocate_memory_pools()
6513 ioc->request, ioc->scsiio_depth)); in _base_allocate_memory_pools()
6515 ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH); in _base_allocate_memory_pools()
6516 sz = ioc->scsiio_depth * sizeof(struct chain_lookup); in _base_allocate_memory_pools()
6517 ioc->chain_lookup = kzalloc(sz, GFP_KERNEL); in _base_allocate_memory_pools()
6518 if (!ioc->chain_lookup) { in _base_allocate_memory_pools()
6523 sz = ioc->chains_needed_per_io * sizeof(struct chain_tracker); in _base_allocate_memory_pools()
6524 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_allocate_memory_pools()
6525 ioc->chain_lookup[i].chains_per_smid = kzalloc(sz, GFP_KERNEL); in _base_allocate_memory_pools()
6526 if (!ioc->chain_lookup[i].chains_per_smid) { in _base_allocate_memory_pools()
6532 /* initialize hi-priority queue smid's */ in _base_allocate_memory_pools()
6533 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth, in _base_allocate_memory_pools()
6535 if (!ioc->hpr_lookup) { in _base_allocate_memory_pools()
6539 ioc->hi_priority_smid = ioc->scsiio_depth + 1; in _base_allocate_memory_pools()
6542 ioc->hi_priority, in _base_allocate_memory_pools()
6543 ioc->hi_priority_depth, ioc->hi_priority_smid)); in _base_allocate_memory_pools()
6546 ioc->internal_lookup = kcalloc(ioc->internal_depth, in _base_allocate_memory_pools()
6548 if (!ioc->internal_lookup) { in _base_allocate_memory_pools()
6552 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth; in _base_allocate_memory_pools()
6555 ioc->internal, in _base_allocate_memory_pools()
6556 ioc->internal_depth, ioc->internal_smid)); in _base_allocate_memory_pools()
6558 ioc->io_queue_num = kcalloc(ioc->scsiio_depth, in _base_allocate_memory_pools()
6560 if (!ioc->io_queue_num) in _base_allocate_memory_pools()
6564 * (((sg_tablesize * 8) - 1) / (page_size - 8)) + 1 in _base_allocate_memory_pools()
6565 * ((sg_tablesize * 8) - 1) is the max PRP's minus the first PRP entry in _base_allocate_memory_pools()
6576 ioc->chains_per_prp_buffer = 0; in _base_allocate_memory_pools()
6577 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_NVME_DEVICES) { in _base_allocate_memory_pools()
6579 (ioc->shost->sg_tablesize * NVME_PRP_SIZE) - 1; in _base_allocate_memory_pools()
6580 nvme_blocks_needed /= (ioc->page_size - NVME_PRP_SIZE); in _base_allocate_memory_pools()
6583 sz = sizeof(struct pcie_sg_list) * ioc->scsiio_depth; in _base_allocate_memory_pools()
6584 ioc->pcie_sg_lookup = kzalloc(sz, GFP_KERNEL); in _base_allocate_memory_pools()
6585 if (!ioc->pcie_sg_lookup) { in _base_allocate_memory_pools()
6586 ioc_info(ioc, "PCIe SGL lookup: kzalloc failed\n"); in _base_allocate_memory_pools()
6589 sz = nvme_blocks_needed * ioc->page_size; in _base_allocate_memory_pools()
6591 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6592 return -ENOMEM; in _base_allocate_memory_pools()
6593 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6595 total_sz += sz * ioc->scsiio_depth; in _base_allocate_memory_pools()
6598 rc = _base_allocate_chain_dma_pool(ioc, ioc->chain_segment_sz); in _base_allocate_memory_pools()
6599 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6600 return -ENOMEM; in _base_allocate_memory_pools()
6601 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6603 total_sz += ioc->chain_segment_sz * ((ioc->chains_needed_per_io - in _base_allocate_memory_pools()
6604 ioc->chains_per_prp_buffer) * ioc->scsiio_depth); in _base_allocate_memory_pools()
6607 ioc->chain_depth, ioc->chain_segment_sz, in _base_allocate_memory_pools()
6608 (ioc->chain_depth * ioc->chain_segment_sz) / 1024)); in _base_allocate_memory_pools()
6610 sense_sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE; in _base_allocate_memory_pools()
6612 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6613 return -ENOMEM; in _base_allocate_memory_pools()
6614 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6618 "sense pool(0x%p)- dma(0x%llx): depth(%d)," in _base_allocate_memory_pools()
6620 ioc->sense, (unsigned long long)ioc->sense_dma, ioc->scsiio_depth, in _base_allocate_memory_pools()
6623 sz = ioc->reply_free_queue_depth * ioc->reply_sz; in _base_allocate_memory_pools()
6625 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6626 return -ENOMEM; in _base_allocate_memory_pools()
6627 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6632 sz = ioc->reply_free_queue_depth * 4; in _base_allocate_memory_pools()
6634 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6635 return -ENOMEM; in _base_allocate_memory_pools()
6636 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6640 (unsigned long long)ioc->reply_free_dma)); in _base_allocate_memory_pools()
6642 if (ioc->rdpq_array_enable) { in _base_allocate_memory_pools()
6643 reply_post_free_array_sz = ioc->reply_queue_count * in _base_allocate_memory_pools()
6647 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6648 return -ENOMEM; in _base_allocate_memory_pools()
6649 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6652 ioc->config_page_sz = 512; in _base_allocate_memory_pools()
6653 ioc->config_page = dma_alloc_coherent(&ioc->pdev->dev, in _base_allocate_memory_pools()
6654 ioc->config_page_sz, &ioc->config_page_dma, GFP_KERNEL); in _base_allocate_memory_pools()
6655 if (!ioc->config_page) { in _base_allocate_memory_pools()
6660 ioc_info(ioc, "config page(0x%p) - dma(0x%llx): size(%d)\n", in _base_allocate_memory_pools()
6661 ioc->config_page, (unsigned long long)ioc->config_page_dma, in _base_allocate_memory_pools()
6662 ioc->config_page_sz); in _base_allocate_memory_pools()
6663 total_sz += ioc->config_page_sz; in _base_allocate_memory_pools()
6668 ioc->shost->can_queue, facts->RequestCredit); in _base_allocate_memory_pools()
6670 ioc->shost->sg_tablesize); in _base_allocate_memory_pools()
6675 if (ioc->use_32bit_dma && (ioc->dma_mask > 32)) { in _base_allocate_memory_pools()
6677 if (_base_config_dma_addressing(ioc, ioc->pdev) != 0) { in _base_allocate_memory_pools()
6679 pci_name(ioc->pdev)); in _base_allocate_memory_pools()
6680 return -ENODEV; in _base_allocate_memory_pools()
6683 return -ENOMEM; in _base_allocate_memory_pools()
6687 return -ENOMEM; in _base_allocate_memory_pools()
6691 * mpt3sas_base_get_iocstate - Get the current state of a MPT adapter.
6703 s = ioc->base_readl(&ioc->chip->Doorbell); in mpt3sas_base_get_iocstate()
6709 * _base_wait_on_iocstate - waiting on a particular ioc state
6714 * Return: 0 for success, non-zero for failure.
6735 } while (--cntdn); in _base_wait_on_iocstate()
6741 * _base_dump_reg_set - This function will print hexdump of register set.
6750 u32 __iomem *reg = (u32 __iomem *)ioc->chip; in _base_dump_reg_set()
6758 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
6763 * Return: 0 for success, non-zero for failure.
6765 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
6777 int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus); in _base_wait_for_doorbell_int()
6787 } while (--cntdn); in _base_wait_for_doorbell_int()
6791 return -EFAULT; in _base_wait_for_doorbell_int()
6803 int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus); in _base_spin_on_doorbell_int()
6813 } while (--cntdn); in _base_spin_on_doorbell_int()
6817 return -EFAULT; in _base_spin_on_doorbell_int()
6822 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
6826 * Return: 0 for success, non-zero for failure.
6828 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
6841 int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus); in _base_wait_for_doorbell_ack()
6848 doorbell = ioc->base_readl(&ioc->chip->Doorbell); in _base_wait_for_doorbell_ack()
6852 return -EFAULT; in _base_wait_for_doorbell_ack()
6857 return -EFAULT; in _base_wait_for_doorbell_ack()
6864 } while (--cntdn); in _base_wait_for_doorbell_ack()
6869 return -EFAULT; in _base_wait_for_doorbell_ack()
6873 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
6877 * Return: 0 for success, non-zero for failure.
6888 doorbell_reg = ioc->base_readl(&ioc->chip->Doorbell); in _base_wait_for_doorbell_not_used()
6898 } while (--cntdn); in _base_wait_for_doorbell_not_used()
6902 return -EFAULT; in _base_wait_for_doorbell_not_used()
6906 * _base_send_ioc_reset - send doorbell reset
6911 * Return: 0 for success, non-zero for failure.
6922 return -EFAULT; in _base_send_ioc_reset()
6925 if (!(ioc->facts.IOCCapabilities & in _base_send_ioc_reset()
6927 return -EFAULT; in _base_send_ioc_reset()
6932 &ioc->chip->Doorbell); in _base_send_ioc_reset()
6934 r = -EFAULT; in _base_send_ioc_reset()
6942 r = -EFAULT; in _base_send_ioc_reset()
6948 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
6954 MPI2_IOC_STATE_COREDUMP && (ioc->is_driver_loading == 1 || in _base_send_ioc_reset()
6955 ioc->fault_reset_work_q == NULL)) { in _base_send_ioc_reset()
6957 &ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
6962 &ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
6964 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
6972 * mpt3sas_wait_for_ioc - IOC's operational state is checked here.
6978 * and operational; otherwise returns %-EFAULT.
6999 if (ioc->is_driver_loading) in mpt3sas_wait_for_ioc()
7000 return -ETIME; in mpt3sas_wait_for_ioc()
7005 } while (--timeout); in mpt3sas_wait_for_ioc()
7008 return -EFAULT; in mpt3sas_wait_for_ioc()
7016 * _base_handshake_req_reply_wait - send request thru doorbell interface
7024 * Return: 0 for success, non-zero for failure.
7036 if ((ioc->base_readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { in _base_handshake_req_reply_wait()
7038 return -EFAULT; in _base_handshake_req_reply_wait()
7042 if (ioc->base_readl(&ioc->chip->HostInterruptStatus) & in _base_handshake_req_reply_wait()
7044 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7049 &ioc->chip->Doorbell); in _base_handshake_req_reply_wait()
7054 return -EFAULT; in _base_handshake_req_reply_wait()
7056 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7061 return -EFAULT; in _base_handshake_req_reply_wait()
7064 /* send message 32-bits at a time */ in _base_handshake_req_reply_wait()
7066 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); in _base_handshake_req_reply_wait()
7074 return -EFAULT; in _base_handshake_req_reply_wait()
7081 return -EFAULT; in _base_handshake_req_reply_wait()
7084 /* read the first two 16-bits, it gives the total length of the reply */ in _base_handshake_req_reply_wait()
7085 reply[0] = le16_to_cpu(ioc->base_readl(&ioc->chip->Doorbell) in _base_handshake_req_reply_wait()
7087 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7091 return -EFAULT; in _base_handshake_req_reply_wait()
7093 reply[1] = le16_to_cpu(ioc->base_readl(&ioc->chip->Doorbell) in _base_handshake_req_reply_wait()
7095 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7097 for (i = 2; i < default_reply->MsgLength * 2; i++) { in _base_handshake_req_reply_wait()
7101 return -EFAULT; in _base_handshake_req_reply_wait()
7104 ioc->base_readl(&ioc->chip->Doorbell); in _base_handshake_req_reply_wait()
7107 ioc->base_readl(&ioc->chip->Doorbell) in _base_handshake_req_reply_wait()
7109 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7118 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7120 if (ioc->logging_level & MPT_DEBUG_INIT) { in _base_handshake_req_reply_wait()
7131 * mpt3sas_base_sas_iounit_control - send sas iounit control to FW
7136 * The SAS IO Unit Control Request message allows the host to perform low-level
7142 * Return: 0 for success, non-zero for failure.
7156 mutex_lock(&ioc->base_cmds.mutex); in mpt3sas_base_sas_iounit_control()
7158 if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) { in mpt3sas_base_sas_iounit_control()
7160 rc = -EAGAIN; in mpt3sas_base_sas_iounit_control()
7168 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in mpt3sas_base_sas_iounit_control()
7171 rc = -EAGAIN; in mpt3sas_base_sas_iounit_control()
7176 ioc->base_cmds.status = MPT3_CMD_PENDING; in mpt3sas_base_sas_iounit_control()
7178 ioc->base_cmds.smid = smid; in mpt3sas_base_sas_iounit_control()
7180 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || in mpt3sas_base_sas_iounit_control()
7181 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) in mpt3sas_base_sas_iounit_control()
7182 ioc->ioc_link_reset_in_progress = 1; in mpt3sas_base_sas_iounit_control()
7183 init_completion(&ioc->base_cmds.done); in mpt3sas_base_sas_iounit_control()
7184 ioc->put_smid_default(ioc, smid); in mpt3sas_base_sas_iounit_control()
7185 wait_for_completion_timeout(&ioc->base_cmds.done, in mpt3sas_base_sas_iounit_control()
7187 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || in mpt3sas_base_sas_iounit_control()
7188 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && in mpt3sas_base_sas_iounit_control()
7189 ioc->ioc_link_reset_in_progress) in mpt3sas_base_sas_iounit_control()
7190 ioc->ioc_link_reset_in_progress = 0; in mpt3sas_base_sas_iounit_control()
7191 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in mpt3sas_base_sas_iounit_control()
7192 mpt3sas_check_cmd_timeout(ioc, ioc->base_cmds.status, in mpt3sas_base_sas_iounit_control()
7197 if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID) in mpt3sas_base_sas_iounit_control()
7198 memcpy(mpi_reply, ioc->base_cmds.reply, in mpt3sas_base_sas_iounit_control()
7202 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_sas_iounit_control()
7208 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_sas_iounit_control()
7209 rc = -EFAULT; in mpt3sas_base_sas_iounit_control()
7211 mutex_unlock(&ioc->base_cmds.mutex); in mpt3sas_base_sas_iounit_control()
7216 * mpt3sas_base_scsi_enclosure_processor - sending request to sep device
7224 * Return: 0 for success, non-zero for failure.
7237 mutex_lock(&ioc->base_cmds.mutex); in mpt3sas_base_scsi_enclosure_processor()
7239 if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) { in mpt3sas_base_scsi_enclosure_processor()
7241 rc = -EAGAIN; in mpt3sas_base_scsi_enclosure_processor()
7249 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in mpt3sas_base_scsi_enclosure_processor()
7252 rc = -EAGAIN; in mpt3sas_base_scsi_enclosure_processor()
7257 ioc->base_cmds.status = MPT3_CMD_PENDING; in mpt3sas_base_scsi_enclosure_processor()
7259 ioc->base_cmds.smid = smid; in mpt3sas_base_scsi_enclosure_processor()
7260 memset(request, 0, ioc->request_sz); in mpt3sas_base_scsi_enclosure_processor()
7262 init_completion(&ioc->base_cmds.done); in mpt3sas_base_scsi_enclosure_processor()
7263 ioc->put_smid_default(ioc, smid); in mpt3sas_base_scsi_enclosure_processor()
7264 wait_for_completion_timeout(&ioc->base_cmds.done, in mpt3sas_base_scsi_enclosure_processor()
7266 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in mpt3sas_base_scsi_enclosure_processor()
7268 ioc->base_cmds.status, mpi_request, in mpt3sas_base_scsi_enclosure_processor()
7272 if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID) in mpt3sas_base_scsi_enclosure_processor()
7273 memcpy(mpi_reply, ioc->base_cmds.reply, in mpt3sas_base_scsi_enclosure_processor()
7277 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_scsi_enclosure_processor()
7283 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_scsi_enclosure_processor()
7284 rc = -EFAULT; in mpt3sas_base_scsi_enclosure_processor()
7286 mutex_unlock(&ioc->base_cmds.mutex); in mpt3sas_base_scsi_enclosure_processor()
7291 * _base_get_port_facts - obtain port facts reply and save in ioc
7295 * Return: 0 for success, non-zero for failure.
7320 pfacts = &ioc->pfacts[port]; in _base_get_port_facts()
7322 pfacts->PortNumber = mpi_reply.PortNumber; in _base_get_port_facts()
7323 pfacts->VP_ID = mpi_reply.VP_ID; in _base_get_port_facts()
7324 pfacts->VF_ID = mpi_reply.VF_ID; in _base_get_port_facts()
7325 pfacts->MaxPostedCmdBuffers = in _base_get_port_facts()
7332 * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL
7336 * Return: 0 for success, non-zero for failure.
7346 if (ioc->pci_error_recovery) { in _base_wait_for_iocstate()
7350 return -EFAULT; in _base_wait_for_iocstate()
7376 return -EFAULT; in _base_wait_for_iocstate()
7384 return -EFAULT; in _base_wait_for_iocstate()
7393 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
7396 * Return: 0 for success, non-zero for failure.
7427 facts = &ioc->facts; in _base_get_ioc_facts()
7429 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); in _base_get_ioc_facts()
7430 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); in _base_get_ioc_facts()
7431 facts->VP_ID = mpi_reply.VP_ID; in _base_get_ioc_facts()
7432 facts->VF_ID = mpi_reply.VF_ID; in _base_get_ioc_facts()
7433 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); in _base_get_ioc_facts()
7434 facts->MaxChainDepth = mpi_reply.MaxChainDepth; in _base_get_ioc_facts()
7435 facts->WhoInit = mpi_reply.WhoInit; in _base_get_ioc_facts()
7436 facts->NumberOfPorts = mpi_reply.NumberOfPorts; in _base_get_ioc_facts()
7437 facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors; in _base_get_ioc_facts()
7438 if (ioc->msix_enable && (facts->MaxMSIxVectors <= in _base_get_ioc_facts()
7439 MAX_COMBINED_MSIX_VECTORS(ioc->is_gen35_ioc))) in _base_get_ioc_facts()
7440 ioc->combined_reply_queue = 0; in _base_get_ioc_facts()
7441 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); in _base_get_ioc_facts()
7442 facts->MaxReplyDescriptorPostQueueDepth = in _base_get_ioc_facts()
7444 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); in _base_get_ioc_facts()
7445 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); in _base_get_ioc_facts()
7446 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) in _base_get_ioc_facts()
7447 ioc->ir_firmware = 1; in _base_get_ioc_facts()
7448 if ((facts->IOCCapabilities & in _base_get_ioc_facts()
7450 ioc->rdpq_array_capable = 1; in _base_get_ioc_facts()
7451 if ((facts->IOCCapabilities & MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ) in _base_get_ioc_facts()
7452 && ioc->is_aero_ioc) in _base_get_ioc_facts()
7453 ioc->atomic_desc_capable = 1; in _base_get_ioc_facts()
7454 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); in _base_get_ioc_facts()
7455 facts->IOCRequestFrameSize = in _base_get_ioc_facts()
7457 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_get_ioc_facts()
7458 facts->IOCMaxChainSegmentSize = in _base_get_ioc_facts()
7461 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); in _base_get_ioc_facts()
7462 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); in _base_get_ioc_facts()
7463 ioc->shost->max_id = -1; in _base_get_ioc_facts()
7464 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); in _base_get_ioc_facts()
7465 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); in _base_get_ioc_facts()
7466 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); in _base_get_ioc_facts()
7467 facts->HighPriorityCredit = in _base_get_ioc_facts()
7469 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; in _base_get_ioc_facts()
7470 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); in _base_get_ioc_facts()
7471 facts->CurrentHostPageSize = mpi_reply.CurrentHostPageSize; in _base_get_ioc_facts()
7476 ioc->page_size = 1 << facts->CurrentHostPageSize; in _base_get_ioc_facts()
7477 if (ioc->page_size == 1) { in _base_get_ioc_facts()
7479 ioc->page_size = 1 << MPT3SAS_HOST_PAGE_SIZE_4K; in _base_get_ioc_facts()
7483 facts->CurrentHostPageSize)); in _base_get_ioc_facts()
7487 facts->RequestCredit, facts->MaxChainDepth)); in _base_get_ioc_facts()
7490 facts->IOCRequestFrameSize * 4, in _base_get_ioc_facts()
7491 facts->ReplyFrameSize * 4)); in _base_get_ioc_facts()
7496 * _base_send_ioc_init - send ioc_init to firmware
7499 * Return: 0 for success, non-zero for failure.
7518 mpi_request.MsgVersion = cpu_to_le16(ioc->hba_mpi_version_belonged); in _base_send_ioc_init()
7523 mpi_request.HostMSIxVectors = ioc->reply_queue_count; in _base_send_ioc_init()
7524 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); in _base_send_ioc_init()
7526 cpu_to_le16(ioc->reply_post_queue_depth); in _base_send_ioc_init()
7528 cpu_to_le16(ioc->reply_free_queue_depth); in _base_send_ioc_init()
7531 cpu_to_le32((u64)ioc->sense_dma >> 32); in _base_send_ioc_init()
7533 cpu_to_le32((u64)ioc->reply_dma >> 32); in _base_send_ioc_init()
7535 cpu_to_le64((u64)ioc->request_dma); in _base_send_ioc_init()
7537 cpu_to_le64((u64)ioc->reply_free_dma); in _base_send_ioc_init()
7539 if (ioc->rdpq_array_enable) { in _base_send_ioc_init()
7540 reply_post_free_array_sz = ioc->reply_queue_count * in _base_send_ioc_init()
7542 memset(ioc->reply_post_free_array, 0, reply_post_free_array_sz); in _base_send_ioc_init()
7543 for (i = 0; i < ioc->reply_queue_count; i++) in _base_send_ioc_init()
7544 ioc->reply_post_free_array[i].RDPQBaseAddress = in _base_send_ioc_init()
7546 (u64)ioc->reply_post[i].reply_post_free_dma); in _base_send_ioc_init()
7549 cpu_to_le64((u64)ioc->reply_post_free_array_dma); in _base_send_ioc_init()
7552 cpu_to_le64((u64)ioc->reply_post[0].reply_post_free_dma); in _base_send_ioc_init()
7567 if (ioc->logging_level & MPT_DEBUG_INIT) { in _base_send_ioc_init()
7591 r = -EIO; in _base_send_ioc_init()
7595 ioc->timestamp_update_count = 0; in _base_send_ioc_init()
7600 * mpt3sas_port_enable_done - command completion routine for port enable
7616 if (ioc->port_enable_cmds.status == MPT3_CMD_NOT_USED) in mpt3sas_port_enable_done()
7623 if (mpi_reply->Function != MPI2_FUNCTION_PORT_ENABLE) in mpt3sas_port_enable_done()
7626 ioc->port_enable_cmds.status &= ~MPT3_CMD_PENDING; in mpt3sas_port_enable_done()
7627 ioc->port_enable_cmds.status |= MPT3_CMD_COMPLETE; in mpt3sas_port_enable_done()
7628 ioc->port_enable_cmds.status |= MPT3_CMD_REPLY_VALID; in mpt3sas_port_enable_done()
7629 memcpy(ioc->port_enable_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); in mpt3sas_port_enable_done()
7630 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK; in mpt3sas_port_enable_done()
7632 ioc->port_enable_failed = 1; in mpt3sas_port_enable_done()
7634 if (ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE_ASYNC) { in mpt3sas_port_enable_done()
7635 ioc->port_enable_cmds.status &= ~MPT3_CMD_COMPLETE_ASYNC; in mpt3sas_port_enable_done()
7640 ioc->start_scan_failed = ioc_status; in mpt3sas_port_enable_done()
7641 ioc->start_scan = 0; in mpt3sas_port_enable_done()
7645 complete(&ioc->port_enable_cmds.done); in mpt3sas_port_enable_done()
7650 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
7653 * Return: 0 for success, non-zero for failure.
7666 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) { in _base_send_port_enable()
7668 return -EAGAIN; in _base_send_port_enable()
7671 smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx); in _base_send_port_enable()
7674 return -EAGAIN; in _base_send_port_enable()
7677 ioc->port_enable_cmds.status = MPT3_CMD_PENDING; in _base_send_port_enable()
7679 ioc->port_enable_cmds.smid = smid; in _base_send_port_enable()
7681 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; in _base_send_port_enable()
7683 init_completion(&ioc->port_enable_cmds.done); in _base_send_port_enable()
7684 ioc->put_smid_default(ioc, smid); in _base_send_port_enable()
7685 wait_for_completion_timeout(&ioc->port_enable_cmds.done, 300*HZ); in _base_send_port_enable()
7686 if (!(ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE)) { in _base_send_port_enable()
7690 if (ioc->port_enable_cmds.status & MPT3_CMD_RESET) in _base_send_port_enable()
7691 r = -EFAULT; in _base_send_port_enable()
7693 r = -ETIME; in _base_send_port_enable()
7697 mpi_reply = ioc->port_enable_cmds.reply; in _base_send_port_enable()
7698 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK; in _base_send_port_enable()
7702 r = -EFAULT; in _base_send_port_enable()
7707 ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED; in _base_send_port_enable()
7713 * mpt3sas_port_enable - initiate firmware discovery (don't wait for reply)
7716 * Return: 0 for success, non-zero for failure.
7726 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) { in mpt3sas_port_enable()
7728 return -EAGAIN; in mpt3sas_port_enable()
7731 smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx); in mpt3sas_port_enable()
7734 return -EAGAIN; in mpt3sas_port_enable()
7736 ioc->drv_internal_flags |= MPT_DRV_INTERNAL_FIRST_PE_ISSUED; in mpt3sas_port_enable()
7737 ioc->port_enable_cmds.status = MPT3_CMD_PENDING; in mpt3sas_port_enable()
7738 ioc->port_enable_cmds.status |= MPT3_CMD_COMPLETE_ASYNC; in mpt3sas_port_enable()
7740 ioc->port_enable_cmds.smid = smid; in mpt3sas_port_enable()
7742 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; in mpt3sas_port_enable()
7744 ioc->put_smid_default(ioc, smid); in mpt3sas_port_enable()
7749 * _base_determine_wait_on_discovery - desposition
7762 * turn on the bit in ioc->pd_handles to indicate PD in _base_determine_wait_on_discovery()
7766 if (ioc->ir_firmware) in _base_determine_wait_on_discovery()
7770 if (!ioc->bios_pg3.BiosVersion) in _base_determine_wait_on_discovery()
7780 if ((ioc->bios_pg2.CurrentBootDeviceForm & in _base_determine_wait_on_discovery()
7784 (ioc->bios_pg2.ReqBootDeviceForm & in _base_determine_wait_on_discovery()
7788 (ioc->bios_pg2.ReqAltBootDeviceForm & in _base_determine_wait_on_discovery()
7797 * _base_unmask_events - turn on notification for this event
7801 * The mask is stored in ioc->event_masks.
7814 ioc->event_masks[0] &= ~desired_event; in _base_unmask_events()
7816 ioc->event_masks[1] &= ~desired_event; in _base_unmask_events()
7818 ioc->event_masks[2] &= ~desired_event; in _base_unmask_events()
7820 ioc->event_masks[3] &= ~desired_event; in _base_unmask_events()
7824 * _base_event_notification - send event notification
7827 * Return: 0 for success, non-zero for failure.
7839 if (ioc->base_cmds.status & MPT3_CMD_PENDING) { in _base_event_notification()
7841 return -EAGAIN; in _base_event_notification()
7844 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in _base_event_notification()
7847 return -EAGAIN; in _base_event_notification()
7849 ioc->base_cmds.status = MPT3_CMD_PENDING; in _base_event_notification()
7851 ioc->base_cmds.smid = smid; in _base_event_notification()
7853 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; in _base_event_notification()
7854 mpi_request->VF_ID = 0; /* TODO */ in _base_event_notification()
7855 mpi_request->VP_ID = 0; in _base_event_notification()
7857 mpi_request->EventMasks[i] = in _base_event_notification()
7858 cpu_to_le32(ioc->event_masks[i]); in _base_event_notification()
7859 init_completion(&ioc->base_cmds.done); in _base_event_notification()
7860 ioc->put_smid_default(ioc, smid); in _base_event_notification()
7861 wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); in _base_event_notification()
7862 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in _base_event_notification()
7866 if (ioc->base_cmds.status & MPT3_CMD_RESET) in _base_event_notification()
7867 r = -EFAULT; in _base_event_notification()
7873 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in _base_event_notification()
7876 if (ioc->drv_internal_flags & MPT_DRV_INTERNAL_FIRST_PE_ISSUED) in _base_event_notification()
7877 return -EFAULT; in _base_event_notification()
7879 return -EFAULT; in _base_event_notification()
7880 r = -EAGAIN; in _base_event_notification()
7886 * mpt3sas_base_validate_event_type - validating event types
7906 (ioc->event_masks[i] & desired_event)) { in mpt3sas_base_validate_event_type()
7907 ioc->event_masks[i] &= ~desired_event; in mpt3sas_base_validate_event_type()
7917 mutex_lock(&ioc->base_cmds.mutex); in mpt3sas_base_validate_event_type()
7919 mutex_unlock(&ioc->base_cmds.mutex); in mpt3sas_base_validate_event_type()
7923 * _base_diag_reset - the "big hammer" start of day reset
7926 * Return: 0 for success, non-zero for failure.
7938 pci_cfg_access_lock(ioc->pdev); in _base_diag_reset()
7948 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
7949 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
7950 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
7951 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
7952 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
7953 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
7954 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
7966 host_diagnostic = ioc->base_readl(&ioc->chip->HostDiagnostic); in _base_diag_reset()
7973 hcb_size = ioc->base_readl(&ioc->chip->HCBSize); in _base_diag_reset()
7977 &ioc->chip->HostDiagnostic); in _base_diag_reset()
7979 /*This delay allows the chip PCIe hardware time to finish reset tasks*/ in _base_diag_reset()
7986 host_diagnostic = ioc->base_readl(&ioc->chip->HostDiagnostic); in _base_diag_reset()
8006 writel(host_diagnostic, &ioc->chip->HostDiagnostic); in _base_diag_reset()
8008 drsprintk(ioc, ioc_info(ioc, "re-enable the HCDW\n")); in _base_diag_reset()
8010 &ioc->chip->HCBSize); in _base_diag_reset()
8015 &ioc->chip->HostDiagnostic); in _base_diag_reset()
8019 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); in _base_diag_reset()
8030 pci_cfg_access_unlock(ioc->pdev); in _base_diag_reset()
8035 pci_cfg_access_unlock(ioc->pdev); in _base_diag_reset()
8037 return -EFAULT; in _base_diag_reset()
8041 * mpt3sas_base_make_ioc_ready - put controller in READY state
8045 * Return: 0 for success, non-zero for failure.
8056 if (ioc->pci_error_recovery) in mpt3sas_base_make_ioc_ready()
8072 return -EFAULT; in mpt3sas_base_make_ioc_ready()
8101 if (ioc->ioc_coredump_loop != MPT3SAS_COREDUMP_LOOP_DONE) { in mpt3sas_base_make_ioc_ready()
8125 * _base_make_ioc_operational - put controller in OPERATIONAL state
8128 * Return: 0 for success, non-zero for failure.
8148 &ioc->delayed_tr_list, list) { in _base_make_ioc_operational()
8149 list_del(&delayed_tr->list); in _base_make_ioc_operational()
8155 &ioc->delayed_tr_volume_list, list) { in _base_make_ioc_operational()
8156 list_del(&delayed_tr->list); in _base_make_ioc_operational()
8161 &ioc->delayed_sc_list, list) { in _base_make_ioc_operational()
8162 list_del(&delayed_sc->list); in _base_make_ioc_operational()
8167 &ioc->delayed_event_ack_list, list) { in _base_make_ioc_operational()
8168 list_del(&delayed_event_ack->list); in _base_make_ioc_operational()
8172 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in _base_make_ioc_operational()
8174 /* hi-priority queue */ in _base_make_ioc_operational()
8175 INIT_LIST_HEAD(&ioc->hpr_free_list); in _base_make_ioc_operational()
8176 smid = ioc->hi_priority_smid; in _base_make_ioc_operational()
8177 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) { in _base_make_ioc_operational()
8178 ioc->hpr_lookup[i].cb_idx = 0xFF; in _base_make_ioc_operational()
8179 ioc->hpr_lookup[i].smid = smid; in _base_make_ioc_operational()
8180 list_add_tail(&ioc->hpr_lookup[i].tracker_list, in _base_make_ioc_operational()
8181 &ioc->hpr_free_list); in _base_make_ioc_operational()
8185 INIT_LIST_HEAD(&ioc->internal_free_list); in _base_make_ioc_operational()
8186 smid = ioc->internal_smid; in _base_make_ioc_operational()
8187 for (i = 0; i < ioc->internal_depth; i++, smid++) { in _base_make_ioc_operational()
8188 ioc->internal_lookup[i].cb_idx = 0xFF; in _base_make_ioc_operational()
8189 ioc->internal_lookup[i].smid = smid; in _base_make_ioc_operational()
8190 list_add_tail(&ioc->internal_lookup[i].tracker_list, in _base_make_ioc_operational()
8191 &ioc->internal_free_list); in _base_make_ioc_operational()
8194 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in _base_make_ioc_operational()
8197 for (i = 0, reply_address = (u32)ioc->reply_dma ; in _base_make_ioc_operational()
8198 i < ioc->reply_free_queue_depth ; i++, reply_address += in _base_make_ioc_operational()
8199 ioc->reply_sz) { in _base_make_ioc_operational()
8200 ioc->reply_free[i] = cpu_to_le32(reply_address); in _base_make_ioc_operational()
8201 if (ioc->is_mcpu_endpoint) in _base_make_ioc_operational()
8207 if (ioc->is_driver_loading) in _base_make_ioc_operational()
8212 reply_post_free_contig = ioc->reply_post[0].reply_post_free; in _base_make_ioc_operational()
8213 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_make_ioc_operational()
8218 if (ioc->rdpq_array_enable) { in _base_make_ioc_operational()
8219 reply_q->reply_post_free = in _base_make_ioc_operational()
8220 ioc->reply_post[index++].reply_post_free; in _base_make_ioc_operational()
8222 reply_q->reply_post_free = reply_post_free_contig; in _base_make_ioc_operational()
8223 reply_post_free_contig += ioc->reply_post_queue_depth; in _base_make_ioc_operational()
8226 reply_q->reply_post_host_index = 0; in _base_make_ioc_operational()
8227 for (i = 0; i < ioc->reply_post_queue_depth; i++) in _base_make_ioc_operational()
8228 reply_q->reply_post_free[i].Words = in _base_make_ioc_operational()
8242 if (!ioc->is_driver_loading) in _base_make_ioc_operational()
8251 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; in _base_make_ioc_operational()
8252 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); in _base_make_ioc_operational()
8255 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_make_ioc_operational()
8256 if (ioc->combined_reply_queue) in _base_make_ioc_operational()
8257 writel((reply_q->msix_index & 7)<< in _base_make_ioc_operational()
8259 ioc->replyPostRegisterIndex[reply_q->msix_index/8]); in _base_make_ioc_operational()
8261 writel(reply_q->msix_index << in _base_make_ioc_operational()
8263 &ioc->chip->ReplyPostHostIndex); in _base_make_ioc_operational()
8273 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_make_ioc_operational()
8287 if (!ioc->shost_recovery) { in _base_make_ioc_operational()
8289 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier in _base_make_ioc_operational()
8292 le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) & in _base_make_ioc_operational()
8295 ioc->mfg_pg10_hide_flag = hide_flag; in _base_make_ioc_operational()
8298 ioc->wait_for_discovery_to_complete = in _base_make_ioc_operational()
8312 * mpt3sas_base_free_resources - free resources controller resources
8321 mutex_lock(&ioc->pci_access_mutex); in mpt3sas_base_free_resources()
8322 if (ioc->chip_phys && ioc->chip) { in mpt3sas_base_free_resources()
8324 ioc->shost_recovery = 1; in mpt3sas_base_free_resources()
8326 ioc->shost_recovery = 0; in mpt3sas_base_free_resources()
8330 mutex_unlock(&ioc->pci_access_mutex); in mpt3sas_base_free_resources()
8335 * mpt3sas_base_attach - attach controller instance
8338 * Return: 0 for success, non-zero for failure.
8349 ioc->cpu_count = num_online_cpus(); in mpt3sas_base_attach()
8352 ioc->cpu_msix_table_sz = last_cpu_id + 1; in mpt3sas_base_attach()
8353 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL); in mpt3sas_base_attach()
8354 ioc->reply_queue_count = 1; in mpt3sas_base_attach()
8355 if (!ioc->cpu_msix_table) { in mpt3sas_base_attach()
8357 r = -ENOMEM; in mpt3sas_base_attach()
8361 if (ioc->is_warpdrive) { in mpt3sas_base_attach()
8362 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz, in mpt3sas_base_attach()
8364 if (!ioc->reply_post_host_index) { in mpt3sas_base_attach()
8366 r = -ENOMEM; in mpt3sas_base_attach()
8371 ioc->smp_affinity_enable = smp_affinity_enable; in mpt3sas_base_attach()
8373 ioc->rdpq_array_enable_assigned = 0; in mpt3sas_base_attach()
8374 ioc->use_32bit_dma = false; in mpt3sas_base_attach()
8375 ioc->dma_mask = 64; in mpt3sas_base_attach()
8376 if (ioc->is_aero_ioc) in mpt3sas_base_attach()
8377 ioc->base_readl = &_base_readl_aero; in mpt3sas_base_attach()
8379 ioc->base_readl = &_base_readl; in mpt3sas_base_attach()
8384 pci_set_drvdata(ioc->pdev, ioc->shost); in mpt3sas_base_attach()
8392 switch (ioc->hba_mpi_version_belonged) { in mpt3sas_base_attach()
8394 ioc->build_sg_scmd = &_base_build_sg_scmd; in mpt3sas_base_attach()
8395 ioc->build_sg = &_base_build_sg; in mpt3sas_base_attach()
8396 ioc->build_zero_len_sge = &_base_build_zero_len_sge; in mpt3sas_base_attach()
8397 ioc->get_msix_index_for_smlio = &_base_get_msix_index; in mpt3sas_base_attach()
8404 * Target Status - all require the IEEE formatted scatter gather in mpt3sas_base_attach()
8407 ioc->build_sg_scmd = &_base_build_sg_scmd_ieee; in mpt3sas_base_attach()
8408 ioc->build_sg = &_base_build_sg_ieee; in mpt3sas_base_attach()
8409 ioc->build_nvme_prp = &_base_build_nvme_prp; in mpt3sas_base_attach()
8410 ioc->build_zero_len_sge = &_base_build_zero_len_sge_ieee; in mpt3sas_base_attach()
8411 ioc->sge_size_ieee = sizeof(Mpi2IeeeSgeSimple64_t); in mpt3sas_base_attach()
8412 if (ioc->high_iops_queues) in mpt3sas_base_attach()
8413 ioc->get_msix_index_for_smlio = in mpt3sas_base_attach()
8416 ioc->get_msix_index_for_smlio = &_base_get_msix_index; in mpt3sas_base_attach()
8419 if (ioc->atomic_desc_capable) { in mpt3sas_base_attach()
8420 ioc->put_smid_default = &_base_put_smid_default_atomic; in mpt3sas_base_attach()
8421 ioc->put_smid_scsi_io = &_base_put_smid_scsi_io_atomic; in mpt3sas_base_attach()
8422 ioc->put_smid_fast_path = in mpt3sas_base_attach()
8424 ioc->put_smid_hi_priority = in mpt3sas_base_attach()
8427 ioc->put_smid_default = &_base_put_smid_default; in mpt3sas_base_attach()
8428 ioc->put_smid_fast_path = &_base_put_smid_fast_path; in mpt3sas_base_attach()
8429 ioc->put_smid_hi_priority = &_base_put_smid_hi_priority; in mpt3sas_base_attach()
8430 if (ioc->is_mcpu_endpoint) in mpt3sas_base_attach()
8431 ioc->put_smid_scsi_io = in mpt3sas_base_attach()
8434 ioc->put_smid_scsi_io = &_base_put_smid_scsi_io; in mpt3sas_base_attach()
8442 ioc->build_sg_mpi = &_base_build_sg; in mpt3sas_base_attach()
8443 ioc->build_zero_len_sge_mpi = &_base_build_zero_len_sge; in mpt3sas_base_attach()
8449 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, in mpt3sas_base_attach()
8451 if (!ioc->pfacts) { in mpt3sas_base_attach()
8452 r = -ENOMEM; in mpt3sas_base_attach()
8456 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { in mpt3sas_base_attach()
8470 ioc->thresh_hold = irqpoll_weight; in mpt3sas_base_attach()
8472 ioc->thresh_hold = ioc->hba_queue_depth/4; in mpt3sas_base_attach()
8475 init_waitqueue_head(&ioc->reset_wq); in mpt3sas_base_attach()
8478 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8); in mpt3sas_base_attach()
8479 if (ioc->facts.MaxDevHandle % 8) in mpt3sas_base_attach()
8480 ioc->pd_handles_sz++; in mpt3sas_base_attach()
8481 ioc->pd_handles = kzalloc(ioc->pd_handles_sz, in mpt3sas_base_attach()
8483 if (!ioc->pd_handles) { in mpt3sas_base_attach()
8484 r = -ENOMEM; in mpt3sas_base_attach()
8487 ioc->blocking_handles = kzalloc(ioc->pd_handles_sz, in mpt3sas_base_attach()
8489 if (!ioc->blocking_handles) { in mpt3sas_base_attach()
8490 r = -ENOMEM; in mpt3sas_base_attach()
8495 ioc->pend_os_device_add_sz = (ioc->facts.MaxDevHandle / 8); in mpt3sas_base_attach()
8496 if (ioc->facts.MaxDevHandle % 8) in mpt3sas_base_attach()
8497 ioc->pend_os_device_add_sz++; in mpt3sas_base_attach()
8498 ioc->pend_os_device_add = kzalloc(ioc->pend_os_device_add_sz, in mpt3sas_base_attach()
8500 if (!ioc->pend_os_device_add) { in mpt3sas_base_attach()
8501 r = -ENOMEM; in mpt3sas_base_attach()
8505 ioc->device_remove_in_progress_sz = ioc->pend_os_device_add_sz; in mpt3sas_base_attach()
8506 ioc->device_remove_in_progress = in mpt3sas_base_attach()
8507 kzalloc(ioc->device_remove_in_progress_sz, GFP_KERNEL); in mpt3sas_base_attach()
8508 if (!ioc->device_remove_in_progress) { in mpt3sas_base_attach()
8509 r = -ENOMEM; in mpt3sas_base_attach()
8513 ioc->fwfault_debug = mpt3sas_fwfault_debug; in mpt3sas_base_attach()
8516 mutex_init(&ioc->base_cmds.mutex); in mpt3sas_base_attach()
8517 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8518 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8521 ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8522 ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8525 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8526 ioc->transport_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8527 mutex_init(&ioc->transport_cmds.mutex); in mpt3sas_base_attach()
8530 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8531 ioc->scsih_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8532 mutex_init(&ioc->scsih_cmds.mutex); in mpt3sas_base_attach()
8535 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8536 ioc->tm_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8537 mutex_init(&ioc->tm_cmds.mutex); in mpt3sas_base_attach()
8540 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8541 ioc->config_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8542 mutex_init(&ioc->config_cmds.mutex); in mpt3sas_base_attach()
8545 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8546 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL); in mpt3sas_base_attach()
8547 ioc->ctl_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8548 mutex_init(&ioc->ctl_cmds.mutex); in mpt3sas_base_attach()
8550 if (!ioc->base_cmds.reply || !ioc->port_enable_cmds.reply || in mpt3sas_base_attach()
8551 !ioc->transport_cmds.reply || !ioc->scsih_cmds.reply || in mpt3sas_base_attach()
8552 !ioc->tm_cmds.reply || !ioc->config_cmds.reply || in mpt3sas_base_attach()
8553 !ioc->ctl_cmds.reply || !ioc->ctl_cmds.sense) { in mpt3sas_base_attach()
8554 r = -ENOMEM; in mpt3sas_base_attach()
8559 ioc->event_masks[i] = -1; in mpt3sas_base_attach()
8575 if (ioc->hba_mpi_version_belonged == MPI26_VERSION) { in mpt3sas_base_attach()
8576 if (ioc->is_gen35_ioc) { in mpt3sas_base_attach()
8585 if (r == -EAGAIN) { in mpt3sas_base_attach()
8595 memcpy(&ioc->prev_fw_facts, &ioc->facts, in mpt3sas_base_attach()
8598 ioc->non_operational_loop = 0; in mpt3sas_base_attach()
8599 ioc->ioc_coredump_loop = 0; in mpt3sas_base_attach()
8600 ioc->got_task_abort_from_ioctl = 0; in mpt3sas_base_attach()
8605 ioc->remove_host = 1; in mpt3sas_base_attach()
8609 pci_set_drvdata(ioc->pdev, NULL); in mpt3sas_base_attach()
8610 kfree(ioc->cpu_msix_table); in mpt3sas_base_attach()
8611 if (ioc->is_warpdrive) in mpt3sas_base_attach()
8612 kfree(ioc->reply_post_host_index); in mpt3sas_base_attach()
8613 kfree(ioc->pd_handles); in mpt3sas_base_attach()
8614 kfree(ioc->blocking_handles); in mpt3sas_base_attach()
8615 kfree(ioc->device_remove_in_progress); in mpt3sas_base_attach()
8616 kfree(ioc->pend_os_device_add); in mpt3sas_base_attach()
8617 kfree(ioc->tm_cmds.reply); in mpt3sas_base_attach()
8618 kfree(ioc->transport_cmds.reply); in mpt3sas_base_attach()
8619 kfree(ioc->scsih_cmds.reply); in mpt3sas_base_attach()
8620 kfree(ioc->config_cmds.reply); in mpt3sas_base_attach()
8621 kfree(ioc->base_cmds.reply); in mpt3sas_base_attach()
8622 kfree(ioc->port_enable_cmds.reply); in mpt3sas_base_attach()
8623 kfree(ioc->ctl_cmds.reply); in mpt3sas_base_attach()
8624 kfree(ioc->ctl_cmds.sense); in mpt3sas_base_attach()
8625 kfree(ioc->pfacts); in mpt3sas_base_attach()
8626 ioc->ctl_cmds.reply = NULL; in mpt3sas_base_attach()
8627 ioc->base_cmds.reply = NULL; in mpt3sas_base_attach()
8628 ioc->tm_cmds.reply = NULL; in mpt3sas_base_attach()
8629 ioc->scsih_cmds.reply = NULL; in mpt3sas_base_attach()
8630 ioc->transport_cmds.reply = NULL; in mpt3sas_base_attach()
8631 ioc->config_cmds.reply = NULL; in mpt3sas_base_attach()
8632 ioc->pfacts = NULL; in mpt3sas_base_attach()
8638 * mpt3sas_base_detach - remove controller instance
8650 pci_set_drvdata(ioc->pdev, NULL); in mpt3sas_base_detach()
8651 kfree(ioc->cpu_msix_table); in mpt3sas_base_detach()
8652 if (ioc->is_warpdrive) in mpt3sas_base_detach()
8653 kfree(ioc->reply_post_host_index); in mpt3sas_base_detach()
8654 kfree(ioc->pd_handles); in mpt3sas_base_detach()
8655 kfree(ioc->blocking_handles); in mpt3sas_base_detach()
8656 kfree(ioc->device_remove_in_progress); in mpt3sas_base_detach()
8657 kfree(ioc->pend_os_device_add); in mpt3sas_base_detach()
8658 kfree(ioc->pfacts); in mpt3sas_base_detach()
8659 kfree(ioc->ctl_cmds.reply); in mpt3sas_base_detach()
8660 kfree(ioc->ctl_cmds.sense); in mpt3sas_base_detach()
8661 kfree(ioc->base_cmds.reply); in mpt3sas_base_detach()
8662 kfree(ioc->port_enable_cmds.reply); in mpt3sas_base_detach()
8663 kfree(ioc->tm_cmds.reply); in mpt3sas_base_detach()
8664 kfree(ioc->transport_cmds.reply); in mpt3sas_base_detach()
8665 kfree(ioc->scsih_cmds.reply); in mpt3sas_base_detach()
8666 kfree(ioc->config_cmds.reply); in mpt3sas_base_detach()
8670 * _base_pre_reset_handler - pre reset handler
8681 * _base_clear_outstanding_mpt_commands - clears outstanding mpt commands
8689 if (ioc->transport_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
8690 ioc->transport_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
8691 mpt3sas_base_free_smid(ioc, ioc->transport_cmds.smid); in _base_clear_outstanding_mpt_commands()
8692 complete(&ioc->transport_cmds.done); in _base_clear_outstanding_mpt_commands()
8694 if (ioc->base_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
8695 ioc->base_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
8696 mpt3sas_base_free_smid(ioc, ioc->base_cmds.smid); in _base_clear_outstanding_mpt_commands()
8697 complete(&ioc->base_cmds.done); in _base_clear_outstanding_mpt_commands()
8699 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
8700 ioc->port_enable_failed = 1; in _base_clear_outstanding_mpt_commands()
8701 ioc->port_enable_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
8702 mpt3sas_base_free_smid(ioc, ioc->port_enable_cmds.smid); in _base_clear_outstanding_mpt_commands()
8703 if (ioc->is_driver_loading) { in _base_clear_outstanding_mpt_commands()
8704 ioc->start_scan_failed = in _base_clear_outstanding_mpt_commands()
8706 ioc->start_scan = 0; in _base_clear_outstanding_mpt_commands()
8708 complete(&ioc->port_enable_cmds.done); in _base_clear_outstanding_mpt_commands()
8711 if (ioc->config_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
8712 ioc->config_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
8713 mpt3sas_base_free_smid(ioc, ioc->config_cmds.smid); in _base_clear_outstanding_mpt_commands()
8714 ioc->config_cmds.smid = USHRT_MAX; in _base_clear_outstanding_mpt_commands()
8715 complete(&ioc->config_cmds.done); in _base_clear_outstanding_mpt_commands()
8720 * _base_clear_outstanding_commands - clear all outstanding commands
8731 * _base_reset_done_handler - reset done handler
8742 * mpt3sas_wait_for_commands_to_complete - reset controller
8753 ioc->pending_io_count = 0; in mpt3sas_wait_for_commands_to_complete()
8760 ioc->pending_io_count = scsi_host_busy(ioc->shost); in mpt3sas_wait_for_commands_to_complete()
8762 if (!ioc->pending_io_count) in mpt3sas_wait_for_commands_to_complete()
8766 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ); in mpt3sas_wait_for_commands_to_complete()
8770 * _base_check_ioc_facts_changes - Look for increase/decrease of IOCFacts
8782 struct mpt3sas_facts *old_facts = &ioc->prev_fw_facts; in _base_check_ioc_facts_changes()
8784 if (ioc->facts.MaxDevHandle > old_facts->MaxDevHandle) { in _base_check_ioc_facts_changes()
8785 pd_handles_sz = (ioc->facts.MaxDevHandle / 8); in _base_check_ioc_facts_changes()
8786 if (ioc->facts.MaxDevHandle % 8) in _base_check_ioc_facts_changes()
8789 pd_handles = krealloc(ioc->pd_handles, pd_handles_sz, in _base_check_ioc_facts_changes()
8795 return -ENOMEM; in _base_check_ioc_facts_changes()
8797 memset(pd_handles + ioc->pd_handles_sz, 0, in _base_check_ioc_facts_changes()
8798 (pd_handles_sz - ioc->pd_handles_sz)); in _base_check_ioc_facts_changes()
8799 ioc->pd_handles = pd_handles; in _base_check_ioc_facts_changes()
8801 blocking_handles = krealloc(ioc->blocking_handles, in _base_check_ioc_facts_changes()
8808 return -ENOMEM; in _base_check_ioc_facts_changes()
8810 memset(blocking_handles + ioc->pd_handles_sz, 0, in _base_check_ioc_facts_changes()
8811 (pd_handles_sz - ioc->pd_handles_sz)); in _base_check_ioc_facts_changes()
8812 ioc->blocking_handles = blocking_handles; in _base_check_ioc_facts_changes()
8813 ioc->pd_handles_sz = pd_handles_sz; in _base_check_ioc_facts_changes()
8815 pend_os_device_add = krealloc(ioc->pend_os_device_add, in _base_check_ioc_facts_changes()
8821 return -ENOMEM; in _base_check_ioc_facts_changes()
8823 memset(pend_os_device_add + ioc->pend_os_device_add_sz, 0, in _base_check_ioc_facts_changes()
8824 (pd_handles_sz - ioc->pend_os_device_add_sz)); in _base_check_ioc_facts_changes()
8825 ioc->pend_os_device_add = pend_os_device_add; in _base_check_ioc_facts_changes()
8826 ioc->pend_os_device_add_sz = pd_handles_sz; in _base_check_ioc_facts_changes()
8829 ioc->device_remove_in_progress, pd_handles_sz, GFP_KERNEL); in _base_check_ioc_facts_changes()
8835 return -ENOMEM; in _base_check_ioc_facts_changes()
8838 ioc->device_remove_in_progress_sz, 0, in _base_check_ioc_facts_changes()
8839 (pd_handles_sz - ioc->device_remove_in_progress_sz)); in _base_check_ioc_facts_changes()
8840 ioc->device_remove_in_progress = device_remove_in_progress; in _base_check_ioc_facts_changes()
8841 ioc->device_remove_in_progress_sz = pd_handles_sz; in _base_check_ioc_facts_changes()
8844 memcpy(&ioc->prev_fw_facts, &ioc->facts, sizeof(struct mpt3sas_facts)); in _base_check_ioc_facts_changes()
8849 * mpt3sas_base_hard_reset_handler - reset controller
8853 * Return: 0 for success, non-zero for failure.
8866 if (ioc->pci_error_recovery) { in mpt3sas_base_hard_reset_handler()
8876 mutex_lock(&ioc->reset_in_progress_mutex); in mpt3sas_base_hard_reset_handler()
8878 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
8879 ioc->shost_recovery = 1; in mpt3sas_base_hard_reset_handler()
8880 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
8882 if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] & in mpt3sas_base_hard_reset_handler()
8884 (!(ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] & in mpt3sas_base_hard_reset_handler()
8892 ioc->htb_rel.trigger_info_dwords[1] = in mpt3sas_base_hard_reset_handler()
8908 if (ioc->is_driver_loading && ioc->port_enable_failed) { in mpt3sas_base_hard_reset_handler()
8909 ioc->remove_host = 1; in mpt3sas_base_hard_reset_handler()
8910 r = -EFAULT; in mpt3sas_base_hard_reset_handler()
8924 if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable) in mpt3sas_base_hard_reset_handler()
8927 " firmware version is running\n", ioc->name); in mpt3sas_base_hard_reset_handler()
8936 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
8937 ioc->shost_recovery = 0; in mpt3sas_base_hard_reset_handler()
8938 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
8939 ioc->ioc_reset_count++; in mpt3sas_base_hard_reset_handler()
8940 mutex_unlock(&ioc->reset_in_progress_mutex); in mpt3sas_base_hard_reset_handler()