1 // SPDX-License-Identifier: GPL-2.0
30 #define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */
42 	void *fifo;  member
53 	void *fifo;  in glink_smem_rx_avail()  local
57 	if (!pipe->fifo) {  in glink_smem_rx_avail()
58 		fifo = qcom_smem_get(pipe->remote_pid,  in glink_smem_rx_avail()
60 		if (IS_ERR(fifo)) {  in glink_smem_rx_avail()
61 			pr_err("failed to acquire RX fifo handle: %ld\n",  in glink_smem_rx_avail()
62 			       PTR_ERR(fifo));  in glink_smem_rx_avail()
66 		pipe->fifo = fifo;  in glink_smem_rx_avail()
67 		pipe->native.length = len;  in glink_smem_rx_avail()
70 	head = le32_to_cpu(*pipe->head);  in glink_smem_rx_avail()
71 	tail = le32_to_cpu(*pipe->tail);  in glink_smem_rx_avail()
74 		return pipe->native.length - tail + head;  in glink_smem_rx_avail()
76 		return head - tail;  in glink_smem_rx_avail()
86 	tail = le32_to_cpu(*pipe->tail);  in glink_smem_rx_peak()
88 	if (tail >= pipe->native.length)  in glink_smem_rx_peak()
89 		tail -= pipe->native.length;  in glink_smem_rx_peak()
91 	len = min_t(size_t, count, pipe->native.length - tail);  in glink_smem_rx_peak()
93 		memcpy_fromio(data, pipe->fifo + tail, len);  in glink_smem_rx_peak()
96 		memcpy_fromio(data + len, pipe->fifo, (count - len));  in glink_smem_rx_peak()
105 	tail = le32_to_cpu(*pipe->tail);  in glink_smem_rx_advance()
108 	if (tail >= pipe->native.length)  in glink_smem_rx_advance()
109 		tail -= pipe->native.length;  in glink_smem_rx_advance()
111 	*pipe->tail = cpu_to_le32(tail);  in glink_smem_rx_advance()
121 	head = le32_to_cpu(*pipe->head);  in glink_smem_tx_avail()
122 	tail = le32_to_cpu(*pipe->tail);  in glink_smem_tx_avail()
125 		avail = pipe->native.length - head + tail;  in glink_smem_tx_avail()
127 		avail = tail - head;  in glink_smem_tx_avail()
132 		avail -= FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE;  in glink_smem_tx_avail()
143 	len = min_t(size_t, count, pipe->native.length - head);  in glink_smem_tx_write_one()
145 		memcpy(pipe->fifo + head, data, len);  in glink_smem_tx_write_one()
148 		memcpy(pipe->fifo, data + len, count - len);  in glink_smem_tx_write_one()
151 	if (head >= pipe->native.length)  in glink_smem_tx_write_one()
152 		head -= pipe->native.length;  in glink_smem_tx_write_one()
164 	head = le32_to_cpu(*pipe->head);  in glink_smem_tx_write()
171 	if (head >= pipe->native.length)  in glink_smem_tx_write()
172 		head -= pipe->native.length;  in glink_smem_tx_write()
174 	/* Ensure ordering of fifo and head update */  in glink_smem_tx_write()
177 	*pipe->head = cpu_to_le32(head);  in glink_smem_tx_write()
194 	size_t size;  in qcom_glink_smem_register()  local
199 		return ERR_PTR(-ENOMEM);  in qcom_glink_smem_register()
201 	dev->parent = parent;  in qcom_glink_smem_register()
202 	dev->of_node = node;  in qcom_glink_smem_register()
203 	dev->release = qcom_glink_smem_release;  in qcom_glink_smem_register()
204 	dev_set_name(dev, "%s:%pOFn", dev_name(parent->parent), node);  in qcom_glink_smem_register()
212 	ret = of_property_read_u32(dev->of_node, "qcom,remote-pid",  in qcom_glink_smem_register()
215 		dev_err(dev, "failed to parse qcom,remote-pid\n");  in qcom_glink_smem_register()
222 		ret = -ENOMEM;  in qcom_glink_smem_register()
228 	if (ret && ret != -EEXIST) {  in qcom_glink_smem_register()
234 			      SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, &size);  in qcom_glink_smem_register()
241 	if (size != 32) {  in qcom_glink_smem_register()
242 		dev_err(dev, "glink descriptor of invalid size\n");  in qcom_glink_smem_register()
243 		ret = -EINVAL;  in qcom_glink_smem_register()
247 	tx_pipe->tail = &descs[0];  in qcom_glink_smem_register()
248 	tx_pipe->head = &descs[1];  in qcom_glink_smem_register()
249 	rx_pipe->tail = &descs[2];  in qcom_glink_smem_register()
250 	rx_pipe->head = &descs[3];  in qcom_glink_smem_register()
254 	if (ret && ret != -EEXIST) {  in qcom_glink_smem_register()
255 		dev_err(dev, "failed to allocate TX fifo\n");  in qcom_glink_smem_register()
259 	tx_pipe->fifo = qcom_smem_get(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,  in qcom_glink_smem_register()
260 				      &tx_pipe->native.length);  in qcom_glink_smem_register()
261 	if (IS_ERR(tx_pipe->fifo)) {  in qcom_glink_smem_register()
262 		dev_err(dev, "failed to acquire TX fifo\n");  in qcom_glink_smem_register()
263 		ret = PTR_ERR(tx_pipe->fifo);  in qcom_glink_smem_register()
267 	rx_pipe->native.avail = glink_smem_rx_avail;  in qcom_glink_smem_register()
268 	rx_pipe->native.peak = glink_smem_rx_peak;  in qcom_glink_smem_register()
269 	rx_pipe->native.advance = glink_smem_rx_advance;  in qcom_glink_smem_register()
270 	rx_pipe->remote_pid = remote_pid;  in qcom_glink_smem_register()
272 	tx_pipe->native.avail = glink_smem_tx_avail;  in qcom_glink_smem_register()
273 	tx_pipe->native.write = glink_smem_tx_write;  in qcom_glink_smem_register()
274 	tx_pipe->remote_pid = remote_pid;  in qcom_glink_smem_register()
276 	*rx_pipe->tail = 0;  in qcom_glink_smem_register()
277 	*tx_pipe->head = 0;  in qcom_glink_smem_register()
281 					&rx_pipe->native, &tx_pipe->native,  in qcom_glink_smem_register()