Lines Matching +full:mpfs +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0-only
3 * PolarFire SoC (MPFS) Peripheral Clock Reset Controller
13 #include <linux/reset-controller.h>
14 #include <dt-bindings/clock/microchip,mpfs-clock.h>
15 #include <soc/microchip/mpfs.h>
19 * defines in the dt to make things easier to configure - so this is accounting
31 * Peripheral clock resets
41 reg = mpfs_reset_read(rcdev->dev); in mpfs_assert()
43 mpfs_reset_write(rcdev->dev, reg); in mpfs_assert()
57 reg = mpfs_reset_read(rcdev->dev); in mpfs_deassert()
59 mpfs_reset_write(rcdev->dev, reg); in mpfs_deassert()
68 u32 reg = mpfs_reset_read(rcdev->dev); in mpfs_status()
98 unsigned int index = reset_spec->args[0]; in mpfs_reset_xlate()
101 * CLK_RESERVED does not map to a clock, but it does map to a reset, in mpfs_reset_xlate()
103 * so if this reset gets called - do not reset it. in mpfs_reset_xlate()
106 dev_err(rcdev->dev, "Resetting the fabric is not supported\n"); in mpfs_reset_xlate()
107 return -EINVAL; in mpfs_reset_xlate()
110 if (index < MPFS_PERIPH_OFFSET || index >= (MPFS_PERIPH_OFFSET + rcdev->nr_resets)) { in mpfs_reset_xlate()
111 dev_err(rcdev->dev, "Invalid reset index %u\n", index); in mpfs_reset_xlate()
112 return -EINVAL; in mpfs_reset_xlate()
115 return index - MPFS_PERIPH_OFFSET; in mpfs_reset_xlate()
121 struct device *dev = &adev->dev; in mpfs_reset_probe()
126 return -ENOMEM; in mpfs_reset_probe()
128 rcdev->dev = dev; in mpfs_reset_probe()
129 rcdev->dev->parent = dev->parent; in mpfs_reset_probe()
130 rcdev->ops = &mpfs_reset_ops; in mpfs_reset_probe()
131 rcdev->of_node = dev->parent->of_node; in mpfs_reset_probe()
132 rcdev->of_reset_n_cells = 1; in mpfs_reset_probe()
133 rcdev->of_xlate = mpfs_reset_xlate; in mpfs_reset_probe()
134 rcdev->nr_resets = MPFS_NUM_RESETS; in mpfs_reset_probe()
141 .name = "clk_mpfs.reset-mpfs",