100  * @cores: list of R5 cores within the cluster
106 	struct list_head cores;  member
282 	/* assert local reset on all applicable cores */  in k3_r5_lockstep_reset()
283 	list_for_each_entry(core, &cluster->cores, elem) {  in k3_r5_lockstep_reset()
293 	/* disable PSC modules on all applicable cores */  in k3_r5_lockstep_reset()
294 	list_for_each_entry(core, &cluster->cores, elem) {  in k3_r5_lockstep_reset()
307 	list_for_each_entry_continue_reverse(core, &cluster->cores, elem) {  in k3_r5_lockstep_reset()
312 	core = list_last_entry(&cluster->cores, struct k3_r5_core, elem);  in k3_r5_lockstep_reset()
314 	list_for_each_entry_from_reverse(core, &cluster->cores, elem) {  in k3_r5_lockstep_reset()
327 	/* enable PSC modules on all applicable cores */  in k3_r5_lockstep_release()
328 	list_for_each_entry_reverse(core, &cluster->cores, elem) {  in k3_r5_lockstep_release()
339 	/* deassert local reset on all applicable cores */  in k3_r5_lockstep_release()
340 	list_for_each_entry_reverse(core, &cluster->cores, elem) {  in k3_r5_lockstep_release()
352 	list_for_each_entry_continue(core, &cluster->cores, elem) {  in k3_r5_lockstep_release()
356 	core = list_first_entry(&cluster->cores, struct k3_r5_core, elem);  in k3_r5_lockstep_release()
358 	list_for_each_entry_from(core, &cluster->cores, elem) {  in k3_r5_lockstep_release()
418  * The R5F cores have controls for both a reset and a halt/run. The code
421  * applicable cores to allow loading into the TCMs. The .prepare() ops is
423  * by the .start() ops after loading to actually let the R5 cores run.
426  * execute code, but combines the TCMs from both cores. The resets for both
427  * cores need to be released to make this possible, as the TCMs are in general
454 		dev_err(dev, "unable to enable cores for TCM loading, ret = %d\n",  in k3_r5_rproc_prepare()
487  * resets on all applicable cores for the rproc device (depending on LockStep
489  * cores. The cores themselves are only halted in the .stop() ops, and the
494  * both cores. The access is made possible only with releasing the resets for
495  * both cores, but with only Core0 unhalted. This function re-uses the same
513 		dev_err(dev, "unable to disable cores, ret = %d\n", ret);  in k3_r5_rproc_unprepare()
525  * unhalt both the cores to start the execution - Core1 needs to be unhalted
558 	/* unhalt/run all applicable cores */  in k3_r5_rproc_start()
560 		list_for_each_entry_reverse(core, &cluster->cores, elem) {  in k3_r5_rproc_start()
574 	list_for_each_entry_continue(core, &cluster->cores, elem) {  in k3_r5_rproc_start()
588  * of cores the operations are performed are also in general reverse to that
614 	/* halt all applicable cores */  in k3_r5_rproc_stop()
616 		list_for_each_entry(core, &cluster->cores, elem) {  in k3_r5_rproc_stop()
634 	list_for_each_entry_from_reverse(core, &cluster->cores, elem) {  in k3_r5_rproc_stop()
647  * commands to boot the R5F cores in IPC-only mode. This callback is invoked
668  * and only needs to release the mailbox, the R5F cores are not stopped and
808  * the cores are halted before the .prepare() step.
819  * The function behavior is different based on the cluster mode. The R5F cores
824  * both the cores with the same settings, before reconfiguing again for
839 	core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem);  in k3_r5_rproc_configure()
883 			 * permitted cores  in k3_r5_rproc_configure()
917 		 * cores are programmed symmetrically in LockStep. LockStep  in k3_r5_rproc_configure()
920 		list_for_each_entry(temp, &cluster->cores, elem) {  in k3_r5_rproc_configure()
1010 		 * RAT is programmable only by the R5F cores. Support for RAT  in k3_r5_reserved_mem_init()
1058  * cores are usable in Split-mode, but only the Core0 TCMs can be used in
1080 	core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem);  in k3_r5_adjust_tcm_sizes()
1119 	core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem);  in k3_r5_rproc_configure_mode()
1214 	core1 = list_last_entry(&cluster->cores, struct k3_r5_core, elem);  in k3_r5_cluster_rproc_init()
1215 	list_for_each_entry(core, &cluster->cores, elem) {  in k3_r5_cluster_rproc_init()
1322 		list_first_entry(&cluster->cores, struct k3_r5_core, elem) :  in k3_r5_cluster_rproc_exit()
1323 		list_last_entry(&cluster->cores, struct k3_r5_core, elem);  in k3_r5_cluster_rproc_exit()
1325 	list_for_each_entry_from_reverse(core, &cluster->cores, elem) {  in k3_r5_cluster_rproc_exit()
1393 		 * The R5F cores can place ATCM & BTCM anywhere in its address  in k3_r5_core_of_get_internal_memories()
1636 	list_for_each_entry_safe_reverse(core, temp, &cluster->cores, elem) {  in k3_r5_cluster_of_exit()
1673 		list_add_tail(&core->elem, &cluster->cores);  in k3_r5_cluster_of_init()
1710 	INIT_LIST_HEAD(&cluster->cores);  in k3_r5_probe()
1721 		dev_err(dev, "MCU cluster requires both R5F cores to be enabled, num_cores = %d\n",  in k3_r5_probe()