Lines Matching +full:0 +full:x41010000
29 /* This address can either be for ATCM or BTCM with the other at address 0x0 */
30 #define K3_R5_TCM_DEV_ADDR 0x41010000
33 #define PROC_BOOT_CFG_FLAG_R5_DBG_EN 0x00000001
34 #define PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN 0x00000002
35 #define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP 0x00000100
36 #define PROC_BOOT_CFG_FLAG_R5_TEINIT 0x00000200
37 #define PROC_BOOT_CFG_FLAG_R5_NMFI_EN 0x00000400
38 #define PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE 0x00000800
39 #define PROC_BOOT_CFG_FLAG_R5_BTCM_EN 0x00001000
40 #define PROC_BOOT_CFG_FLAG_R5_ATCM_EN 0x00002000
42 #define PROC_BOOT_CFG_FLAG_R5_MEM_INIT_DIS 0x00004000
44 #define PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE 0x00008000
47 #define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT 0x00000001
50 #define PROC_BOOT_STATUS_FLAG_R5_WFE 0x00000001
51 #define PROC_BOOT_STATUS_FLAG_R5_WFI 0x00000002
52 #define PROC_BOOT_STATUS_FLAG_R5_CLK_GATED 0x00000004
53 #define PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED 0x00000100
55 #define PROC_BOOT_STATUS_FLAG_R5_SINGLECORE_ONLY 0x00000200
79 CLUSTER_MODE_SPLIT = 0,
125 * @loczrama: flag to dictate which TCM is at device address 0x0
188 dev_dbg(dev, "mbox msg: 0x%x\n", msg); in k3_r5_rproc_mbox_callback()
206 dev_dbg(dev, "dropping unknown message 0x%x", msg); in k3_r5_rproc_mbox_callback()
225 if (ret < 0) in k3_r5_rproc_kick()
304 return 0; in k3_r5_lockstep_reset()
349 return 0; in k3_r5_lockstep_release()
370 PROC_BOOT_CTRL_FLAG_R5_CORE_HALT, 0); in k3_r5_core_halt()
376 0, PROC_BOOT_CTRL_FLAG_R5_CORE_HALT); in k3_r5_core_run()
392 kproc->mbox = mbox_request_channel(client, 0); in k3_r5_rproc_request_mbox()
408 if (ret < 0) { in k3_r5_rproc_request_mbox()
414 return 0; in k3_r5_rproc_request_mbox()
439 u32 ctrl = 0, cfg = 0, stat = 0; in k3_r5_rproc_prepare()
440 u64 boot_vec = 0; in k3_r5_rproc_prepare()
445 if (ret < 0) in k3_r5_rproc_prepare()
467 return 0; in k3_r5_rproc_prepare()
476 memset(core->mem[0].cpu_addr, 0x00, core->mem[0].size); in k3_r5_rproc_prepare()
479 memset(core->mem[1].cpu_addr, 0x00, core->mem[1].size); in k3_r5_rproc_prepare()
481 return 0; in k3_r5_rproc_prepare()
550 dev_dbg(dev, "booting R5F core using boot addr = 0x%x\n", boot_addr); in k3_r5_rproc_start()
554 ret = ti_sci_proc_set_config(core->tsp, boot_addr, 0, 0); in k3_r5_rproc_start()
571 return 0; in k3_r5_rproc_start()
631 return 0; in k3_r5_rproc_stop()
661 return 0; in k3_r5_rproc_attach()
679 return 0; in k3_r5_rproc_detach()
698 if (!kproc->rmem[0].cpu_addr) { in k3_r5_get_loaded_rsc_table()
711 return (struct resource_table *)kproc->rmem[0].cpu_addr; in k3_r5_get_loaded_rsc_table()
732 if (len == 0) in k3_r5_rproc_da_to_va()
736 for (i = 0; i < core->num_mems; i++) { in k3_r5_rproc_da_to_va()
757 for (i = 0; i < core->num_sram; i++) { in k3_r5_rproc_da_to_va()
769 for (i = 0; i < kproc->num_rmems; i++) { in k3_r5_rproc_da_to_va()
801 * address 0x0. These settings need to be configured before the resets for the
832 u32 ctrl = 0, cfg = 0, stat = 0; in k3_r5_rproc_configure()
833 u32 set_cfg = 0, clr_cfg = 0; in k3_r5_rproc_configure()
834 u64 boot_vec = 0; in k3_r5_rproc_configure()
849 if (ret < 0) in k3_r5_rproc_configure()
852 dev_dbg(dev, "boot_vector = 0x%llx, cfg = 0x%x ctrl = 0x%x stat = 0x%x\n", in k3_r5_rproc_configure()
874 /* always enable ARM mode and set boot vector to 0 */ in k3_r5_rproc_configure()
875 boot_vec = 0x0; in k3_r5_rproc_configure()
936 clr_cfg = 0; in k3_r5_rproc_configure()
963 if (num_rmems <= 0) { in k3_r5_reserved_mem_init()
974 /* use reserved memory region 0 for vring DMA allocations */ in k3_r5_reserved_mem_init()
975 ret = of_reserved_mem_device_init_by_idx(dev, np, 0); in k3_r5_reserved_mem_init()
990 for (i = 0; i < num_rmems; i++) { in k3_r5_reserved_mem_init()
1026 dev_dbg(dev, "reserved memory%d: bus addr %pa size 0x%zx va %pK da 0x%x\n", in k3_r5_reserved_mem_init()
1033 return 0; in k3_r5_reserved_mem_init()
1036 for (i--; i >= 0; i--) in k3_r5_reserved_mem_init()
1048 for (i = 0; i < kproc->num_rmems; i++) in k3_r5_reserved_mem_exit()
1082 WARN_ON(core->mem[0].size != SZ_64K); in k3_r5_adjust_tcm_sizes()
1085 core->mem[0].size /= 2; in k3_r5_adjust_tcm_sizes()
1088 dev_dbg(cdev, "adjusted TCM sizes, ATCM = 0x%zx BTCM = 0x%zx\n", in k3_r5_adjust_tcm_sizes()
1089 core->mem[0].size, core->mem[1].size); in k3_r5_adjust_tcm_sizes()
1112 u32 ctrl = 0, cfg = 0, stat = 0, halted = 0; in k3_r5_rproc_configure_mode()
1113 u64 boot_vec = 0; in k3_r5_rproc_configure_mode()
1134 if (ret < 0) { in k3_r5_rproc_configure_mode()
1142 if (ret < 0) { in k3_r5_rproc_configure_mode()
1147 atcm_enable = cfg & PROC_BOOT_CFG_FLAG_R5_ATCM_EN ? 1 : 0; in k3_r5_rproc_configure_mode()
1148 btcm_enable = cfg & PROC_BOOT_CFG_FLAG_R5_BTCM_EN ? 1 : 0; in k3_r5_rproc_configure_mode()
1149 loczrama = cfg & PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE ? 1 : 0; in k3_r5_rproc_configure_mode()
1180 ret = 0; in k3_r5_rproc_configure_mode()
1190 if (ret > 0) { in k3_r5_rproc_configure_mode()
1196 core->mem[0].dev_addr = loczrama ? 0 : K3_R5_TCM_DEV_ADDR; in k3_r5_rproc_configure_mode()
1197 core->mem[1].dev_addr = loczrama ? K3_R5_TCM_DEV_ADDR : 0; in k3_r5_rproc_configure_mode()
1217 ret = rproc_of_parse_firmware(cdev, 0, &fw_name); in k3_r5_cluster_rproc_init()
1244 if (ret < 0) in k3_r5_cluster_rproc_init()
1278 return 0; in k3_r5_cluster_rproc_init()
1360 for (i = 0; i < num_mems; i++) { in k3_r5_core_of_get_internal_memories()
1396 * addresses 0 and 0x41010000 (same as the bus address on AM65x in k3_r5_core_of_get_internal_memories()
1401 0 : K3_R5_TCM_DEV_ADDR; in k3_r5_core_of_get_internal_memories()
1404 K3_R5_TCM_DEV_ADDR : 0; in k3_r5_core_of_get_internal_memories()
1408 dev_dbg(dev, "memory %5s: bus addr %pa size 0x%zx va %pK da 0x%x\n", in k3_r5_core_of_get_internal_memories()
1415 return 0; in k3_r5_core_of_get_internal_memories()
1429 if (num_sram <= 0) { in k3_r5_core_of_get_sram_memories()
1432 return 0; in k3_r5_core_of_get_sram_memories()
1439 for (i = 0; i < num_sram; i++) { in k3_r5_core_of_get_sram_memories()
1449 ret = of_address_to_resource(sram_np, 0, &res); in k3_r5_core_of_get_sram_memories()
1465 dev_dbg(dev, "memory sram%d: bus addr %pa size 0x%zx va %pK da 0x%x\n", in k3_r5_core_of_get_sram_memories()
1472 return 0; in k3_r5_core_of_get_sram_memories()
1485 if (ret < 0) in k3_r5_core_of_get_tsp()
1495 tsp->proc_id = temp[0]; in k3_r5_core_of_get_tsp()
1522 core->atcm_enable = 0; in k3_r5_core_of_init()
1527 if (ret < 0 && ret != -EINVAL) { in k3_r5_core_of_init()
1534 if (ret < 0 && ret != -EINVAL) { in k3_r5_core_of_init()
1541 if (ret < 0 && ret != -EINVAL) { in k3_r5_core_of_init()
1597 if (ret < 0) { in k3_r5_core_of_init()
1605 return 0; in k3_r5_core_of_init()
1676 return 0; in k3_r5_cluster_of_init()
1713 if (ret < 0 && ret != -EINVAL) { in k3_r5_probe()
1756 return 0; in k3_r5_probe()