Lines Matching +full:cx +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm self-authenticating modem subsystem remoteproc driver
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
13 #include <linux/dma-map-ops.h>
14 #include <linux/dma-mapping.h>
136 const char *supply; member
255 for (i = 0; reg_res[i].supply; i++) { in q6v5_regulator_init()
256 regs[i].reg = devm_regulator_get(dev, reg_res[i].supply); in q6v5_regulator_init()
259 if (rc != -EPROBE_DEFER) in q6v5_regulator_init()
261 reg_res[i].supply); in q6v5_regulator_init()
283 dev_err(qproc->dev, in q6v5_regulator_enable()
294 dev_err(qproc->dev, in q6v5_regulator_enable()
302 dev_err(qproc->dev, "Regulator enable failed\n"); in q6v5_regulator_enable()
309 for (; i >= 0; i--) { in q6v5_regulator_enable()
354 for (i--; i >= 0; i--) in q6v5_clk_enable()
388 for (i--; i >= 0; i--) { in q6v5_pds_enable()
414 if (!qproc->need_mem_protection) in q6v5_xfer_mem_ownership()
441 if (request_firmware_direct(&dp_fw, "msadp", qproc->dev)) in q6v5_debug_policy_load()
444 if (SZ_1M + dp_fw->size <= qproc->mba_size) { in q6v5_debug_policy_load()
445 memcpy(mba_region + SZ_1M, dp_fw->data, dp_fw->size); in q6v5_debug_policy_load()
446 qproc->dp_size = dp_fw->size; in q6v5_debug_policy_load()
454 struct q6v5 *qproc = rproc->priv; in q6v5_load()
458 if (fw->size > qproc->mba_size || fw->size > SZ_1M) { in q6v5_load()
459 dev_err(qproc->dev, "MBA firmware load failed\n"); in q6v5_load()
460 return -EINVAL; in q6v5_load()
463 mba_region = memremap(qproc->mba_phys, qproc->mba_size, MEMREMAP_WC); in q6v5_load()
465 dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", in q6v5_load()
466 &qproc->mba_phys, qproc->mba_size); in q6v5_load()
467 return -EBUSY; in q6v5_load()
470 memcpy(mba_region, fw->data, fw->size); in q6v5_load()
481 if (qproc->has_alt_reset) { in q6v5_reset_assert()
482 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
483 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_assert()
484 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
485 } else if (qproc->has_spare_reg) { in q6v5_reset_assert()
495 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
496 regmap_update_bits(qproc->conn_map, qproc->conn_box, in q6v5_reset_assert()
498 reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
499 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
500 regmap_update_bits(qproc->conn_map, qproc->conn_box, in q6v5_reset_assert()
502 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_assert()
503 } else if (qproc->has_ext_cntl_regs) { in q6v5_reset_assert()
504 regmap_write(qproc->conn_map, qproc->rscc_disable, 0); in q6v5_reset_assert()
505 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
506 reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
507 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
508 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_assert()
510 ret = reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
520 if (qproc->has_alt_reset) { in q6v5_reset_deassert()
521 reset_control_assert(qproc->pdc_reset); in q6v5_reset_deassert()
522 writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET); in q6v5_reset_deassert()
523 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_deassert()
524 writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET); in q6v5_reset_deassert()
525 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_deassert()
526 } else if (qproc->has_spare_reg || qproc->has_ext_cntl_regs) { in q6v5_reset_deassert()
527 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_deassert()
529 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_deassert()
542 val = readl(qproc->rmb_base + RMB_PBL_STATUS_REG); in q6v5_rmb_pbl_wait()
547 return -ETIMEDOUT; in q6v5_rmb_pbl_wait()
563 val = readl(qproc->rmb_base + RMB_MBA_STATUS_REG); in q6v5_rmb_mba_wait()
573 return -ETIMEDOUT; in q6v5_rmb_mba_wait()
583 struct rproc *rproc = qproc->rproc; in q6v5_dump_mba_logs()
587 if (!qproc->has_mba_logs) in q6v5_dump_mba_logs()
590 if (q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, qproc->mba_phys, in q6v5_dump_mba_logs()
591 qproc->mba_size)) in q6v5_dump_mba_logs()
594 mba_region = memremap(qproc->mba_phys, qproc->mba_size, MEMREMAP_WC); in q6v5_dump_mba_logs()
601 dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL); in q6v5_dump_mba_logs()
612 if (qproc->version == MSS_SDM845) { in q6v5proc_reset()
613 val = readl(qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
615 writel(val, qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
617 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, in q6v5proc_reset()
621 dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); in q6v5proc_reset()
622 return -ETIMEDOUT; in q6v5proc_reset()
625 /* De-assert QDSP6 stop core */ in q6v5proc_reset()
626 writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); in q6v5proc_reset()
628 writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); in q6v5proc_reset()
630 ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, in q6v5proc_reset()
633 dev_err(qproc->dev, "Boot FSM failed to complete.\n"); in q6v5proc_reset()
640 } else if (qproc->version == MSS_SC7180 || qproc->version == MSS_SC7280) { in q6v5proc_reset()
641 val = readl(qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
643 writel(val, qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
645 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, in q6v5proc_reset()
649 dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); in q6v5proc_reset()
650 return -ETIMEDOUT; in q6v5proc_reset()
654 val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
656 writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
658 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR, in q6v5proc_reset()
662 dev_err(qproc->dev, "QDSP6SS XO clock timed out\n"); in q6v5proc_reset()
663 return -ETIMEDOUT; in q6v5proc_reset()
666 /* Configure Q6 core CBCR to auto-enable after reset sequence */ in q6v5proc_reset()
667 val = readl(qproc->reg_base + QDSP6SS_CORE_CBCR); in q6v5proc_reset()
669 writel(val, qproc->reg_base + QDSP6SS_CORE_CBCR); in q6v5proc_reset()
671 /* De-assert the Q6 stop core signal */ in q6v5proc_reset()
672 writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); in q6v5proc_reset()
677 /* Trigger the boot FSM to start the Q6 out-of-reset sequence */ in q6v5proc_reset()
678 writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); in q6v5proc_reset()
681 ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, in q6v5proc_reset()
684 dev_err(qproc->dev, "Boot FSM failed to complete.\n"); in q6v5proc_reset()
690 } else if (qproc->version == MSS_MSM8996 || in q6v5proc_reset()
691 qproc->version == MSS_MSM8998) { in q6v5proc_reset()
696 qproc->reg_base + QDSP6SS_STRAP_ACC); in q6v5proc_reset()
699 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
701 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
704 val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
706 writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
709 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR, in q6v5proc_reset()
713 dev_err(qproc->dev, in q6v5proc_reset()
718 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
720 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
721 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
726 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
729 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
731 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
735 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
738 if (qproc->version == MSS_MSM8996) { in q6v5proc_reset()
746 val = readl(qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
747 for (; i >= 0; i--) { in q6v5proc_reset()
749 writel(val, qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
755 val |= readl(qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
759 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
761 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
764 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
766 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
769 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
771 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
772 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
778 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
781 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
783 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
785 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
787 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
791 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
794 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
796 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
799 val = readl(qproc->reg_base + QDSP6SS_GFMUX_CTL_REG); in q6v5proc_reset()
801 writel(val, qproc->reg_base + QDSP6SS_GFMUX_CTL_REG); in q6v5proc_reset()
804 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
806 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
811 if (ret == -ETIMEDOUT) { in q6v5proc_reset()
812 dev_err(qproc->dev, "PBL boot timed out\n"); in q6v5proc_reset()
814 dev_err(qproc->dev, "PBL returned unexpected status %d\n", ret); in q6v5proc_reset()
815 ret = -EINVAL; in q6v5proc_reset()
828 if (!qproc->has_qaccept_regs) in q6v5proc_enable_qchannel()
831 if (qproc->has_ext_cntl_regs) { in q6v5proc_enable_qchannel()
832 regmap_write(qproc->conn_map, qproc->rscc_disable, 0); in q6v5proc_enable_qchannel()
833 regmap_write(qproc->conn_map, qproc->force_clk_on, 1); in q6v5proc_enable_qchannel()
835 ret = regmap_read_poll_timeout(qproc->halt_map, qproc->axim1_clk_off, val, in q6v5proc_enable_qchannel()
838 dev_err(qproc->dev, "failed to enable axim1 clock\n"); in q6v5proc_enable_qchannel()
839 return -ETIMEDOUT; in q6v5proc_enable_qchannel()
849 dev_err(qproc->dev, "qchannel enable failed\n"); in q6v5proc_enable_qchannel()
850 return -ETIMEDOUT; in q6v5proc_enable_qchannel()
863 if (!qproc->has_qaccept_regs) in q6v5proc_disable_qchannel()
867 nretry--; in q6v5proc_disable_qchannel()
873 /* Request Q-channel transaction takedown */ in q6v5proc_disable_qchannel()
877 * If the request is denied, reset the Q-channel takedown request, in q6v5proc_disable_qchannel()
883 retry--; in q6v5proc_disable_qchannel()
903 dev_err(qproc->dev, "qchannel takedown failed\n"); in q6v5proc_disable_qchannel()
927 dev_err(qproc->dev, "port failed halt\n"); in q6v5proc_halt_axi_port()
950 metadata = qcom_mdt_read_metadata(fw, &size, fw_name, qproc->dev); in q6v5_mpss_init_image()
954 page = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs); in q6v5_mpss_init_image()
957 dev_err(qproc->dev, "failed to allocate mdt buffer\n"); in q6v5_mpss_init_image()
958 return -ENOMEM; in q6v5_mpss_init_image()
964 ret = -ENOMEM; in q6v5_mpss_init_image()
974 dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", &phys, size); in q6v5_mpss_init_image()
975 ret = -EBUSY; in q6v5_mpss_init_image()
988 dev_err(qproc->dev, in q6v5_mpss_init_image()
990 ret = -EAGAIN; in q6v5_mpss_init_image()
994 writel(phys, qproc->rmb_base + RMB_PMI_META_DATA_REG); in q6v5_mpss_init_image()
995 writel(RMB_CMD_META_DATA_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG); in q6v5_mpss_init_image()
998 if (ret == -ETIMEDOUT) in q6v5_mpss_init_image()
999 dev_err(qproc->dev, "MPSS header authentication timed out\n"); in q6v5_mpss_init_image()
1001 dev_err(qproc->dev, "MPSS header authentication failed: %d\n", ret); in q6v5_mpss_init_image()
1007 dev_warn(qproc->dev, in q6v5_mpss_init_image()
1011 dma_free_attrs(qproc->dev, size, page, phys, dma_attrs); in q6v5_mpss_init_image()
1019 if (phdr->p_type != PT_LOAD) in q6v5_phdr_valid()
1022 if ((phdr->p_flags & QCOM_MDT_TYPE_MASK) == QCOM_MDT_TYPE_HASH) in q6v5_phdr_valid()
1025 if (!phdr->p_memsz) in q6v5_phdr_valid()
1037 ret = qcom_q6v5_prepare(&qproc->q6v5); in q6v5_mba_load()
1041 ret = q6v5_pds_enable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_mba_load()
1043 dev_err(qproc->dev, "failed to enable proxy power domains\n"); in q6v5_mba_load()
1047 ret = q6v5_regulator_enable(qproc, qproc->fallback_proxy_regs, in q6v5_mba_load()
1048 qproc->fallback_proxy_reg_count); in q6v5_mba_load()
1050 dev_err(qproc->dev, "failed to enable fallback proxy supplies\n"); in q6v5_mba_load()
1054 ret = q6v5_regulator_enable(qproc, qproc->proxy_regs, in q6v5_mba_load()
1055 qproc->proxy_reg_count); in q6v5_mba_load()
1057 dev_err(qproc->dev, "failed to enable proxy supplies\n"); in q6v5_mba_load()
1061 ret = q6v5_clk_enable(qproc->dev, qproc->proxy_clks, in q6v5_mba_load()
1062 qproc->proxy_clk_count); in q6v5_mba_load()
1064 dev_err(qproc->dev, "failed to enable proxy clocks\n"); in q6v5_mba_load()
1068 ret = q6v5_regulator_enable(qproc, qproc->active_regs, in q6v5_mba_load()
1069 qproc->active_reg_count); in q6v5_mba_load()
1071 dev_err(qproc->dev, "failed to enable supplies\n"); in q6v5_mba_load()
1075 ret = q6v5_clk_enable(qproc->dev, qproc->reset_clks, in q6v5_mba_load()
1076 qproc->reset_clk_count); in q6v5_mba_load()
1078 dev_err(qproc->dev, "failed to enable reset clocks\n"); in q6v5_mba_load()
1084 dev_err(qproc->dev, "failed to deassert mss restart\n"); in q6v5_mba_load()
1088 ret = q6v5_clk_enable(qproc->dev, qproc->active_clks, in q6v5_mba_load()
1089 qproc->active_clk_count); in q6v5_mba_load()
1091 dev_err(qproc->dev, "failed to enable clocks\n"); in q6v5_mba_load()
1095 ret = q6v5proc_enable_qchannel(qproc, qproc->halt_map, qproc->qaccept_axi); in q6v5_mba_load()
1097 dev_err(qproc->dev, "failed to enable axi bridge\n"); in q6v5_mba_load()
1105 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true, in q6v5_mba_load()
1106 qproc->mpss_phys, qproc->mpss_size); in q6v5_mba_load()
1108 dev_err(qproc->dev, "assigning Q6 access to mpss memory failed: %d\n", ret); in q6v5_mba_load()
1113 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, false, true, in q6v5_mba_load()
1114 qproc->mba_phys, qproc->mba_size); in q6v5_mba_load()
1116 dev_err(qproc->dev, in q6v5_mba_load()
1121 writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG); in q6v5_mba_load()
1122 if (qproc->dp_size) { in q6v5_mba_load()
1123 writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + RMB_PMI_CODE_START_REG); in q6v5_mba_load()
1124 writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mba_load()
1131 if (qproc->has_mba_logs) in q6v5_mba_load()
1132 qcom_pil_info_store("mba", qproc->mba_phys, MBA_LOG_SIZE); in q6v5_mba_load()
1135 if (ret == -ETIMEDOUT) { in q6v5_mba_load()
1136 dev_err(qproc->dev, "MBA boot timed out\n"); in q6v5_mba_load()
1140 dev_err(qproc->dev, "MBA returned unexpected status %d\n", ret); in q6v5_mba_load()
1141 ret = -EINVAL; in q6v5_mba_load()
1145 qproc->dump_mba_loaded = true; in q6v5_mba_load()
1149 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6); in q6v5_mba_load()
1150 if (qproc->has_vq6) in q6v5_mba_load()
1151 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_vq6); in q6v5_mba_load()
1152 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem); in q6v5_mba_load()
1153 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc); in q6v5_mba_load()
1154 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_mdm); in q6v5_mba_load()
1155 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_cx); in q6v5_mba_load()
1156 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_axi); in q6v5_mba_load()
1159 xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, in q6v5_mba_load()
1160 false, qproc->mba_phys, in q6v5_mba_load()
1161 qproc->mba_size); in q6v5_mba_load()
1163 dev_err(qproc->dev, in q6v5_mba_load()
1170 q6v5_clk_disable(qproc->dev, qproc->active_clks, in q6v5_mba_load()
1171 qproc->active_clk_count); in q6v5_mba_load()
1175 q6v5_clk_disable(qproc->dev, qproc->reset_clks, in q6v5_mba_load()
1176 qproc->reset_clk_count); in q6v5_mba_load()
1178 q6v5_regulator_disable(qproc, qproc->active_regs, in q6v5_mba_load()
1179 qproc->active_reg_count); in q6v5_mba_load()
1181 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in q6v5_mba_load()
1182 qproc->proxy_clk_count); in q6v5_mba_load()
1184 q6v5_regulator_disable(qproc, qproc->proxy_regs, in q6v5_mba_load()
1185 qproc->proxy_reg_count); in q6v5_mba_load()
1187 q6v5_regulator_disable(qproc, qproc->fallback_proxy_regs, in q6v5_mba_load()
1188 qproc->fallback_proxy_reg_count); in q6v5_mba_load()
1190 q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_mba_load()
1192 qcom_q6v5_unprepare(&qproc->q6v5); in q6v5_mba_load()
1202 qproc->dump_mba_loaded = false; in q6v5_mba_reclaim()
1203 qproc->dp_size = 0; in q6v5_mba_reclaim()
1205 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6); in q6v5_mba_reclaim()
1206 if (qproc->has_vq6) in q6v5_mba_reclaim()
1207 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_vq6); in q6v5_mba_reclaim()
1208 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem); in q6v5_mba_reclaim()
1209 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc); in q6v5_mba_reclaim()
1210 if (qproc->version == MSS_MSM8996) { in q6v5_mba_reclaim()
1214 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5_mba_reclaim()
1217 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5_mba_reclaim()
1220 if (qproc->has_ext_cntl_regs) { in q6v5_mba_reclaim()
1221 regmap_write(qproc->conn_map, qproc->rscc_disable, 1); in q6v5_mba_reclaim()
1223 ret = regmap_read_poll_timeout(qproc->halt_map, qproc->axim1_clk_off, val, in q6v5_mba_reclaim()
1226 dev_err(qproc->dev, "failed to enable axim1 clock\n"); in q6v5_mba_reclaim()
1228 ret = regmap_read_poll_timeout(qproc->halt_map, qproc->crypto_clk_off, val, in q6v5_mba_reclaim()
1231 dev_err(qproc->dev, "failed to enable crypto clock\n"); in q6v5_mba_reclaim()
1234 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_mdm); in q6v5_mba_reclaim()
1235 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_cx); in q6v5_mba_reclaim()
1236 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_axi); in q6v5_mba_reclaim()
1240 q6v5_clk_disable(qproc->dev, qproc->reset_clks, in q6v5_mba_reclaim()
1241 qproc->reset_clk_count); in q6v5_mba_reclaim()
1242 q6v5_clk_disable(qproc->dev, qproc->active_clks, in q6v5_mba_reclaim()
1243 qproc->active_clk_count); in q6v5_mba_reclaim()
1244 q6v5_regulator_disable(qproc, qproc->active_regs, in q6v5_mba_reclaim()
1245 qproc->active_reg_count); in q6v5_mba_reclaim()
1250 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, in q6v5_mba_reclaim()
1251 qproc->mba_phys, in q6v5_mba_reclaim()
1252 qproc->mba_size); in q6v5_mba_reclaim()
1255 ret = qcom_q6v5_unprepare(&qproc->q6v5); in q6v5_mba_reclaim()
1257 q6v5_pds_disable(qproc, qproc->proxy_pds, in q6v5_mba_reclaim()
1258 qproc->proxy_pd_count); in q6v5_mba_reclaim()
1259 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in q6v5_mba_reclaim()
1260 qproc->proxy_clk_count); in q6v5_mba_reclaim()
1261 q6v5_regulator_disable(qproc, qproc->fallback_proxy_regs, in q6v5_mba_reclaim()
1262 qproc->fallback_proxy_reg_count); in q6v5_mba_reclaim()
1263 q6v5_regulator_disable(qproc, qproc->proxy_regs, in q6v5_mba_reclaim()
1264 qproc->proxy_reg_count); in q6v5_mba_reclaim()
1270 struct q6v5 *qproc = rproc->priv; in q6v5_reload_mba()
1274 ret = request_firmware(&fw, rproc->firmware, qproc->dev); in q6v5_reload_mba()
1306 fw_name_len = strlen(qproc->hexagon_mdt_image); in q6v5_mpss_load()
1308 return -EINVAL; in q6v5_mpss_load()
1310 fw_name = kstrdup(qproc->hexagon_mdt_image, GFP_KERNEL); in q6v5_mpss_load()
1312 return -ENOMEM; in q6v5_mpss_load()
1314 ret = request_firmware(&fw, fw_name, qproc->dev); in q6v5_mpss_load()
1316 dev_err(qproc->dev, "unable to load %s\n", fw_name); in q6v5_mpss_load()
1321 writel(0, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1323 ret = q6v5_mpss_init_image(qproc, fw, qproc->hexagon_mdt_image); in q6v5_mpss_load()
1327 ehdr = (struct elf32_hdr *)fw->data; in q6v5_mpss_load()
1330 for (i = 0; i < ehdr->e_phnum; i++) { in q6v5_mpss_load()
1336 if (phdr->p_flags & QCOM_MDT_RELOCATABLE) in q6v5_mpss_load()
1339 if (phdr->p_paddr < min_addr) in q6v5_mpss_load()
1340 min_addr = phdr->p_paddr; in q6v5_mpss_load()
1342 if (phdr->p_paddr + phdr->p_memsz > max_addr) in q6v5_mpss_load()
1343 max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K); in q6v5_mpss_load()
1350 q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, false, in q6v5_mpss_load()
1351 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1354 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, true, in q6v5_mpss_load()
1355 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1357 dev_err(qproc->dev, in q6v5_mpss_load()
1359 ret = -EAGAIN; in q6v5_mpss_load()
1363 mpss_reloc = relocate ? min_addr : qproc->mpss_phys; in q6v5_mpss_load()
1364 qproc->mpss_reloc = mpss_reloc; in q6v5_mpss_load()
1366 for (i = 0; i < ehdr->e_phnum; i++) { in q6v5_mpss_load()
1372 offset = phdr->p_paddr - mpss_reloc; in q6v5_mpss_load()
1373 if (offset < 0 || offset + phdr->p_memsz > qproc->mpss_size) { in q6v5_mpss_load()
1374 dev_err(qproc->dev, "segment outside memory range\n"); in q6v5_mpss_load()
1375 ret = -EINVAL; in q6v5_mpss_load()
1379 if (phdr->p_filesz > phdr->p_memsz) { in q6v5_mpss_load()
1380 dev_err(qproc->dev, in q6v5_mpss_load()
1383 ret = -EINVAL; in q6v5_mpss_load()
1387 ptr = memremap(qproc->mpss_phys + offset, phdr->p_memsz, MEMREMAP_WC); in q6v5_mpss_load()
1389 dev_err(qproc->dev, in q6v5_mpss_load()
1390 "unable to map memory region: %pa+%zx-%x\n", in q6v5_mpss_load()
1391 &qproc->mpss_phys, offset, phdr->p_memsz); in q6v5_mpss_load()
1395 if (phdr->p_filesz && phdr->p_offset < fw->size) { in q6v5_mpss_load()
1396 /* Firmware is large enough to be non-split */ in q6v5_mpss_load()
1397 if (phdr->p_offset + phdr->p_filesz > fw->size) { in q6v5_mpss_load()
1398 dev_err(qproc->dev, in q6v5_mpss_load()
1401 ret = -EINVAL; in q6v5_mpss_load()
1406 memcpy(ptr, fw->data + phdr->p_offset, phdr->p_filesz); in q6v5_mpss_load()
1407 } else if (phdr->p_filesz) { in q6v5_mpss_load()
1409 sprintf(fw_name + fw_name_len - 3, "b%02d", i); in q6v5_mpss_load()
1410 ret = request_firmware_into_buf(&seg_fw, fw_name, qproc->dev, in q6v5_mpss_load()
1411 ptr, phdr->p_filesz); in q6v5_mpss_load()
1413 dev_err(qproc->dev, "failed to load %s\n", fw_name); in q6v5_mpss_load()
1418 if (seg_fw->size != phdr->p_filesz) { in q6v5_mpss_load()
1419 dev_err(qproc->dev, in q6v5_mpss_load()
1422 ret = -EINVAL; in q6v5_mpss_load()
1431 if (phdr->p_memsz > phdr->p_filesz) { in q6v5_mpss_load()
1432 memset(ptr + phdr->p_filesz, 0, in q6v5_mpss_load()
1433 phdr->p_memsz - phdr->p_filesz); in q6v5_mpss_load()
1436 size += phdr->p_memsz; in q6v5_mpss_load()
1438 code_length = readl(qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1440 boot_addr = relocate ? qproc->mpss_phys : min_addr; in q6v5_mpss_load()
1441 writel(boot_addr, qproc->rmb_base + RMB_PMI_CODE_START_REG); in q6v5_mpss_load()
1442 writel(RMB_CMD_LOAD_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG); in q6v5_mpss_load()
1444 writel(size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1446 ret = readl(qproc->rmb_base + RMB_MBA_STATUS_REG); in q6v5_mpss_load()
1448 dev_err(qproc->dev, "MPSS authentication failed: %d\n", in q6v5_mpss_load()
1455 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true, in q6v5_mpss_load()
1456 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1458 dev_err(qproc->dev, in q6v5_mpss_load()
1460 ret = -EAGAIN; in q6v5_mpss_load()
1465 if (ret == -ETIMEDOUT) in q6v5_mpss_load()
1466 dev_err(qproc->dev, "MPSS authentication timed out\n"); in q6v5_mpss_load()
1468 dev_err(qproc->dev, "MPSS authentication failed: %d\n", ret); in q6v5_mpss_load()
1470 qcom_pil_info_store("modem", qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1485 struct q6v5 *qproc = rproc->priv; in qcom_q6v5_dump_segment()
1486 int offset = segment->da - qproc->mpss_reloc; in qcom_q6v5_dump_segment()
1490 if (!qproc->dump_mba_loaded) { in qcom_q6v5_dump_segment()
1494 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, in qcom_q6v5_dump_segment()
1496 qproc->mpss_phys, in qcom_q6v5_dump_segment()
1497 qproc->mpss_size); in qcom_q6v5_dump_segment()
1502 ptr = memremap(qproc->mpss_phys + offset + cp_offset, size, MEMREMAP_WC); in qcom_q6v5_dump_segment()
1511 qproc->current_dump_size += size; in qcom_q6v5_dump_segment()
1514 if (qproc->current_dump_size == qproc->total_dump_size) { in qcom_q6v5_dump_segment()
1515 if (qproc->dump_mba_loaded) { in qcom_q6v5_dump_segment()
1517 q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, in qcom_q6v5_dump_segment()
1519 qproc->mpss_phys, in qcom_q6v5_dump_segment()
1520 qproc->mpss_size); in qcom_q6v5_dump_segment()
1528 struct q6v5 *qproc = (struct q6v5 *)rproc->priv; in q6v5_start()
1536 dev_info(qproc->dev, "MBA booted with%s debug policy, loading mpss\n", in q6v5_start()
1537 qproc->dp_size ? "" : "out"); in q6v5_start()
1543 ret = qcom_q6v5_wait_for_start(&qproc->q6v5, msecs_to_jiffies(5000)); in q6v5_start()
1544 if (ret == -ETIMEDOUT) { in q6v5_start()
1545 dev_err(qproc->dev, "start timed out\n"); in q6v5_start()
1549 xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, in q6v5_start()
1550 false, qproc->mba_phys, in q6v5_start()
1551 qproc->mba_size); in q6v5_start()
1553 dev_err(qproc->dev, in q6v5_start()
1557 qproc->current_dump_size = 0; in q6v5_start()
1570 struct q6v5 *qproc = (struct q6v5 *)rproc->priv; in q6v5_stop()
1573 ret = qcom_q6v5_request_stop(&qproc->q6v5, qproc->sysmon); in q6v5_stop()
1574 if (ret == -ETIMEDOUT) in q6v5_stop()
1575 dev_err(qproc->dev, "timed out on wait\n"); in q6v5_stop()
1589 struct q6v5 *qproc = rproc->priv; in qcom_q6v5_register_dump_segments()
1593 ret = request_firmware(&fw, qproc->hexagon_mdt_image, qproc->dev); in qcom_q6v5_register_dump_segments()
1595 dev_err(qproc->dev, "unable to load %s\n", in qcom_q6v5_register_dump_segments()
1596 qproc->hexagon_mdt_image); in qcom_q6v5_register_dump_segments()
1602 ehdr = (struct elf32_hdr *)fw->data; in qcom_q6v5_register_dump_segments()
1604 qproc->total_dump_size = 0; in qcom_q6v5_register_dump_segments()
1606 for (i = 0; i < ehdr->e_phnum; i++) { in qcom_q6v5_register_dump_segments()
1612 ret = rproc_coredump_add_custom_segment(rproc, phdr->p_paddr, in qcom_q6v5_register_dump_segments()
1613 phdr->p_memsz, in qcom_q6v5_register_dump_segments()
1619 qproc->total_dump_size += phdr->p_memsz; in qcom_q6v5_register_dump_segments()
1628 struct q6v5 *qproc = (struct q6v5 *)rproc->priv; in q6v5_panic()
1630 return qcom_q6v5_panic(&qproc->q6v5); in q6v5_panic()
1645 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in qcom_msa_handover()
1646 qproc->proxy_clk_count); in qcom_msa_handover()
1647 q6v5_regulator_disable(qproc, qproc->proxy_regs, in qcom_msa_handover()
1648 qproc->proxy_reg_count); in qcom_msa_handover()
1649 q6v5_regulator_disable(qproc, qproc->fallback_proxy_regs, in qcom_msa_handover()
1650 qproc->fallback_proxy_reg_count); in qcom_msa_handover()
1651 q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in qcom_msa_handover()
1660 qproc->reg_base = devm_platform_ioremap_resource_byname(pdev, "qdsp6"); in q6v5_init_mem()
1661 if (IS_ERR(qproc->reg_base)) in q6v5_init_mem()
1662 return PTR_ERR(qproc->reg_base); in q6v5_init_mem()
1664 qproc->rmb_base = devm_platform_ioremap_resource_byname(pdev, "rmb"); in q6v5_init_mem()
1665 if (IS_ERR(qproc->rmb_base)) in q6v5_init_mem()
1666 return PTR_ERR(qproc->rmb_base); in q6v5_init_mem()
1668 if (qproc->has_vq6) in q6v5_init_mem()
1671 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1672 "qcom,halt-regs", halt_cell_cnt, 0, &args); in q6v5_init_mem()
1674 dev_err(&pdev->dev, "failed to parse qcom,halt-regs\n"); in q6v5_init_mem()
1675 return -EINVAL; in q6v5_init_mem()
1678 qproc->halt_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1680 if (IS_ERR(qproc->halt_map)) in q6v5_init_mem()
1681 return PTR_ERR(qproc->halt_map); in q6v5_init_mem()
1683 qproc->halt_q6 = args.args[0]; in q6v5_init_mem()
1684 qproc->halt_modem = args.args[1]; in q6v5_init_mem()
1685 qproc->halt_nc = args.args[2]; in q6v5_init_mem()
1687 if (qproc->has_vq6) in q6v5_init_mem()
1688 qproc->halt_vq6 = args.args[3]; in q6v5_init_mem()
1690 if (qproc->has_qaccept_regs) { in q6v5_init_mem()
1691 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1692 "qcom,qaccept-regs", in q6v5_init_mem()
1695 dev_err(&pdev->dev, "failed to parse qaccept-regs\n"); in q6v5_init_mem()
1696 return -EINVAL; in q6v5_init_mem()
1699 qproc->qaccept_mdm = args.args[0]; in q6v5_init_mem()
1700 qproc->qaccept_cx = args.args[1]; in q6v5_init_mem()
1701 qproc->qaccept_axi = args.args[2]; in q6v5_init_mem()
1704 if (qproc->has_ext_cntl_regs) { in q6v5_init_mem()
1705 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1706 "qcom,ext-regs", in q6v5_init_mem()
1709 dev_err(&pdev->dev, "failed to parse ext-regs index 0\n"); in q6v5_init_mem()
1710 return -EINVAL; in q6v5_init_mem()
1713 qproc->conn_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1715 if (IS_ERR(qproc->conn_map)) in q6v5_init_mem()
1716 return PTR_ERR(qproc->conn_map); in q6v5_init_mem()
1718 qproc->force_clk_on = args.args[0]; in q6v5_init_mem()
1719 qproc->rscc_disable = args.args[1]; in q6v5_init_mem()
1721 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1722 "qcom,ext-regs", in q6v5_init_mem()
1725 dev_err(&pdev->dev, "failed to parse ext-regs index 1\n"); in q6v5_init_mem()
1726 return -EINVAL; in q6v5_init_mem()
1729 qproc->axim1_clk_off = args.args[0]; in q6v5_init_mem()
1730 qproc->crypto_clk_off = args.args[1]; in q6v5_init_mem()
1733 if (qproc->has_spare_reg) { in q6v5_init_mem()
1734 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1735 "qcom,spare-regs", in q6v5_init_mem()
1738 dev_err(&pdev->dev, "failed to parse spare-regs\n"); in q6v5_init_mem()
1739 return -EINVAL; in q6v5_init_mem()
1742 qproc->conn_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1744 if (IS_ERR(qproc->conn_map)) in q6v5_init_mem()
1745 return PTR_ERR(qproc->conn_map); in q6v5_init_mem()
1747 qproc->conn_box = args.args[0]; in q6v5_init_mem()
1766 if (rc != -EPROBE_DEFER) in q6v5_init_clocks()
1792 ret = PTR_ERR(devs[i]) ? : -ENODATA; in q6v5_pds_attach()
1800 for (i--; i >= 0; i--) in q6v5_pds_attach()
1817 qproc->mss_restart = devm_reset_control_get_exclusive(qproc->dev, in q6v5_init_reset()
1819 if (IS_ERR(qproc->mss_restart)) { in q6v5_init_reset()
1820 dev_err(qproc->dev, "failed to acquire mss restart\n"); in q6v5_init_reset()
1821 return PTR_ERR(qproc->mss_restart); in q6v5_init_reset()
1824 if (qproc->has_alt_reset || qproc->has_spare_reg || qproc->has_ext_cntl_regs) { in q6v5_init_reset()
1825 qproc->pdc_reset = devm_reset_control_get_exclusive(qproc->dev, in q6v5_init_reset()
1827 if (IS_ERR(qproc->pdc_reset)) { in q6v5_init_reset()
1828 dev_err(qproc->dev, "failed to acquire pdc reset\n"); in q6v5_init_reset()
1829 return PTR_ERR(qproc->pdc_reset); in q6v5_init_reset()
1844 * In the absence of mba/mpss sub-child, extract the mba and mpss in q6v5_alloc_memory_region()
1845 * reserved memory regions from device's memory-region property. in q6v5_alloc_memory_region()
1847 child = of_get_child_by_name(qproc->dev->of_node, "mba"); in q6v5_alloc_memory_region()
1849 node = of_parse_phandle(qproc->dev->of_node, in q6v5_alloc_memory_region()
1850 "memory-region", 0); in q6v5_alloc_memory_region()
1852 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1859 dev_err(qproc->dev, "unable to resolve mba region\n"); in q6v5_alloc_memory_region()
1863 qproc->mba_phys = r.start; in q6v5_alloc_memory_region()
1864 qproc->mba_size = resource_size(&r); in q6v5_alloc_memory_region()
1867 node = of_parse_phandle(qproc->dev->of_node, in q6v5_alloc_memory_region()
1868 "memory-region", 1); in q6v5_alloc_memory_region()
1870 child = of_get_child_by_name(qproc->dev->of_node, "mpss"); in q6v5_alloc_memory_region()
1871 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1878 dev_err(qproc->dev, "unable to resolve mpss region\n"); in q6v5_alloc_memory_region()
1882 qproc->mpss_phys = qproc->mpss_reloc = r.start; in q6v5_alloc_memory_region()
1883 qproc->mpss_size = resource_size(&r); in q6v5_alloc_memory_region()
1897 desc = of_device_get_match_data(&pdev->dev); in q6v5_probe()
1899 return -EINVAL; in q6v5_probe()
1901 if (desc->need_mem_protection && !qcom_scm_is_available()) in q6v5_probe()
1902 return -EPROBE_DEFER; in q6v5_probe()
1904 mba_image = desc->hexagon_mba_image; in q6v5_probe()
1905 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", in q6v5_probe()
1907 if (ret < 0 && ret != -EINVAL) { in q6v5_probe()
1908 dev_err(&pdev->dev, "unable to read mba firmware-name\n"); in q6v5_probe()
1912 rproc = rproc_alloc(&pdev->dev, pdev->name, &q6v5_ops, in q6v5_probe()
1915 dev_err(&pdev->dev, "failed to allocate rproc\n"); in q6v5_probe()
1916 return -ENOMEM; in q6v5_probe()
1919 rproc->auto_boot = false; in q6v5_probe()
1922 qproc = (struct q6v5 *)rproc->priv; in q6v5_probe()
1923 qproc->dev = &pdev->dev; in q6v5_probe()
1924 qproc->rproc = rproc; in q6v5_probe()
1925 qproc->hexagon_mdt_image = "modem.mdt"; in q6v5_probe()
1926 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", in q6v5_probe()
1927 1, &qproc->hexagon_mdt_image); in q6v5_probe()
1928 if (ret < 0 && ret != -EINVAL) { in q6v5_probe()
1929 dev_err(&pdev->dev, "unable to read mpss firmware-name\n"); in q6v5_probe()
1935 qproc->has_qaccept_regs = desc->has_qaccept_regs; in q6v5_probe()
1936 qproc->has_ext_cntl_regs = desc->has_ext_cntl_regs; in q6v5_probe()
1937 qproc->has_vq6 = desc->has_vq6; in q6v5_probe()
1938 qproc->has_spare_reg = desc->has_spare_reg; in q6v5_probe()
1947 ret = q6v5_init_clocks(&pdev->dev, qproc->proxy_clks, in q6v5_probe()
1948 desc->proxy_clk_names); in q6v5_probe()
1950 dev_err(&pdev->dev, "Failed to get proxy clocks.\n"); in q6v5_probe()
1953 qproc->proxy_clk_count = ret; in q6v5_probe()
1955 ret = q6v5_init_clocks(&pdev->dev, qproc->reset_clks, in q6v5_probe()
1956 desc->reset_clk_names); in q6v5_probe()
1958 dev_err(&pdev->dev, "Failed to get reset clocks.\n"); in q6v5_probe()
1961 qproc->reset_clk_count = ret; in q6v5_probe()
1963 ret = q6v5_init_clocks(&pdev->dev, qproc->active_clks, in q6v5_probe()
1964 desc->active_clk_names); in q6v5_probe()
1966 dev_err(&pdev->dev, "Failed to get active clocks.\n"); in q6v5_probe()
1969 qproc->active_clk_count = ret; in q6v5_probe()
1971 ret = q6v5_regulator_init(&pdev->dev, qproc->proxy_regs, in q6v5_probe()
1972 desc->proxy_supply); in q6v5_probe()
1974 dev_err(&pdev->dev, "Failed to get proxy regulators.\n"); in q6v5_probe()
1977 qproc->proxy_reg_count = ret; in q6v5_probe()
1979 ret = q6v5_regulator_init(&pdev->dev, qproc->active_regs, in q6v5_probe()
1980 desc->active_supply); in q6v5_probe()
1982 dev_err(&pdev->dev, "Failed to get active regulators.\n"); in q6v5_probe()
1985 qproc->active_reg_count = ret; in q6v5_probe()
1987 ret = q6v5_pds_attach(&pdev->dev, qproc->proxy_pds, in q6v5_probe()
1988 desc->proxy_pd_names); in q6v5_probe()
1990 if (ret == -ENODATA && desc->fallback_proxy_supply) { in q6v5_probe()
1991 ret = q6v5_regulator_init(&pdev->dev, in q6v5_probe()
1992 qproc->fallback_proxy_regs, in q6v5_probe()
1993 desc->fallback_proxy_supply); in q6v5_probe()
1995 dev_err(&pdev->dev, "Failed to get fallback proxy regulators.\n"); in q6v5_probe()
1998 qproc->fallback_proxy_reg_count = ret; in q6v5_probe()
2000 dev_err(&pdev->dev, "Failed to init power domains\n"); in q6v5_probe()
2003 qproc->proxy_pd_count = ret; in q6v5_probe()
2006 qproc->has_alt_reset = desc->has_alt_reset; in q6v5_probe()
2011 qproc->version = desc->version; in q6v5_probe()
2012 qproc->need_mem_protection = desc->need_mem_protection; in q6v5_probe()
2013 qproc->has_mba_logs = desc->has_mba_logs; in q6v5_probe()
2015 ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, "modem", in q6v5_probe()
2020 qproc->mpss_perm = BIT(QCOM_SCM_VMID_HLOS); in q6v5_probe()
2021 qproc->mba_perm = BIT(QCOM_SCM_VMID_HLOS); in q6v5_probe()
2022 qcom_add_glink_subdev(rproc, &qproc->glink_subdev, "mpss"); in q6v5_probe()
2023 qcom_add_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_probe()
2024 qcom_add_ssr_subdev(rproc, &qproc->ssr_subdev, "mpss"); in q6v5_probe()
2025 qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12); in q6v5_probe()
2026 if (IS_ERR(qproc->sysmon)) { in q6v5_probe()
2027 ret = PTR_ERR(qproc->sysmon); in q6v5_probe()
2035 node = of_get_compatible_child(pdev->dev.of_node, "qcom,bam-dmux"); in q6v5_probe()
2036 qproc->bam_dmux = of_platform_device_create(node, NULL, &pdev->dev); in q6v5_probe()
2042 qcom_remove_sysmon_subdev(qproc->sysmon); in q6v5_probe()
2044 qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); in q6v5_probe()
2045 qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_probe()
2046 qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); in q6v5_probe()
2048 q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_probe()
2058 struct rproc *rproc = qproc->rproc; in q6v5_remove()
2060 if (qproc->bam_dmux) in q6v5_remove()
2061 of_platform_device_destroy(&qproc->bam_dmux->dev, NULL); in q6v5_remove()
2064 qcom_q6v5_deinit(&qproc->q6v5); in q6v5_remove()
2065 qcom_remove_sysmon_subdev(qproc->sysmon); in q6v5_remove()
2066 qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); in q6v5_remove()
2067 qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_remove()
2068 qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); in q6v5_remove()
2070 q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_remove()
2095 "cx",
2124 "cx",
2158 "cx",
2190 "cx",
2208 .supply = "pll",
2230 "cx",
2247 .supply = "pll",
2254 .supply = "mx",
2258 .supply = "cx",
2275 "cx",
2292 .supply = "pll",
2299 .supply = "mx",
2303 .supply = "cx",
2310 .supply = "mss",
2328 "cx",
2342 { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss},
2343 { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss},
2344 { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss},
2345 { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss},
2346 { .compatible = "qcom,msm8998-mss-pil", .data = &msm8998_mss},
2347 { .compatible = "qcom,sc7180-mss-pil", .data = &sc7180_mss},
2348 { .compatible = "qcom,sc7280-mss-pil", .data = &sc7280_mss},
2349 { .compatible = "qcom,sdm845-mss-pil", .data = &sdm845_mss},
2358 .name = "qcom-q6v5-mss",
2364 MODULE_DESCRIPTION("Qualcomm Self-authenticating modem remoteproc driver");