Lines Matching +full:0 +full:xd9000000
23 #define AO_REMAP_REG0 0x0
24 #define AO_REMAP_REG0_REMAP_AHB_SRAM_BITS_17_14_FOR_ARM_CPU GENMASK(3, 0)
26 #define AO_REMAP_REG1 0x4
28 #define AO_REMAP_REG1_REMAP_AHB_SRAM_BITS_17_14_FOR_MEDIA_CPU GENMASK(3, 0)
30 #define AO_CPU_CNTL 0x0
34 #define AO_CPU_CNTL_RUN BIT(0)
36 #define AO_CPU_STAT 0x4
38 #define AO_SECURE_REG0 0x0
42 #define MESON_AO_RPROC_SRAM_USABLE_BITS 0xfff3c000ULL
44 #define MESON_AO_RPROC_MEMORY_OFFSET 0x10000000
74 * The SRAM content as seen by the ARC core always starts at 0x0 in meson_mx_ao_arc_rproc_start()
80 writel(0x0, priv->remap_base + AO_REMAP_REG1); in meson_mx_ao_arc_rproc_start()
96 * Convert from 0xd9000000 to 0xc9000000 as the vendor driver does. in meson_mx_ao_arc_rproc_start()
109 return 0; in meson_mx_ao_arc_rproc_start()
120 return 0; in meson_mx_ao_arc_rproc_stop()
128 /* The memory from the ARC core's perspective always starts at 0x0. */ in meson_mx_ao_arc_rproc_da_to_va()
163 priv->sram_pool = of_gen_pool_get(dev->of_node, "sram", 0); in meson_mx_ao_arc_rproc_probe()
224 return 0; in meson_mx_ao_arc_rproc_probe()
239 return 0; in meson_mx_ao_arc_rproc_remove()