Lines Matching refs:regmap_reg_range
64 regmap_reg_range(SLG51000_SYSCTL_MATRIX_CONF_A,
66 regmap_reg_range(SLG51000_LDO1_VSEL, SLG51000_LDO1_VSEL),
67 regmap_reg_range(SLG51000_LDO1_MINV, SLG51000_LDO1_MAXV),
68 regmap_reg_range(SLG51000_LDO1_IRQ_MASK, SLG51000_LDO1_IRQ_MASK),
69 regmap_reg_range(SLG51000_LDO2_VSEL, SLG51000_LDO2_VSEL),
70 regmap_reg_range(SLG51000_LDO2_MINV, SLG51000_LDO2_MAXV),
71 regmap_reg_range(SLG51000_LDO2_IRQ_MASK, SLG51000_LDO2_IRQ_MASK),
72 regmap_reg_range(SLG51000_LDO3_VSEL, SLG51000_LDO3_VSEL),
73 regmap_reg_range(SLG51000_LDO3_MINV, SLG51000_LDO3_MAXV),
74 regmap_reg_range(SLG51000_LDO3_IRQ_MASK, SLG51000_LDO3_IRQ_MASK),
75 regmap_reg_range(SLG51000_LDO4_VSEL, SLG51000_LDO4_VSEL),
76 regmap_reg_range(SLG51000_LDO4_MINV, SLG51000_LDO4_MAXV),
77 regmap_reg_range(SLG51000_LDO4_IRQ_MASK, SLG51000_LDO4_IRQ_MASK),
78 regmap_reg_range(SLG51000_LDO5_VSEL, SLG51000_LDO5_VSEL),
79 regmap_reg_range(SLG51000_LDO5_MINV, SLG51000_LDO5_MAXV),
80 regmap_reg_range(SLG51000_LDO5_IRQ_MASK, SLG51000_LDO5_IRQ_MASK),
81 regmap_reg_range(SLG51000_LDO6_VSEL, SLG51000_LDO6_VSEL),
82 regmap_reg_range(SLG51000_LDO6_MINV, SLG51000_LDO6_MAXV),
83 regmap_reg_range(SLG51000_LDO6_IRQ_MASK, SLG51000_LDO6_IRQ_MASK),
84 regmap_reg_range(SLG51000_LDO7_VSEL, SLG51000_LDO7_VSEL),
85 regmap_reg_range(SLG51000_LDO7_MINV, SLG51000_LDO7_MAXV),
86 regmap_reg_range(SLG51000_LDO7_IRQ_MASK, SLG51000_LDO7_IRQ_MASK),
87 regmap_reg_range(SLG51000_OTP_IRQ_MASK, SLG51000_OTP_IRQ_MASK),
91 regmap_reg_range(SLG51000_SYSCTL_PATN_ID_B0,
93 regmap_reg_range(SLG51000_SYSCTL_SYS_CONF_A,
95 regmap_reg_range(SLG51000_SYSCTL_SYS_CONF_D,
97 regmap_reg_range(SLG51000_SYSCTL_REFGEN_CONF_C,
99 regmap_reg_range(SLG51000_SYSCTL_FAULT_LOG1, SLG51000_SYSCTL_IRQ_MASK),
100 regmap_reg_range(SLG51000_IO_GPIO1_CONF, SLG51000_IO_GPIO_STATUS),
101 regmap_reg_range(SLG51000_LUTARRAY_LUT_VAL_0,
103 regmap_reg_range(SLG51000_MUXARRAY_INPUT_SEL_0,
105 regmap_reg_range(SLG51000_PWRSEQ_RESOURCE_EN_0,
107 regmap_reg_range(SLG51000_LDO1_VSEL, SLG51000_LDO1_VSEL),
108 regmap_reg_range(SLG51000_LDO1_MINV, SLG51000_LDO1_MAXV),
109 regmap_reg_range(SLG51000_LDO1_MISC1, SLG51000_LDO1_VSEL_ACTUAL),
110 regmap_reg_range(SLG51000_LDO1_EVENT, SLG51000_LDO1_IRQ_MASK),
111 regmap_reg_range(SLG51000_LDO2_VSEL, SLG51000_LDO2_VSEL),
112 regmap_reg_range(SLG51000_LDO2_MINV, SLG51000_LDO2_MAXV),
113 regmap_reg_range(SLG51000_LDO2_MISC1, SLG51000_LDO2_VSEL_ACTUAL),
114 regmap_reg_range(SLG51000_LDO2_EVENT, SLG51000_LDO2_IRQ_MASK),
115 regmap_reg_range(SLG51000_LDO3_VSEL, SLG51000_LDO3_VSEL),
116 regmap_reg_range(SLG51000_LDO3_MINV, SLG51000_LDO3_MAXV),
117 regmap_reg_range(SLG51000_LDO3_CONF1, SLG51000_LDO3_VSEL_ACTUAL),
118 regmap_reg_range(SLG51000_LDO3_EVENT, SLG51000_LDO3_IRQ_MASK),
119 regmap_reg_range(SLG51000_LDO4_VSEL, SLG51000_LDO4_VSEL),
120 regmap_reg_range(SLG51000_LDO4_MINV, SLG51000_LDO4_MAXV),
121 regmap_reg_range(SLG51000_LDO4_CONF1, SLG51000_LDO4_VSEL_ACTUAL),
122 regmap_reg_range(SLG51000_LDO4_EVENT, SLG51000_LDO4_IRQ_MASK),
123 regmap_reg_range(SLG51000_LDO5_VSEL, SLG51000_LDO5_VSEL),
124 regmap_reg_range(SLG51000_LDO5_MINV, SLG51000_LDO5_MAXV),
125 regmap_reg_range(SLG51000_LDO5_TRIM2, SLG51000_LDO5_TRIM2),
126 regmap_reg_range(SLG51000_LDO5_CONF1, SLG51000_LDO5_VSEL_ACTUAL),
127 regmap_reg_range(SLG51000_LDO5_EVENT, SLG51000_LDO5_IRQ_MASK),
128 regmap_reg_range(SLG51000_LDO6_VSEL, SLG51000_LDO6_VSEL),
129 regmap_reg_range(SLG51000_LDO6_MINV, SLG51000_LDO6_MAXV),
130 regmap_reg_range(SLG51000_LDO6_TRIM2, SLG51000_LDO6_TRIM2),
131 regmap_reg_range(SLG51000_LDO6_CONF1, SLG51000_LDO6_VSEL_ACTUAL),
132 regmap_reg_range(SLG51000_LDO6_EVENT, SLG51000_LDO6_IRQ_MASK),
133 regmap_reg_range(SLG51000_LDO7_VSEL, SLG51000_LDO7_VSEL),
134 regmap_reg_range(SLG51000_LDO7_MINV, SLG51000_LDO7_MAXV),
135 regmap_reg_range(SLG51000_LDO7_CONF1, SLG51000_LDO7_VSEL_ACTUAL),
136 regmap_reg_range(SLG51000_LDO7_EVENT, SLG51000_LDO7_IRQ_MASK),
137 regmap_reg_range(SLG51000_OTP_EVENT, SLG51000_OTP_EVENT),
138 regmap_reg_range(SLG51000_OTP_IRQ_MASK, SLG51000_OTP_IRQ_MASK),
139 regmap_reg_range(SLG51000_OTP_LOCK_OTP_PROG, SLG51000_OTP_LOCK_CTRL),
140 regmap_reg_range(SLG51000_LOCK_GLOBAL_LOCK_CTRL1,
145 regmap_reg_range(SLG51000_SYSCTL_FAULT_LOG1, SLG51000_SYSCTL_STATUS),
146 regmap_reg_range(SLG51000_IO_GPIO_STATUS, SLG51000_IO_GPIO_STATUS),
147 regmap_reg_range(SLG51000_LDO1_EVENT, SLG51000_LDO1_STATUS),
148 regmap_reg_range(SLG51000_LDO2_EVENT, SLG51000_LDO2_STATUS),
149 regmap_reg_range(SLG51000_LDO3_EVENT, SLG51000_LDO3_STATUS),
150 regmap_reg_range(SLG51000_LDO4_EVENT, SLG51000_LDO4_STATUS),
151 regmap_reg_range(SLG51000_LDO5_EVENT, SLG51000_LDO5_STATUS),
152 regmap_reg_range(SLG51000_LDO6_EVENT, SLG51000_LDO6_STATUS),
153 regmap_reg_range(SLG51000_LDO7_EVENT, SLG51000_LDO7_STATUS),
154 regmap_reg_range(SLG51000_OTP_EVENT, SLG51000_OTP_EVENT),