89 	iowrite32(data, priv->regs + offset);  in tsi721_lcwrite()
142 	iowrite32(rd_count + 2,	regs + TSI721_DMAC_DWRCNT);  in tsi721_maint_dma()
171 		iowrite32(TSI721_DMAC_INT_ALL, regs + TSI721_DMAC_INT);  in tsi721_maint_dma()
172 		iowrite32(TSI721_DMAC_CTL_INIT, regs + TSI721_DMAC_CTL);  in tsi721_maint_dma()
174 		iowrite32(0, regs + TSI721_DMAC_DWRCNT);  in tsi721_maint_dma()
191 	iowrite32(swr_ptr, regs + TSI721_DMAC_DSRP);  in tsi721_maint_dma()
282 	iowrite32(TSI721_RIO_PW_RX_STAT_PW_DISC | TSI721_RIO_PW_RX_STAT_PW_VAL,  in tsi721_pw_handler()
324 	iowrite32(TSI721_RIO_PW_RX_STAT_PW_DISC | TSI721_RIO_PW_RX_STAT_PW_VAL,  in tsi721_pw_enable()
327 	iowrite32(rval, priv->regs + TSI721_RIO_EM_INT_ENABLE);  in tsi721_pw_enable()
373 	iowrite32(regval,  in tsi721_dbell_handler()
435 	iowrite32(rd_ptr & (IDB_QSIZE - 1),  in tsi721_db_dpc()
441 	iowrite32(regval,  in tsi721_db_dpc()
467 		iowrite32(0, priv->regs + TSI721_DEV_INTE);  in tsi721_irqhandler()
488 			iowrite32(intval,  in tsi721_irqhandler()
505 			iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
521 			iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_irqhandler()
563 		iowrite32(dev_int, priv->regs + TSI721_DEV_INTE);  in tsi721_irqhandler()
574 	iowrite32(TSI721_SR_CHINT_ALL,  in tsi721_interrupts_init()
576 	iowrite32(TSI721_SR_CHINT_IDBQRCV,  in tsi721_interrupts_init()
580 	iowrite32(TSI721_RIO_EM_DEV_INT_EN_INT,  in tsi721_interrupts_init()
591 	iowrite32(intr,	priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_interrupts_init()
599 	iowrite32(intr, priv->regs + TSI721_DEV_INTE);  in tsi721_interrupts_init()
678 	iowrite32(sr_ch_int, priv->regs + TSI721_SR_CHINT(IDB_QUEUE));  in tsi721_sr2pc_ch_msix()
980 		iowrite32(rval, priv->regs + TSI721_LUT_DATA0);  in tsi721_map_outb_win()
982 		iowrite32(rval, priv->regs + TSI721_LUT_DATA1);  in tsi721_map_outb_win()
984 		iowrite32(rval, priv->regs + TSI721_LUT_DATA2);  in tsi721_map_outb_win()
987 		iowrite32(rval, priv->regs + TSI721_ZONE_SEL);  in tsi721_map_outb_win()
992 	iowrite32(TSI721_OBWIN_SIZE(size) << 8,  in tsi721_map_outb_win()
994 	iowrite32((u32)(ob_win->base >> 32), priv->regs + TSI721_OBWINUB(obw));  in tsi721_map_outb_win()
995 	iowrite32((u32)(ob_win->base & TSI721_OBWINLB_BA) | TSI721_OBWINLB_WEN,  in tsi721_map_outb_win()
1019 			iowrite32(0, priv->regs + TSI721_OBWINLB(i));  in tsi721_unmap_outb_win()
1041 		iowrite32(0, priv->regs + TSI721_OBWINLB(i));  in tsi721_init_pc2sr_mapping()
1044 	iowrite32(0, priv->regs + TSI721_LUT_DATA0);  in tsi721_init_pc2sr_mapping()
1045 	iowrite32(0, priv->regs + TSI721_LUT_DATA1);  in tsi721_init_pc2sr_mapping()
1046 	iowrite32(0, priv->regs + TSI721_LUT_DATA2);  in tsi721_init_pc2sr_mapping()
1055 			iowrite32(rval, priv->regs + TSI721_ZONE_SEL);  in tsi721_init_pc2sr_mapping()
1211 	iowrite32(TSI721_IBWIN_SIZE(ibw_size) << 8,  in tsi721_rio_map_inb_mem()
1214 	iowrite32(((u64)loc_start >> 32), priv->regs + TSI721_IBWIN_TUA(i));  in tsi721_rio_map_inb_mem()
1215 	iowrite32(((u64)loc_start & TSI721_IBWIN_TLA_ADD),  in tsi721_rio_map_inb_mem()
1218 	iowrite32(ibw_start >> 32, priv->regs + TSI721_IBWIN_UB(i));  in tsi721_rio_map_inb_mem()
1219 	iowrite32((ibw_start & TSI721_IBWIN_LB_BA) | TSI721_IBWIN_LB_WEN,  in tsi721_rio_map_inb_mem()
1283 			iowrite32(0, priv->regs + TSI721_IBWIN_LB(i));  in tsi721_rio_unmap_inb_mem()
1308 		iowrite32(0, priv->regs + TSI721_IBWIN_LB(i));  in tsi721_init_sr2pc_mapping()
1326 			iowrite32(0, priv->regs + TSI721_IBWIN_LB(i));  in tsi721_close_sr2pc_mapping()
1351 	iowrite32(TSI721_RIO_PW_CTL_PWC_REL, priv->regs + TSI721_RIO_PW_CTL);  in tsi721_port_write_init()
1382 	iowrite32(TSI721_IDQ_SIZE_VAL(IDB_QSIZE),  in tsi721_doorbell_init()
1384 	iowrite32(((u64)priv->idb_dma >> 32),  in tsi721_doorbell_init()
1386 	iowrite32(((u64)priv->idb_dma & TSI721_IDQ_BASEL_ADDR),  in tsi721_doorbell_init()
1389 	iowrite32(0, priv->regs + TSI721_IDQ_MASK(IDB_QUEUE));  in tsi721_doorbell_init()
1391 	iowrite32(TSI721_IDQ_INIT, priv->regs + TSI721_IDQ_CTL(IDB_QUEUE));  in tsi721_doorbell_init()
1393 	iowrite32(0, priv->regs + TSI721_IDQ_RP(IDB_QUEUE));  in tsi721_doorbell_init()
1481 	iowrite32(((u64)bd_phys >> 32),	regs + TSI721_DMAC_DPTRH);  in tsi721_bdma_maint_init()
1482 	iowrite32(((u64)bd_phys & TSI721_DMAC_DPTRL_MASK),  in tsi721_bdma_maint_init()
1486 	iowrite32(((u64)sts_phys >> 32), regs + TSI721_DMAC_DSBH);  in tsi721_bdma_maint_init()
1487 	iowrite32(((u64)sts_phys & TSI721_DMAC_DSBL_MASK),  in tsi721_bdma_maint_init()
1489 	iowrite32(TSI721_DMAC_DSSZ_SIZE(sts_size),  in tsi721_bdma_maint_init()
1493 	iowrite32(TSI721_DMAC_INT_ALL, regs + TSI721_DMAC_INT);  in tsi721_bdma_maint_init()
1498 	iowrite32(TSI721_DMAC_CTL_INIT,	regs + TSI721_DMAC_CTL);  in tsi721_bdma_maint_init()
1520 	iowrite32(TSI721_DMAC_CTL_INIT,	regs + TSI721_DMAC_CTL);  in tsi721_bdma_maint_free()
1547 	iowrite32(inte_mask, priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_interrupt_enable()
1551 	iowrite32(rval | inte_mask, priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_imsg_interrupt_enable()
1562 	iowrite32(rval | TSI721_INT_IMSG_CHAN(ch),  in tsi721_imsg_interrupt_enable()
1577 	iowrite32(inte_mask, priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_interrupt_disable()
1582 	iowrite32(rval, priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_imsg_interrupt_disable()
1594 	iowrite32(rval, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_interrupt_disable()
1608 	iowrite32(inte_mask, priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_interrupt_enable()
1612 	iowrite32(rval | inte_mask, priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_omsg_interrupt_enable()
1623 	iowrite32(rval | TSI721_INT_OMSG_CHAN(ch),  in tsi721_omsg_interrupt_enable()
1638 	iowrite32(inte_mask, priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_interrupt_disable()
1643 	iowrite32(rval, priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_omsg_interrupt_disable()
1655 	iowrite32(rval, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_interrupt_disable()
1718 	iowrite32(priv->omsg_ring[mbox].wr_count,  in tsi721_add_outb_message()
1779 		iowrite32(srd_ptr, priv->regs + TSI721_OBDMAC_DSRP(ch));  in tsi721_omsg_handler()
1829 		iowrite32(TSI721_OBDMAC_INT_ERROR,  in tsi721_omsg_handler()
1831 		iowrite32(TSI721_OBDMAC_CTL_RETRY_THR | TSI721_OBDMAC_CTL_INIT,  in tsi721_omsg_handler()
1841 		iowrite32(priv->omsg_ring[ch].tx_slot,  in tsi721_omsg_handler()
1849 	iowrite32(omsg_int, priv->regs + TSI721_OBDMAC_INT(ch));  in tsi721_omsg_handler()
1857 		iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_omsg_handler()
1945 	iowrite32(((u64)priv->omsg_ring[mbox].omd_phys >> 32),  in tsi721_open_outb_mbox()
1947 	iowrite32(((u64)priv->omsg_ring[mbox].omd_phys &  in tsi721_open_outb_mbox()
1952 	iowrite32(((u64)priv->omsg_ring[mbox].sts_phys >> 32),  in tsi721_open_outb_mbox()
1954 	iowrite32(((u64)priv->omsg_ring[mbox].sts_phys &  in tsi721_open_outb_mbox()
1957 	iowrite32(TSI721_DMAC_DSSZ_SIZE(priv->omsg_ring[mbox].sts_size),  in tsi721_open_outb_mbox()
2006 	iowrite32(TSI721_OBDMAC_CTL_RETRY_THR | TSI721_OBDMAC_CTL_INIT,  in tsi721_open_outb_mbox()
2133 	iowrite32(imsg_int, priv->regs + TSI721_IBDMAC_INT(ch));  in tsi721_imsg_handler()
2147 		iowrite32(ch_inte, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_imsg_handler()
2248 		iowrite32((u32)priv->mport.host_deviceid,  in tsi721_open_inb_mbox()
2258 	iowrite32(((u64)priv->imsg_ring[mbox].imfq_phys >> 32),  in tsi721_open_inb_mbox()
2260 	iowrite32(((u64)priv->imsg_ring[mbox].imfq_phys &  in tsi721_open_inb_mbox()
2263 	iowrite32(TSI721_DMAC_DSSZ_SIZE(entries),  in tsi721_open_inb_mbox()
2267 	iowrite32(((u64)priv->imsg_ring[mbox].imd_phys >> 32),  in tsi721_open_inb_mbox()
2269 	iowrite32(((u32)priv->imsg_ring[mbox].imd_phys &  in tsi721_open_inb_mbox()
2272 	iowrite32(TSI721_DMAC_DSSZ_SIZE(entries),  in tsi721_open_inb_mbox()
2310 	iowrite32(TSI721_IBDMAC_CTL_INIT, priv->regs + TSI721_IBDMAC_CTL(ch));  in tsi721_open_inb_mbox()
2314 	iowrite32(entries - 1, priv->regs + TSI721_IBDMAC_FQWP(ch));  in tsi721_open_inb_mbox()
2489 	iowrite32(priv->imsg_ring[mbox].desc_rdptr,  in tsi721_get_inb_message()
2499 	iowrite32(priv->imsg_ring[mbox].fq_wrptr,  in tsi721_get_inb_message()
2515 	iowrite32(0, priv->regs + TSI721_SMSG_ECC_LOG);  in tsi721_messages_init()
2516 	iowrite32(0, priv->regs + TSI721_RETRY_GEN_CNT);  in tsi721_messages_init()
2517 	iowrite32(0, priv->regs + TSI721_RETRY_RX_CNT);  in tsi721_messages_init()
2520 	iowrite32(TSI721_RQRPTO_VAL, priv->regs + TSI721_RQRPTO);  in tsi721_messages_init()
2525 		iowrite32(TSI721_IBDMAC_INT_MASK,  in tsi721_messages_init()
2528 		iowrite32(0, priv->regs + TSI721_IBDMAC_STS(ch));  in tsi721_messages_init()
2530 		iowrite32(TSI721_SMSG_ECC_COR_LOG_MASK,  in tsi721_messages_init()
2532 		iowrite32(TSI721_SMSG_ECC_NCOR_MASK,  in tsi721_messages_init()
2581 	iowrite32(0, priv->regs + TSI721_DEV_INTE);  in tsi721_disable_ints()
2584 	iowrite32(0, priv->regs + TSI721_DEV_CHAN_INTE);  in tsi721_disable_ints()
2588 		iowrite32(0, priv->regs + TSI721_IBDMAC_INTE(ch));  in tsi721_disable_ints()
2592 		iowrite32(0, priv->regs + TSI721_OBDMAC_INTE(ch));  in tsi721_disable_ints()
2595 	iowrite32(0, priv->regs + TSI721_SMSG_INTE);  in tsi721_disable_ints()
2599 		iowrite32(0,  in tsi721_disable_ints()
2603 	iowrite32(0, priv->regs + TSI721_BDMA_INTE);  in tsi721_disable_ints()
2607 		iowrite32(0, priv->regs + TSI721_SR_CHINTE(ch));  in tsi721_disable_ints()
2610 	iowrite32(0, priv->regs + TSI721_SR2PC_GEN_INTE);  in tsi721_disable_ints()
2613 	iowrite32(0, priv->regs + TSI721_PC2SR_INTE);  in tsi721_disable_ints()
2616 	iowrite32(0, priv->regs + TSI721_I2C_INT_ENABLE);  in tsi721_disable_ints()
2619 	iowrite32(0, priv->regs + TSI721_RIO_EM_INT_ENABLE);  in tsi721_disable_ints()
2620 	iowrite32(0, priv->regs + TSI721_RIO_EM_DEV_INT_EN);  in tsi721_disable_ints()
2710 	iowrite32(ioread32(priv->regs + TSI721_DEVCTL) |  in tsi721_setup_mport()
2715 		iowrite32(RIO_PORT_GEN_HOST | RIO_PORT_GEN_MASTER |  in tsi721_setup_mport()
2719 		iowrite32(0, priv->regs + (0x100 + RIO_PORT_GEN_CTL_CSR));  in tsi721_setup_mport()