53 static u32 sprd_pwm_read(struct sprd_pwm_chip *spc, u32 hwid, u32 reg)  in sprd_pwm_read()  argument
57 	return readl_relaxed(spc->base + offset);  in sprd_pwm_read()
60 static void sprd_pwm_write(struct sprd_pwm_chip *spc, u32 hwid,  in sprd_pwm_write()  argument
65 	writel_relaxed(val, spc->base + offset);  in sprd_pwm_write()
71 	struct sprd_pwm_chip *spc =  in sprd_pwm_get_state()  local
73 	struct sprd_pwm_chn *chn = &spc->chn[pwm->hwpwm];  in sprd_pwm_get_state()
84 		dev_err(spc->dev, "failed to enable pwm%u clocks\n",  in sprd_pwm_get_state()
89 	val = sprd_pwm_read(spc, pwm->hwpwm, SPRD_PWM_ENABLE);  in sprd_pwm_get_state()
103 	val = sprd_pwm_read(spc, pwm->hwpwm, SPRD_PWM_PRESCALE);  in sprd_pwm_get_state()
108 	val = sprd_pwm_read(spc, pwm->hwpwm, SPRD_PWM_DUTY);  in sprd_pwm_get_state()
118 static int sprd_pwm_config(struct sprd_pwm_chip *spc, struct pwm_device *pwm,  in sprd_pwm_config()  argument
121 	struct sprd_pwm_chn *chn = &spc->chn[pwm->hwpwm];  in sprd_pwm_config()
151 	sprd_pwm_write(spc, pwm->hwpwm, SPRD_PWM_PRESCALE, prescale);  in sprd_pwm_config()
152 	sprd_pwm_write(spc, pwm->hwpwm, SPRD_PWM_MOD, SPRD_PWM_MOD_MAX);  in sprd_pwm_config()
153 	sprd_pwm_write(spc, pwm->hwpwm, SPRD_PWM_DUTY, duty);  in sprd_pwm_config()
161 	struct sprd_pwm_chip *spc =  in sprd_pwm_apply()  local
163 	struct sprd_pwm_chn *chn = &spc->chn[pwm->hwpwm];  in sprd_pwm_apply()
179 				dev_err(spc->dev,  in sprd_pwm_apply()
186 		ret = sprd_pwm_config(spc, pwm, state->duty_cycle,  in sprd_pwm_apply()
191 		sprd_pwm_write(spc, pwm->hwpwm, SPRD_PWM_ENABLE, 1);  in sprd_pwm_apply()
198 		sprd_pwm_write(spc, pwm->hwpwm, SPRD_PWM_ENABLE, 0);  in sprd_pwm_apply()
212 static int sprd_pwm_clk_init(struct sprd_pwm_chip *spc)  in sprd_pwm_clk_init()  argument
218 		struct sprd_pwm_chn *chn = &spc->chn[i];  in sprd_pwm_clk_init()
225 		ret = devm_clk_bulk_get(spc->dev, SPRD_PWM_CHN_CLKS_NUM,  in sprd_pwm_clk_init()
231 			return dev_err_probe(spc->dev, ret,  in sprd_pwm_clk_init()
240 		dev_err(spc->dev, "no available PWM channels\n");  in sprd_pwm_clk_init()
244 	spc->num_pwms = i;  in sprd_pwm_clk_init()
251 	struct sprd_pwm_chip *spc;  in sprd_pwm_probe()  local
254 	spc = devm_kzalloc(&pdev->dev, sizeof(*spc), GFP_KERNEL);  in sprd_pwm_probe()
255 	if (!spc)  in sprd_pwm_probe()
258 	spc->base = devm_platform_ioremap_resource(pdev, 0);  in sprd_pwm_probe()
259 	if (IS_ERR(spc->base))  in sprd_pwm_probe()
260 		return PTR_ERR(spc->base);  in sprd_pwm_probe()
262 	spc->dev = &pdev->dev;  in sprd_pwm_probe()
263 	platform_set_drvdata(pdev, spc);  in sprd_pwm_probe()
265 	ret = sprd_pwm_clk_init(spc);  in sprd_pwm_probe()
269 	spc->chip.dev = &pdev->dev;  in sprd_pwm_probe()
270 	spc->chip.ops = &sprd_pwm_ops;  in sprd_pwm_probe()
271 	spc->chip.npwm = spc->num_pwms;  in sprd_pwm_probe()
273 	ret = pwmchip_add(&spc->chip);  in sprd_pwm_probe()
282 	struct sprd_pwm_chip *spc = platform_get_drvdata(pdev);  in sprd_pwm_remove()  local
284 	pwmchip_remove(&spc->chip);  in sprd_pwm_remove()