1 // SPDX-License-Identifier: GPL-2.0-only
20  * 1) There is no disable bit and the hardware docs advise programming a zero
21  *    duty to achieve output equivalent to that of a normal disable operation.
75 	unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET);  in kona_pwmc_prepare_for_settings()
79 	writel(value, kp->base + PWM_CONTROL_OFFSET);  in kona_pwmc_prepare_for_settings()
90 	unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET);  in kona_pwmc_apply_settings()
95 	writel(value, kp->base + PWM_CONTROL_OFFSET);  in kona_pwmc_apply_settings()
106 	unsigned long prescale = PRESCALE_MIN, pc, dc;  in kona_pwmc_config()  local
107 	unsigned int value, chan = pwm->hwpwm;  in kona_pwmc_config()
114 	 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE  in kona_pwmc_config()
117 	 * DC = (PWM_CLK_RATE * duty_ns) / (10^9 * (PRESCALE + 1))  in kona_pwmc_config()
120 	rate = clk_get_rate(kp->clk);  in kona_pwmc_config()
126 		dc = mul_u64_u64_div_u64(rate, duty_ns, div);  in kona_pwmc_config()
130 			return -EINVAL;  in kona_pwmc_config()
132 		/* If pc and dc are in bounds, the calculation is done */  in kona_pwmc_config()
133 		if (pc <= PERIOD_COUNT_MAX && dc <= DUTY_CYCLE_HIGH_MAX)  in kona_pwmc_config()
136 		/* Otherwise, increase prescale and recalculate pc and dc */  in kona_pwmc_config()
138 			return -EINVAL;  in kona_pwmc_config()
143 	value = readl(kp->base + PRESCALE_OFFSET);  in kona_pwmc_config()
146 	writel(value, kp->base + PRESCALE_OFFSET);  in kona_pwmc_config()
148 	writel(pc, kp->base + PERIOD_COUNT_OFFSET(chan));  in kona_pwmc_config()
150 	writel(dc, kp->base + DUTY_CYCLE_HIGH_OFFSET(chan));  in kona_pwmc_config()
161 	unsigned int chan = pwm->hwpwm;  in kona_pwmc_set_polarity()
165 	ret = clk_prepare_enable(kp->clk);  in kona_pwmc_set_polarity()
167 		dev_err(chip->dev, "failed to enable clock: %d\n", ret);  in kona_pwmc_set_polarity()
173 	value = readl(kp->base + PWM_CONTROL_OFFSET);  in kona_pwmc_set_polarity()
180 	writel(value, kp->base + PWM_CONTROL_OFFSET);  in kona_pwmc_set_polarity()
184 	clk_disable_unprepare(kp->clk);  in kona_pwmc_set_polarity()
194 	ret = clk_prepare_enable(kp->clk);  in kona_pwmc_enable()
196 		dev_err(chip->dev, "failed to enable clock: %d\n", ret);  in kona_pwmc_enable()
206 	unsigned int chan = pwm->hwpwm;  in kona_pwmc_disable()
211 	/* Simulate a disable by configuring for zero duty */  in kona_pwmc_disable()
212 	writel(0, kp->base + DUTY_CYCLE_HIGH_OFFSET(chan));  in kona_pwmc_disable()
213 	writel(0, kp->base + PERIOD_COUNT_OFFSET(chan));  in kona_pwmc_disable()
216 	value = readl(kp->base + PRESCALE_OFFSET);  in kona_pwmc_disable()
218 	writel(value, kp->base + PRESCALE_OFFSET);  in kona_pwmc_disable()
222 	clk_disable_unprepare(kp->clk);  in kona_pwmc_disable()
230 	bool enabled = pwm->state.enabled;  in kona_pwmc_apply()
232 	if (state->polarity != pwm->state.polarity) {  in kona_pwmc_apply()
238 		err = kona_pwmc_set_polarity(chip, pwm, state->polarity);  in kona_pwmc_apply()
242 		pwm->state.polarity = state->polarity;  in kona_pwmc_apply()
245 	if (!state->enabled) {  in kona_pwmc_apply()
263 	err = kona_pwmc_config(pwm->chip, pwm, state->duty_cycle, state->period);  in kona_pwmc_apply()
264 	if (err && !pwm->state.enabled)  in kona_pwmc_apply()
265 		clk_disable_unprepare(kp->clk);  in kona_pwmc_apply()
282 	kp = devm_kzalloc(&pdev->dev, sizeof(*kp), GFP_KERNEL);  in kona_pwmc_probe()
284 		return -ENOMEM;  in kona_pwmc_probe()
286 	kp->chip.dev = &pdev->dev;  in kona_pwmc_probe()
287 	kp->chip.ops = &kona_pwm_ops;  in kona_pwmc_probe()
288 	kp->chip.npwm = 6;  in kona_pwmc_probe()
290 	kp->base = devm_platform_ioremap_resource(pdev, 0);  in kona_pwmc_probe()
291 	if (IS_ERR(kp->base))  in kona_pwmc_probe()
292 		return PTR_ERR(kp->base);  in kona_pwmc_probe()
294 	kp->clk = devm_clk_get(&pdev->dev, NULL);  in kona_pwmc_probe()
295 	if (IS_ERR(kp->clk)) {  in kona_pwmc_probe()
296 		dev_err(&pdev->dev, "failed to get clock: %ld\n",  in kona_pwmc_probe()
297 			PTR_ERR(kp->clk));  in kona_pwmc_probe()
298 		return PTR_ERR(kp->clk);  in kona_pwmc_probe()
301 	ret = clk_prepare_enable(kp->clk);  in kona_pwmc_probe()
303 		dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);  in kona_pwmc_probe()
308 	for (chan = 0; chan < kp->chip.npwm; chan++)  in kona_pwmc_probe()
311 	writel(value, kp->base + PWM_CONTROL_OFFSET);  in kona_pwmc_probe()
313 	clk_disable_unprepare(kp->clk);  in kona_pwmc_probe()
315 	ret = devm_pwmchip_add(&pdev->dev, &kp->chip);  in kona_pwmc_probe()
317 		dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret);  in kona_pwmc_probe()
323 	{ .compatible = "brcm,kona-pwm" },
330 		.name = "bcm-kona-pwm",
337 MODULE_AUTHOR("Broadcom Corporation <bcm-kernel-feedback-list@broadcom.com>");