Lines Matching +full:controller +full:- +full:number

1 /* SPDX-License-Identifier: GPL-2.0+ */
3  * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
25  * enum pincfg_type - possible pin configuration types supported.
46  * packed together into a 16-bits. The upper 8-bits represent the configuration
47  * type and the lower 8-bits hold the value of the configuration type.
65  * enum eint_type - possible external interrupt types.
71  * Samsung GPIO controller groups all the available pins into banks. The pins
85 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
116  * struct samsung_pin_bank_data: represent a controller pin-bank (init data).
118  * @pctl_offset: starting offset of the pin-bank registers.
119  * @pctl_res_idx: index of base address for pin-bank registers.
120  * @nr_pins: number of pins included in this bank.
124  * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
140  * struct samsung_pin_bank: represent a controller pin-bank.
142  * @pctl_base: base address of the pin-bank registers
143  * @pctl_offset: starting offset of the pin-bank registers.
144  * @nr_pins: number of pins included in this bank.
145  * @eint_base: base address of the pin-bank EINT registers.
149  * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
151  * @pin_base: starting pin number of the bank.
152  * @soc_priv: per-bank private data for SoC-specific code.
154  * @drvdata: link to controller driver data
188  * struct samsung_retention_data: runtime pin-bank retention control data.
190  * @nr_regs: number of registers in @regs array.
208  * struct samsung_retention_data: represent a pin-bank retention control data.
210  * @nr_regs: number of registers in @regs array.
225  * struct samsung_pin_ctrl: represent a pin controller.
226  * @pin_banks: list of pin banks included in this controller.
227  * @nr_banks: number of pin banks.
228  * @nr_ext_resources: number of the extra base address for pin banks.
231  *	interrupts for the controller.
233  *	interrupts for the controller.
234  * @suspend: platform specific suspend callback, executed during pin controller
236  * @resume: platform specific resume callback, executed during pin controller
257  * @virt_base: register base address of the controller; this will be equal
258  *             to each bank samsung_pin_bank->pctl_base and used on legacy
261  * @dev: device instance representing the controller.
262  * @irq: interrpt number used by the controller to notify gpio interrupts.
263  * @ctrl: pin controller instance managed by the driver.
264  * @pctl: pin controller descriptor registered with the pinctrl subsystem.
267  * @nr_groups: number of such pin groups.
269  * @nr_function: number of such pin functions.
270  * @pin_base: starting system wide pin number.
271  * @nr_pins: number of pins supported by the controller.
273  * @suspend: platform specific suspend callback, executed during pin controller
275  * @resume: platform specific resume callback, executed during pin controller
305  * @ctrl: array of pin controller data.
317  * @num_pins: number of pins included in this group.
318  * @func: the function number to be programmed when selected.
331  * @num_groups: number of groups included in @groups.