Lines Matching +full:gpa0 +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0+
17 #include <linux/soc/samsung/exynos-regs-pmu.h>
19 #include "pinctrl-samsung.h"
20 #include "pinctrl-exynos.h"
24 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, },
29 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
35 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, },
40 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
44 * Bank type for non-alive type. Bit fields:
49 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, },
58 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
64 /* pin banks of exynos5433 pin-controller - ALIVE */
67 EXYNOS5433_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
68 EXYNOS5433_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
69 EXYNOS5433_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
70 EXYNOS5433_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
71 EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1),
72 EXYNOS5433_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1),
73 EXYNOS5433_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1),
74 EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1),
75 EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1),
78 /* pin banks of exynos5433 pin-controller - AUD */
81 EXYNOS5433_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
82 EXYNOS5433_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
85 /* pin banks of exynos5433 pin-controller - CPIF */
88 EXYNOS5433_PIN_BANK_EINTG(2, 0x000, "gpv6", 0x00),
91 /* pin banks of exynos5433 pin-controller - eSE */
94 EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj2", 0x00),
97 /* pin banks of exynos5433 pin-controller - FINGER */
100 EXYNOS5433_PIN_BANK_EINTG(4, 0x000, "gpd5", 0x00),
103 /* pin banks of exynos5433 pin-controller - FSYS */
106 EXYNOS5433_PIN_BANK_EINTG(6, 0x000, "gph1", 0x00),
107 EXYNOS5433_PIN_BANK_EINTG(7, 0x020, "gpr4", 0x04),
108 EXYNOS5433_PIN_BANK_EINTG(5, 0x040, "gpr0", 0x08),
109 EXYNOS5433_PIN_BANK_EINTG(8, 0x060, "gpr1", 0x0c),
110 EXYNOS5433_PIN_BANK_EINTG(2, 0x080, "gpr2", 0x10),
111 EXYNOS5433_PIN_BANK_EINTG(8, 0x0a0, "gpr3", 0x14),
114 /* pin banks of exynos5433 pin-controller - IMEM */
117 EXYNOS5433_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00),
120 /* pin banks of exynos5433 pin-controller - NFC */
123 EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
126 /* pin banks of exynos5433 pin-controller - PERIC */
129 EXYNOS5433_PIN_BANK_EINTG(6, 0x000, "gpv7", 0x00),
130 EXYNOS5433_PIN_BANK_EINTG(5, 0x020, "gpb0", 0x04),
131 EXYNOS5433_PIN_BANK_EINTG(8, 0x040, "gpc0", 0x08),
132 EXYNOS5433_PIN_BANK_EINTG(2, 0x060, "gpc1", 0x0c),
133 EXYNOS5433_PIN_BANK_EINTG(6, 0x080, "gpc2", 0x10),
134 EXYNOS5433_PIN_BANK_EINTG(8, 0x0a0, "gpc3", 0x14),
135 EXYNOS5433_PIN_BANK_EINTG(2, 0x0c0, "gpg0", 0x18),
136 EXYNOS5433_PIN_BANK_EINTG(4, 0x0e0, "gpd0", 0x1c),
137 EXYNOS5433_PIN_BANK_EINTG(6, 0x100, "gpd1", 0x20),
138 EXYNOS5433_PIN_BANK_EINTG(8, 0x120, "gpd2", 0x24),
139 EXYNOS5433_PIN_BANK_EINTG(5, 0x140, "gpd4", 0x28),
140 EXYNOS5433_PIN_BANK_EINTG(2, 0x160, "gpd8", 0x2c),
141 EXYNOS5433_PIN_BANK_EINTG(7, 0x180, "gpd6", 0x30),
142 EXYNOS5433_PIN_BANK_EINTG(3, 0x1a0, "gpd7", 0x34),
143 EXYNOS5433_PIN_BANK_EINTG(5, 0x1c0, "gpg1", 0x38),
144 EXYNOS5433_PIN_BANK_EINTG(2, 0x1e0, "gpg2", 0x3c),
145 EXYNOS5433_PIN_BANK_EINTG(8, 0x200, "gpg3", 0x40),
148 /* pin banks of exynos5433 pin-controller - TOUCH */
151 EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
204 * ten gpio/pin-mux/pinconfig controllers.
208 /* pin-controller instance 0 data */
217 /* pin-controller instance 1 data */
225 /* pin-controller instance 2 data */
233 /* pin-controller instance 3 data */
241 /* pin-controller instance 4 data */
249 /* pin-controller instance 5 data */
257 /* pin-controller instance 6 data */
265 /* pin-controller instance 7 data */
273 /* pin-controller instance 8 data */
281 /* pin-controller instance 9 data */
296 /* pin banks of exynos7 pin-controller - ALIVE */
299 EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
300 EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
301 EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
302 EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
305 /* pin banks of exynos7 pin-controller - BUS0 */
308 EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00),
309 EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpc0", 0x04),
310 EXYNOS_PIN_BANK_EINTG(2, 0x040, "gpc1", 0x08),
311 EXYNOS_PIN_BANK_EINTG(6, 0x060, "gpc2", 0x0c),
312 EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpc3", 0x10),
313 EXYNOS_PIN_BANK_EINTG(4, 0x0a0, "gpd0", 0x14),
314 EXYNOS_PIN_BANK_EINTG(6, 0x0c0, "gpd1", 0x18),
315 EXYNOS_PIN_BANK_EINTG(8, 0x0e0, "gpd2", 0x1c),
316 EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpd4", 0x20),
317 EXYNOS_PIN_BANK_EINTG(4, 0x120, "gpd5", 0x24),
318 EXYNOS_PIN_BANK_EINTG(6, 0x140, "gpd6", 0x28),
319 EXYNOS_PIN_BANK_EINTG(3, 0x160, "gpd7", 0x2c),
320 EXYNOS_PIN_BANK_EINTG(2, 0x180, "gpd8", 0x30),
321 EXYNOS_PIN_BANK_EINTG(2, 0x1a0, "gpg0", 0x34),
322 EXYNOS_PIN_BANK_EINTG(4, 0x1c0, "gpg3", 0x38),
325 /* pin banks of exynos7 pin-controller - NFC */
328 EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
331 /* pin banks of exynos7 pin-controller - TOUCH */
334 EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
337 /* pin banks of exynos7 pin-controller - FF */
340 EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpg4", 0x00),
343 /* pin banks of exynos7 pin-controller - ESE */
346 EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpv7", 0x00),
349 /* pin banks of exynos7 pin-controller - FSYS0 */
352 EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpr4", 0x00),
355 /* pin banks of exynos7 pin-controller - FSYS1 */
358 EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpr0", 0x00),
359 EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpr1", 0x04),
360 EXYNOS_PIN_BANK_EINTG(5, 0x040, "gpr2", 0x08),
361 EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c),
364 /* pin banks of exynos7 pin-controller - BUS1 */
367 EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00),
368 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpf1", 0x04),
369 EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf2", 0x08),
370 EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpf3", 0x0c),
371 EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpf4", 0x10),
372 EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpf5", 0x14),
373 EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpg1", 0x18),
374 EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpg2", 0x1c),
375 EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20),
376 EXYNOS_PIN_BANK_EINTG(3, 0x140, "gpv6", 0x24),
381 EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
382 EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
387 /* pin-controller instance 0 Alive data */
392 /* pin-controller instance 1 BUS0 data */
397 /* pin-controller instance 2 NFC data */
402 /* pin-controller instance 3 TOUCH data */
407 /* pin-controller instance 4 FF data */
412 /* pin-controller instance 5 ESE data */
417 /* pin-controller instance 6 FSYS0 data */
422 /* pin-controller instance 7 FSYS1 data */
427 /* pin-controller instance 8 BUS1 data */
432 /* pin-controller instance 9 AUD data */
444 /* pin banks of exynos7885 pin-controller 0 (ALIVE) */
446 EXYNOS_PIN_BANK_EINTN(3, 0x000, "etc0"),
447 EXYNOS_PIN_BANK_EINTN(3, 0x020, "etc1"),
448 EXYNOS850_PIN_BANK_EINTW(8, 0x040, "gpa0", 0x00),
449 EXYNOS850_PIN_BANK_EINTW(8, 0x060, "gpa1", 0x04),
450 EXYNOS850_PIN_BANK_EINTW(8, 0x080, "gpa2", 0x08),
451 EXYNOS850_PIN_BANK_EINTW(5, 0x0a0, "gpq0", 0x0c),
454 /* pin banks of exynos7885 pin-controller 1 (DISPAUD) */
456 EXYNOS850_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00),
457 EXYNOS850_PIN_BANK_EINTG(4, 0x020, "gpb1", 0x04),
458 EXYNOS850_PIN_BANK_EINTG(5, 0x040, "gpb2", 0x08),
461 /* pin banks of exynos7885 pin-controller 2 (FSYS) */
463 EXYNOS850_PIN_BANK_EINTG(4, 0x000, "gpf0", 0x00),
464 EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpf2", 0x04),
465 EXYNOS850_PIN_BANK_EINTG(6, 0x040, "gpf3", 0x08),
466 EXYNOS850_PIN_BANK_EINTG(6, 0x060, "gpf4", 0x0c),
469 /* pin banks of exynos7885 pin-controller 3 (TOP) */
471 EXYNOS850_PIN_BANK_EINTG(4, 0x000, "gpp0", 0x00),
472 EXYNOS850_PIN_BANK_EINTG(3, 0x020, "gpg0", 0x04),
473 EXYNOS850_PIN_BANK_EINTG(4, 0x040, "gpp1", 0x08),
474 EXYNOS850_PIN_BANK_EINTG(4, 0x060, "gpp2", 0x0c),
475 EXYNOS850_PIN_BANK_EINTG(3, 0x080, "gpp3", 0x10),
476 EXYNOS850_PIN_BANK_EINTG(6, 0x0a0, "gpp4", 0x14),
477 EXYNOS850_PIN_BANK_EINTG(4, 0x0c0, "gpp5", 0x18),
478 EXYNOS850_PIN_BANK_EINTG(5, 0x0e0, "gpp6", 0x1c),
479 EXYNOS850_PIN_BANK_EINTG(2, 0x100, "gpp7", 0x20),
480 EXYNOS850_PIN_BANK_EINTG(2, 0x120, "gpp8", 0x24),
481 EXYNOS850_PIN_BANK_EINTG(8, 0x140, "gpg1", 0x28),
482 EXYNOS850_PIN_BANK_EINTG(8, 0x160, "gpg2", 0x2c),
483 EXYNOS850_PIN_BANK_EINTG(8, 0x180, "gpg3", 0x30),
484 EXYNOS850_PIN_BANK_EINTG(2, 0x1a0, "gpg4", 0x34),
485 EXYNOS850_PIN_BANK_EINTG(4, 0x1c0, "gpc0", 0x38),
486 EXYNOS850_PIN_BANK_EINTG(8, 0x1e0, "gpc1", 0x3c),
487 EXYNOS850_PIN_BANK_EINTG(8, 0x200, "gpc2", 0x40),
492 /* pin-controller instance 0 Alive data */
500 /* pin-controller instance 1 DISPAUD data */
504 /* pin-controller instance 2 FSYS data */
511 /* pin-controller instance 3 TOP data */
525 /* pin banks of exynos850 pin-controller 0 (ALIVE) */
528 EXYNOS850_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
529 EXYNOS850_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
530 EXYNOS850_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
531 EXYNOS850_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
532 EXYNOS850_PIN_BANK_EINTW(4, 0x080, "gpa4", 0x10),
533 EXYNOS850_PIN_BANK_EINTN(3, 0x0a0, "gpq0"),
536 /* pin banks of exynos850 pin-controller 1 (CMGP) */
539 EXYNOS850_PIN_BANK_EINTW(1, 0x000, "gpm0", 0x00),
540 EXYNOS850_PIN_BANK_EINTW(1, 0x020, "gpm1", 0x04),
541 EXYNOS850_PIN_BANK_EINTW(1, 0x040, "gpm2", 0x08),
542 EXYNOS850_PIN_BANK_EINTW(1, 0x060, "gpm3", 0x0c),
543 EXYNOS850_PIN_BANK_EINTW(1, 0x080, "gpm4", 0x10),
544 EXYNOS850_PIN_BANK_EINTW(1, 0x0a0, "gpm5", 0x14),
545 EXYNOS850_PIN_BANK_EINTW(1, 0x0c0, "gpm6", 0x18),
546 EXYNOS850_PIN_BANK_EINTW(1, 0x0e0, "gpm7", 0x1c),
549 /* pin banks of exynos850 pin-controller 2 (AUD) */
552 EXYNOS850_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00),
553 EXYNOS850_PIN_BANK_EINTG(5, 0x020, "gpb1", 0x04),
556 /* pin banks of exynos850 pin-controller 3 (HSI) */
559 EXYNOS850_PIN_BANK_EINTG(6, 0x000, "gpf2", 0x00),
562 /* pin banks of exynos850 pin-controller 4 (CORE) */
565 EXYNOS850_PIN_BANK_EINTG(4, 0x000, "gpf0", 0x00),
566 EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpf1", 0x04),
569 /* pin banks of exynos850 pin-controller 5 (PERI) */
572 EXYNOS850_PIN_BANK_EINTG(2, 0x000, "gpg0", 0x00),
573 EXYNOS850_PIN_BANK_EINTG(6, 0x020, "gpp0", 0x04),
574 EXYNOS850_PIN_BANK_EINTG(4, 0x040, "gpp1", 0x08),
575 EXYNOS850_PIN_BANK_EINTG(4, 0x060, "gpp2", 0x0c),
576 EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpg1", 0x10),
577 EXYNOS850_PIN_BANK_EINTG(8, 0x0a0, "gpg2", 0x14),
578 EXYNOS850_PIN_BANK_EINTG(1, 0x0c0, "gpg3", 0x18),
579 EXYNOS850_PIN_BANK_EINTG(3, 0x0e0, "gpc0", 0x1c),
580 EXYNOS850_PIN_BANK_EINTG(6, 0x100, "gpc1", 0x20),
585 /* pin-controller instance 0 ALIVE data */
590 /* pin-controller instance 1 CMGP data */
595 /* pin-controller instance 2 AUD data */
599 /* pin-controller instance 3 HSI data */
604 /* pin-controller instance 4 CORE data */
609 /* pin-controller instance 5 PERI data */
621 /* pin banks of exynosautov9 pin-controller 0 (ALIVE) */
623 EXYNOS850_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
624 EXYNOS850_PIN_BANK_EINTW(2, 0x020, "gpa1", 0x04),
625 EXYNOS850_PIN_BANK_EINTN(2, 0x040, "gpq0"),
628 /* pin banks of exynosautov9 pin-controller 1 (AUD) */
630 EXYNOS850_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00),
631 EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpb1", 0x04),
632 EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpb2", 0x08),
633 EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpb3", 0x0C),
636 /* pin banks of exynosautov9 pin-controller 2 (FSYS0) */
638 EXYNOS850_PIN_BANK_EINTG(6, 0x000, "gpf0", 0x00),
639 EXYNOS850_PIN_BANK_EINTG(6, 0x020, "gpf1", 0x04),
642 /* pin banks of exynosautov9 pin-controller 3 (FSYS1) */
644 EXYNOS850_PIN_BANK_EINTG(6, 0x000, "gpf8", 0x00),
647 /* pin banks of exynosautov9 pin-controller 4 (FSYS2) */
649 EXYNOS850_PIN_BANK_EINTG(4, 0x000, "gpf2", 0x00),
650 EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpf3", 0x04),
651 EXYNOS850_PIN_BANK_EINTG(7, 0x040, "gpf4", 0x08),
652 EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpf5", 0x0C),
653 EXYNOS850_PIN_BANK_EINTG(7, 0x080, "gpf6", 0x10),
656 /* pin banks of exynosautov9 pin-controller 5 (PERIC0) */
658 EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp0", 0x00),
659 EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp1", 0x04),
660 EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpp2", 0x08),
661 EXYNOS850_PIN_BANK_EINTG(5, 0x060, "gpg0", 0x0C),
664 /* pin banks of exynosautov9 pin-controller 6 (PERIC1) */
666 EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp3", 0x00),
667 EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp4", 0x04),
668 EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpp5", 0x08),
669 EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpg1", 0x0C),
670 EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpg2", 0x10),
671 EXYNOS850_PIN_BANK_EINTG(4, 0x0A0, "gpg3", 0x14),
676 /* pin-controller instance 0 ALIVE data */
683 /* pin-controller instance 1 AUD data */
687 /* pin-controller instance 2 FSYS0 data */
694 /* pin-controller instance 3 FSYS1 data */
701 /* pin-controller instance 4 FSYS2 data */
708 /* pin-controller instance 5 PERIC0 data */
715 /* pin-controller instance 6 PERIC1 data */
731 * gpio/pin-mux/pinconfig controllers.
734 /* pin banks of FSD pin-controller 0 (FSYS) */
736 EXYNOS850_PIN_BANK_EINTG(7, 0x00, "gpf0", 0x00),
737 EXYNOS850_PIN_BANK_EINTG(8, 0x20, "gpf1", 0x04),
738 EXYNOS850_PIN_BANK_EINTG(3, 0x40, "gpf6", 0x08),
739 EXYNOS850_PIN_BANK_EINTG(2, 0x60, "gpf4", 0x0c),
740 EXYNOS850_PIN_BANK_EINTG(6, 0x80, "gpf5", 0x10),
743 /* pin banks of FSD pin-controller 1 (PERIC) */
745 EXYNOS850_PIN_BANK_EINTG(4, 0x000, "gpc8", 0x00),
746 EXYNOS850_PIN_BANK_EINTG(7, 0x020, "gpf2", 0x04),
747 EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpf3", 0x08),
748 EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpd0", 0x0c),
749 EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpb0", 0x10),
750 EXYNOS850_PIN_BANK_EINTG(8, 0x0a0, "gpb1", 0x14),
751 EXYNOS850_PIN_BANK_EINTG(8, 0x0c0, "gpb4", 0x18),
752 EXYNOS850_PIN_BANK_EINTG(4, 0x0e0, "gpb5", 0x1c),
753 EXYNOS850_PIN_BANK_EINTG(8, 0x100, "gpb6", 0x20),
754 EXYNOS850_PIN_BANK_EINTG(8, 0x120, "gpb7", 0x24),
755 EXYNOS850_PIN_BANK_EINTG(5, 0x140, "gpd1", 0x28),
756 EXYNOS850_PIN_BANK_EINTG(5, 0x160, "gpd2", 0x2c),
757 EXYNOS850_PIN_BANK_EINTG(7, 0x180, "gpd3", 0x30),
758 EXYNOS850_PIN_BANK_EINTG(8, 0x1a0, "gpg0", 0x34),
759 EXYNOS850_PIN_BANK_EINTG(8, 0x1c0, "gpg1", 0x38),
760 EXYNOS850_PIN_BANK_EINTG(8, 0x1e0, "gpg2", 0x3c),
761 EXYNOS850_PIN_BANK_EINTG(8, 0x200, "gpg3", 0x40),
762 EXYNOS850_PIN_BANK_EINTG(8, 0x220, "gpg4", 0x44),
763 EXYNOS850_PIN_BANK_EINTG(8, 0x240, "gpg5", 0x48),
764 EXYNOS850_PIN_BANK_EINTG(8, 0x260, "gpg6", 0x4c),
765 EXYNOS850_PIN_BANK_EINTG(8, 0x280, "gpg7", 0x50),
768 /* pin banks of FSD pin-controller 2 (PMU) */
770 EXYNOS850_PIN_BANK_EINTN(3, 0x00, "gpq0"),
775 /* pin-controller instance 0 FSYS0 data */
782 /* pin-controller instance 1 PERIC data */
789 /* pin-controller instance 2 PMU data */