140 u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width)  in sh_pfc_read_raw_reg()  argument
142 	switch (reg_width) {  in sh_pfc_read_raw_reg()
155 void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width,  in sh_pfc_write_raw_reg()  argument
158 	switch (reg_width) {  in sh_pfc_write_raw_reg()
212 		*posp = crp->reg_width - ((in_pos + 1) * crp->field_width);  in sh_pfc_config_reg_helper()
215 		*posp = crp->reg_width;  in sh_pfc_config_reg_helper()
233 		crp->reg, value, field, crp->reg_width, hweight32(mask));  in sh_pfc_write_config_reg()
238 	data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width);  in sh_pfc_write_config_reg()
243 	sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data);  in sh_pfc_write_config_reg()
255 		unsigned int r_width = config_reg->reg_width;  in sh_pfc_get_config_reg()
890 			 GENMASK(cfg_reg->reg_width - 1, 0));  in sh_pfc_check_cfg_reg()
894 		n = (cfg_reg->reg_width / fw) << fw;  in sh_pfc_check_cfg_reg()
900 		if ((r << fw) * sizeof(u16) > cfg_reg->reg_width / fw)  in sh_pfc_check_cfg_reg()
920 	if (rw != cfg_reg->reg_width)  in sh_pfc_check_cfg_reg()
922 			   cfg_reg->reg, rw, cfg_reg->reg_width);  in sh_pfc_check_cfg_reg()
1245 				 GENMASK(info->data_regs[i].reg_width - 1, 0));  in sh_pfc_check_info()
1248 				       info->data_regs[i].reg_width);  in sh_pfc_check_info()