Lines Matching +full:rk3288 +full:- +full:i2s
1 // SPDX-License-Identifier: GPL-2.0-only
8 * With some ideas taken from pinctrl-samsung:
14 * and pinctrl-at91:
15 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
31 #include <linux/pinctrl/pinconf-generic.h>
38 #include <dt-bindings/pinctrl/rockchip.h>
42 #include "pinctrl-rockchip.h"
68 { .offset = -1 }, \
69 { .offset = -1 }, \
70 { .offset = -1 }, \
71 { .offset = -1 }, \
81 { .type = iom0, .offset = -1 }, \
82 { .type = iom1, .offset = -1 }, \
83 { .type = iom2, .offset = -1 }, \
84 { .type = iom3, .offset = -1 }, \
94 { .offset = -1 }, \
95 { .offset = -1 }, \
96 { .offset = -1 }, \
97 { .offset = -1 }, \
100 { .drv_type = type0, .offset = -1 }, \
101 { .drv_type = type1, .offset = -1 }, \
102 { .drv_type = type2, .offset = -1 }, \
103 { .drv_type = type3, .offset = -1 }, \
115 { .type = iom0, .offset = -1 }, \
116 { .type = iom1, .offset = -1 }, \
117 { .type = iom2, .offset = -1 }, \
118 { .type = iom3, .offset = -1 }, \
134 { .offset = -1 }, \
135 { .offset = -1 }, \
136 { .offset = -1 }, \
137 { .offset = -1 }, \
140 { .drv_type = drv0, .offset = -1 }, \
141 { .drv_type = drv1, .offset = -1 }, \
142 { .drv_type = drv2, .offset = -1 }, \
143 { .drv_type = drv3, .offset = -1 }, \
175 { .type = iom0, .offset = -1 }, \
176 { .type = iom1, .offset = -1 }, \
177 { .type = iom2, .offset = -1 }, \
178 { .type = iom3, .offset = -1 }, \
199 { .type = iom0, .offset = -1 }, \
200 { .type = iom1, .offset = -1 }, \
201 { .type = iom2, .offset = -1 }, \
202 { .type = iom3, .offset = -1 }, \
250 for (i = 0; i < info->ngroups; i++) { in pinctrl_name_to_group()
251 if (!strcmp(info->groups[i].name, name)) in pinctrl_name_to_group()
252 return &info->groups[i]; in pinctrl_name_to_group()
265 struct rockchip_pin_bank *b = info->ctrl->pin_banks; in pin_to_bank()
267 while (pin >= (b->pin_base + b->nr_pins)) in pin_to_bank()
277 struct rockchip_pin_bank *b = info->ctrl->pin_banks; in bank_num_to_bank()
280 for (i = 0; i < info->ctrl->nr_banks; i++, b++) { in bank_num_to_bank()
281 if (b->bank_num == num) in bank_num_to_bank()
285 return ERR_PTR(-EINVAL); in bank_num_to_bank()
296 return info->ngroups; in rockchip_get_groups_count()
304 return info->groups[selector].name; in rockchip_get_group_name()
313 if (selector >= info->ngroups) in rockchip_get_group_pins()
314 return -EINVAL; in rockchip_get_group_pins()
316 *pins = info->groups[selector].pins; in rockchip_get_group_pins()
317 *npins = info->groups[selector].npins; in rockchip_get_group_pins()
328 struct device *dev = info->dev; in rockchip_dt_node_to_map()
338 grp = pinctrl_name_to_group(info, np->name); in rockchip_dt_node_to_map()
341 return -EINVAL; in rockchip_dt_node_to_map()
344 map_num += grp->npins; in rockchip_dt_node_to_map()
348 return -ENOMEM; in rockchip_dt_node_to_map()
357 return -EINVAL; in rockchip_dt_node_to_map()
360 new_map[0].data.mux.function = parent->name; in rockchip_dt_node_to_map()
361 new_map[0].data.mux.group = np->name; in rockchip_dt_node_to_map()
366 for (i = 0; i < grp->npins; i++) { in rockchip_dt_node_to_map()
369 pin_get_name(pctldev, grp->pins[i]); in rockchip_dt_node_to_map()
370 new_map[i].data.configs.configs = grp->data[i].configs; in rockchip_dt_node_to_map()
371 new_map[i].data.configs.num_configs = grp->data[i].nconfigs; in rockchip_dt_node_to_map()
375 (*map)->data.mux.function, (*map)->data.mux.group, map_num); in rockchip_dt_node_to_map()
661 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_recalced_mux()
662 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_recalced_mux()
666 for (i = 0; i < ctrl->niomux_recalced; i++) { in rockchip_get_recalced_mux()
667 data = &ctrl->iomux_recalced[i]; in rockchip_get_recalced_mux()
668 if (data->num == bank->bank_num && in rockchip_get_recalced_mux()
669 data->pin == pin) in rockchip_get_recalced_mux()
673 if (i >= ctrl->niomux_recalced) in rockchip_get_recalced_mux()
676 *reg = data->reg; in rockchip_get_recalced_mux()
677 *mask = data->mask; in rockchip_get_recalced_mux()
678 *bit = data->bit; in rockchip_get_recalced_mux()
682 RK_MUXROUTE_SAME(2, RK_PB4, 1, 0x184, BIT(16 + 7)), /* cif-d0m0 */
683 RK_MUXROUTE_SAME(3, RK_PA1, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d0m1 */
684 RK_MUXROUTE_SAME(2, RK_PB6, 1, 0x184, BIT(16 + 7)), /* cif-d1m0 */
685 RK_MUXROUTE_SAME(3, RK_PA2, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d1m1 */
686 RK_MUXROUTE_SAME(2, RK_PA0, 1, 0x184, BIT(16 + 7)), /* cif-d2m0 */
687 RK_MUXROUTE_SAME(3, RK_PA3, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d2m1 */
688 RK_MUXROUTE_SAME(2, RK_PA1, 1, 0x184, BIT(16 + 7)), /* cif-d3m0 */
689 RK_MUXROUTE_SAME(3, RK_PA5, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d3m1 */
690 RK_MUXROUTE_SAME(2, RK_PA2, 1, 0x184, BIT(16 + 7)), /* cif-d4m0 */
691 RK_MUXROUTE_SAME(3, RK_PA7, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d4m1 */
692 RK_MUXROUTE_SAME(2, RK_PA3, 1, 0x184, BIT(16 + 7)), /* cif-d5m0 */
693 RK_MUXROUTE_SAME(3, RK_PB0, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d5m1 */
694 RK_MUXROUTE_SAME(2, RK_PA4, 1, 0x184, BIT(16 + 7)), /* cif-d6m0 */
695 RK_MUXROUTE_SAME(3, RK_PB1, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d6m1 */
696 RK_MUXROUTE_SAME(2, RK_PA5, 1, 0x184, BIT(16 + 7)), /* cif-d7m0 */
697 RK_MUXROUTE_SAME(3, RK_PB4, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d7m1 */
698 RK_MUXROUTE_SAME(2, RK_PA6, 1, 0x184, BIT(16 + 7)), /* cif-d8m0 */
699 RK_MUXROUTE_SAME(3, RK_PB6, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d8m1 */
700 RK_MUXROUTE_SAME(2, RK_PA7, 1, 0x184, BIT(16 + 7)), /* cif-d9m0 */
701 RK_MUXROUTE_SAME(3, RK_PB7, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d9m1 */
702 RK_MUXROUTE_SAME(2, RK_PB7, 1, 0x184, BIT(16 + 7)), /* cif-d10m0 */
703 RK_MUXROUTE_SAME(3, RK_PC6, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d10m1 */
704 RK_MUXROUTE_SAME(2, RK_PC0, 1, 0x184, BIT(16 + 7)), /* cif-d11m0 */
705 RK_MUXROUTE_SAME(3, RK_PC7, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d11m1 */
706 RK_MUXROUTE_SAME(2, RK_PB0, 1, 0x184, BIT(16 + 7)), /* cif-vsyncm0 */
707 RK_MUXROUTE_SAME(3, RK_PD1, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-vsyncm1 */
708 RK_MUXROUTE_SAME(2, RK_PB1, 1, 0x184, BIT(16 + 7)), /* cif-hrefm0 */
709 RK_MUXROUTE_SAME(3, RK_PD2, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-hrefm1 */
710 RK_MUXROUTE_SAME(2, RK_PB2, 1, 0x184, BIT(16 + 7)), /* cif-clkinm0 */
711 RK_MUXROUTE_SAME(3, RK_PD3, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-clkinm1 */
712 RK_MUXROUTE_SAME(2, RK_PB3, 1, 0x184, BIT(16 + 7)), /* cif-clkoutm0 */
713 RK_MUXROUTE_SAME(3, RK_PD0, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-clkoutm1 */
714 RK_MUXROUTE_SAME(3, RK_PC6, 2, 0x184, BIT(16 + 8)), /* pdm-m0 */
715 RK_MUXROUTE_SAME(2, RK_PC6, 1, 0x184, BIT(16 + 8) | BIT(8)), /* pdm-m1 */
716 RK_MUXROUTE_SAME(3, RK_PD3, 2, 0x184, BIT(16 + 8)), /* pdm-sdi0m0 */
717 RK_MUXROUTE_SAME(2, RK_PC5, 2, 0x184, BIT(16 + 8) | BIT(8)), /* pdm-sdi0m1 */
718 RK_MUXROUTE_SAME(1, RK_PD3, 2, 0x184, BIT(16 + 10)), /* uart2-rxm0 */
719 RK_MUXROUTE_SAME(2, RK_PB6, 2, 0x184, BIT(16 + 10) | BIT(10)), /* uart2-rxm1 */
720 RK_MUXROUTE_SAME(1, RK_PD2, 2, 0x184, BIT(16 + 10)), /* uart2-txm0 */
721 RK_MUXROUTE_SAME(2, RK_PB4, 2, 0x184, BIT(16 + 10) | BIT(10)), /* uart2-txm1 */
722 RK_MUXROUTE_SAME(0, RK_PC1, 2, 0x184, BIT(16 + 9)), /* uart3-rxm0 */
723 RK_MUXROUTE_SAME(1, RK_PB7, 2, 0x184, BIT(16 + 9) | BIT(9)), /* uart3-rxm1 */
724 RK_MUXROUTE_SAME(0, RK_PC0, 2, 0x184, BIT(16 + 9)), /* uart3-txm0 */
725 RK_MUXROUTE_SAME(1, RK_PB6, 2, 0x184, BIT(16 + 9) | BIT(9)), /* uart3-txm1 */
726 RK_MUXROUTE_SAME(0, RK_PC2, 2, 0x184, BIT(16 + 9)), /* uart3-ctsm0 */
727 RK_MUXROUTE_SAME(1, RK_PB4, 2, 0x184, BIT(16 + 9) | BIT(9)), /* uart3-ctsm1 */
728 RK_MUXROUTE_SAME(0, RK_PC3, 2, 0x184, BIT(16 + 9)), /* uart3-rtsm0 */
729 RK_MUXROUTE_SAME(1, RK_PB5, 2, 0x184, BIT(16 + 9) | BIT(9)), /* uart3-rtsm1 */
830 RK_MUXROUTE_SAME(1, RK_PB2, 1, 0x144, BIT(16 + 3) | BIT(16 + 4)), /* spi-0 */
831 RK_MUXROUTE_SAME(1, RK_PD3, 3, 0x144, BIT(16 + 3) | BIT(16 + 4) | BIT(3)), /* spi-1 */
832 RK_MUXROUTE_SAME(0, RK_PB5, 2, 0x144, BIT(16 + 3) | BIT(16 + 4) | BIT(4)), /* spi-2 */
833 RK_MUXROUTE_SAME(1, RK_PA5, 1, 0x144, BIT(16 + 5)), /* i2s-0 */
834 RK_MUXROUTE_SAME(0, RK_PB6, 1, 0x144, BIT(16 + 5) | BIT(5)), /* i2s-1 */
835 RK_MUXROUTE_SAME(1, RK_PC6, 2, 0x144, BIT(16 + 6)), /* emmc-0 */
836 RK_MUXROUTE_SAME(2, RK_PA4, 2, 0x144, BIT(16 + 6) | BIT(6)), /* emmc-1 */
840 RK_MUXROUTE_SAME(0, RK_PD0, 1, 0xa0, BIT(16 + 11)), /* non-iomuxed emmc/flash pins on flash-dqs */
841 …UTE_SAME(0, RK_PD0, 2, 0xa0, BIT(16 + 11) | BIT(11)), /* non-iomuxed emmc/flash pins on emmc-clk */
845 RK_MUXROUTE_SAME(0, RK_PD2, 1, 0x50, BIT(16)), /* pwm0-0 */
846 RK_MUXROUTE_SAME(3, RK_PC5, 1, 0x50, BIT(16) | BIT(0)), /* pwm0-1 */
847 RK_MUXROUTE_SAME(0, RK_PD3, 1, 0x50, BIT(16 + 1)), /* pwm1-0 */
848 RK_MUXROUTE_SAME(0, RK_PD6, 2, 0x50, BIT(16 + 1) | BIT(1)), /* pwm1-1 */
849 RK_MUXROUTE_SAME(0, RK_PD4, 1, 0x50, BIT(16 + 2)), /* pwm2-0 */
850 RK_MUXROUTE_SAME(1, RK_PB4, 2, 0x50, BIT(16 + 2) | BIT(2)), /* pwm2-1 */
851 RK_MUXROUTE_SAME(3, RK_PD2, 1, 0x50, BIT(16 + 3)), /* pwm3-0 */
852 RK_MUXROUTE_SAME(1, RK_PB3, 2, 0x50, BIT(16 + 3) | BIT(3)), /* pwm3-1 */
853 RK_MUXROUTE_SAME(1, RK_PA1, 1, 0x50, BIT(16 + 4)), /* sdio-0_d0 */
854 RK_MUXROUTE_SAME(3, RK_PA2, 1, 0x50, BIT(16 + 4) | BIT(4)), /* sdio-1_d0 */
855 RK_MUXROUTE_SAME(0, RK_PB5, 2, 0x50, BIT(16 + 5)), /* spi-0_rx */
856 RK_MUXROUTE_SAME(2, RK_PA0, 2, 0x50, BIT(16 + 5) | BIT(5)), /* spi-1_rx */
857 RK_MUXROUTE_SAME(1, RK_PC6, 2, 0x50, BIT(16 + 7)), /* emmc-0_cmd */
858 RK_MUXROUTE_SAME(2, RK_PA4, 2, 0x50, BIT(16 + 7) | BIT(7)), /* emmc-1_cmd */
859 RK_MUXROUTE_SAME(1, RK_PC3, 2, 0x50, BIT(16 + 8)), /* uart2-0_rx */
860 RK_MUXROUTE_SAME(1, RK_PB2, 2, 0x50, BIT(16 + 8) | BIT(8)), /* uart2-1_rx */
861 RK_MUXROUTE_SAME(1, RK_PB2, 1, 0x50, BIT(16 + 11)), /* uart1-0_rx */
862 RK_MUXROUTE_SAME(3, RK_PB5, 1, 0x50, BIT(16 + 11) | BIT(11)), /* uart1-1_rx */
877 RK_MUXROUTE_SAME(1, RK_PA3, 2, 0x308, BIT(16 + 3)), /* i2s-8ch-1-sclktxm0 */
878 RK_MUXROUTE_SAME(1, RK_PA4, 2, 0x308, BIT(16 + 3)), /* i2s-8ch-1-sclkrxm0 */
879 RK_MUXROUTE_SAME(1, RK_PB5, 2, 0x308, BIT(16 + 3) | BIT(3)), /* i2s-8ch-1-sclktxm1 */
880 RK_MUXROUTE_SAME(1, RK_PB6, 2, 0x308, BIT(16 + 3) | BIT(3)), /* i2s-8ch-1-sclkrxm1 */
881 RK_MUXROUTE_SAME(1, RK_PA4, 3, 0x308, BIT(16 + 12) | BIT(16 + 13)), /* pdm-clkm0 */
882 RK_MUXROUTE_SAME(1, RK_PB6, 4, 0x308, BIT(16 + 12) | BIT(16 + 13) | BIT(12)), /* pdm-clkm1 */
883 RK_MUXROUTE_SAME(2, RK_PA6, 2, 0x308, BIT(16 + 12) | BIT(16 + 13) | BIT(13)), /* pdm-clkm2 */
884 RK_MUXROUTE_SAME(2, RK_PA4, 3, 0x600, BIT(16 + 2) | BIT(2)), /* pdm-clkm-m2 */
902 RK_MUXROUTE_SAME(1, RK_PB3, 2, 0x50, BIT(16 + 2) | BIT(2)), /* gmac-m1_rxd0 */
903 RK_MUXROUTE_SAME(1, RK_PB6, 2, 0x50, BIT(16 + 10) | BIT(10)), /* gmac-m1-optimized_rxd3 */
1021 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_mux_route()
1022 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_mux_route()
1026 for (i = 0; i < ctrl->niomux_routes; i++) { in rockchip_get_mux_route()
1027 data = &ctrl->iomux_routes[i]; in rockchip_get_mux_route()
1028 if ((data->bank_num == bank->bank_num) && in rockchip_get_mux_route()
1029 (data->pin == pin) && (data->func == mux)) in rockchip_get_mux_route()
1033 if (i >= ctrl->niomux_routes) in rockchip_get_mux_route()
1036 *loc = data->route_location; in rockchip_get_mux_route()
1037 *reg = data->route_offset; in rockchip_get_mux_route()
1038 *value = data->route_val; in rockchip_get_mux_route()
1045 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_mux()
1046 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_mux()
1054 return -EINVAL; in rockchip_get_mux()
1056 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_get_mux()
1057 dev_err(info->dev, "pin %d is unrouted\n", pin); in rockchip_get_mux()
1058 return -EINVAL; in rockchip_get_mux()
1061 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_get_mux()
1064 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_get_mux()
1065 regmap = info->regmap_pmu; in rockchip_get_mux()
1066 else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU) in rockchip_get_mux()
1067 regmap = (pin % 8 < 4) ? info->regmap_pmu : info->regmap_base; in rockchip_get_mux()
1069 regmap = info->regmap_base; in rockchip_get_mux()
1072 mux_type = bank->iomux[iomux_num].type; in rockchip_get_mux()
1073 reg = bank->iomux[iomux_num].offset; in rockchip_get_mux()
1089 if (bank->recalced_mask & BIT(pin)) in rockchip_get_mux()
1092 if (ctrl->type == RK3588) { in rockchip_get_mux()
1093 if (bank->bank_num == 0) { in rockchip_get_mux()
1097 reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */ in rockchip_get_mux()
1106 regmap = info->regmap_base; in rockchip_get_mux()
1108 } else if (bank->bank_num > 0) { in rockchip_get_mux()
1123 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_verify_mux()
1124 struct device *dev = info->dev; in rockchip_verify_mux()
1128 return -EINVAL; in rockchip_verify_mux()
1130 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_verify_mux()
1132 return -EINVAL; in rockchip_verify_mux()
1135 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) { in rockchip_verify_mux()
1138 return -ENOTSUPP; in rockchip_verify_mux()
1160 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_mux()
1161 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_mux()
1162 struct device *dev = info->dev; in rockchip_set_mux()
1173 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_set_mux()
1176 dev_dbg(dev, "setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rockchip_set_mux()
1178 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_set_mux()
1179 regmap = info->regmap_pmu; in rockchip_set_mux()
1180 else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU) in rockchip_set_mux()
1181 regmap = (pin % 8 < 4) ? info->regmap_pmu : info->regmap_base; in rockchip_set_mux()
1183 regmap = info->regmap_base; in rockchip_set_mux()
1186 mux_type = bank->iomux[iomux_num].type; in rockchip_set_mux()
1187 reg = bank->iomux[iomux_num].offset; in rockchip_set_mux()
1203 if (bank->recalced_mask & BIT(pin)) in rockchip_set_mux()
1206 if (ctrl->type == RK3588) { in rockchip_set_mux()
1207 if (bank->bank_num == 0) { in rockchip_set_mux()
1210 reg += 0x4000 - 0xC; /* PMU2_IOC_BASE */ in rockchip_set_mux()
1218 reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */ in rockchip_set_mux()
1228 regmap = info->regmap_base; in rockchip_set_mux()
1238 } else if (bank->bank_num > 0) { in rockchip_set_mux()
1244 return -EINVAL; in rockchip_set_mux()
1246 if (bank->route_mask & BIT(pin)) { in rockchip_set_mux()
1254 route_regmap = info->regmap_pmu; in rockchip_set_mux()
1257 route_regmap = info->regmap_base; in rockchip_set_mux()
1285 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_pull_reg_and_bit()
1288 if (bank->bank_num == 0) { in px30_calc_pull_reg_and_bit()
1289 *regmap = info->regmap_pmu; in px30_calc_pull_reg_and_bit()
1292 *regmap = info->regmap_base; in px30_calc_pull_reg_and_bit()
1296 *reg -= 0x10; in px30_calc_pull_reg_and_bit()
1297 *reg += bank->bank_num * PX30_PULL_BANK_STRIDE; in px30_calc_pull_reg_and_bit()
1317 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_drv_reg_and_bit()
1320 if (bank->bank_num == 0) { in px30_calc_drv_reg_and_bit()
1321 *regmap = info->regmap_pmu; in px30_calc_drv_reg_and_bit()
1324 *regmap = info->regmap_base; in px30_calc_drv_reg_and_bit()
1328 *reg -= 0x10; in px30_calc_drv_reg_and_bit()
1329 *reg += bank->bank_num * PX30_DRV_BANK_STRIDE; in px30_calc_drv_reg_and_bit()
1350 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_schmitt_reg_and_bit()
1353 if (bank->bank_num == 0) { in px30_calc_schmitt_reg_and_bit()
1354 *regmap = info->regmap_pmu; in px30_calc_schmitt_reg_and_bit()
1358 *regmap = info->regmap_base; in px30_calc_schmitt_reg_and_bit()
1361 *reg += (bank->bank_num - 1) * PX30_SCHMITT_BANK_STRIDE; in px30_calc_schmitt_reg_and_bit()
1380 struct rockchip_pinctrl *info = bank->drvdata; in rv1108_calc_pull_reg_and_bit()
1383 if (bank->bank_num == 0) { in rv1108_calc_pull_reg_and_bit()
1384 *regmap = info->regmap_pmu; in rv1108_calc_pull_reg_and_bit()
1388 *regmap = info->regmap_base; in rv1108_calc_pull_reg_and_bit()
1390 *reg -= 0x10; in rv1108_calc_pull_reg_and_bit()
1391 *reg += bank->bank_num * RV1108_PULL_BANK_STRIDE; in rv1108_calc_pull_reg_and_bit()
1411 struct rockchip_pinctrl *info = bank->drvdata; in rv1108_calc_drv_reg_and_bit()
1414 if (bank->bank_num == 0) { in rv1108_calc_drv_reg_and_bit()
1415 *regmap = info->regmap_pmu; in rv1108_calc_drv_reg_and_bit()
1418 *regmap = info->regmap_base; in rv1108_calc_drv_reg_and_bit()
1422 *reg -= 0x10; in rv1108_calc_drv_reg_and_bit()
1423 *reg += bank->bank_num * RV1108_DRV_BANK_STRIDE; in rv1108_calc_drv_reg_and_bit()
1444 struct rockchip_pinctrl *info = bank->drvdata; in rv1108_calc_schmitt_reg_and_bit()
1447 if (bank->bank_num == 0) { in rv1108_calc_schmitt_reg_and_bit()
1448 *regmap = info->regmap_pmu; in rv1108_calc_schmitt_reg_and_bit()
1452 *regmap = info->regmap_base; in rv1108_calc_schmitt_reg_and_bit()
1455 *reg += (bank->bank_num - 1) * RV1108_SCHMITT_BANK_STRIDE; in rv1108_calc_schmitt_reg_and_bit()
1474 struct rockchip_pinctrl *info = bank->drvdata; in rv1126_calc_pull_reg_and_bit()
1477 if (bank->bank_num == 0) { in rv1126_calc_pull_reg_and_bit()
1479 *regmap = info->regmap_base; in rv1126_calc_pull_reg_and_bit()
1481 *reg -= (((31 - pin_num) / RV1126_PULL_PINS_PER_REG + 1) * 4); in rv1126_calc_pull_reg_and_bit()
1486 *regmap = info->regmap_pmu; in rv1126_calc_pull_reg_and_bit()
1490 *regmap = info->regmap_base; in rv1126_calc_pull_reg_and_bit()
1491 *reg += (bank->bank_num - 1) * RV1126_PULL_BANK_STRIDE; in rv1126_calc_pull_reg_and_bit()
1511 struct rockchip_pinctrl *info = bank->drvdata; in rv1126_calc_drv_reg_and_bit()
1514 if (bank->bank_num == 0) { in rv1126_calc_drv_reg_and_bit()
1516 *regmap = info->regmap_base; in rv1126_calc_drv_reg_and_bit()
1518 *reg -= (((31 - pin_num) / RV1126_DRV_PINS_PER_REG + 1) * 4); in rv1126_calc_drv_reg_and_bit()
1519 *reg -= 0x4; in rv1126_calc_drv_reg_and_bit()
1524 *regmap = info->regmap_pmu; in rv1126_calc_drv_reg_and_bit()
1527 *regmap = info->regmap_base; in rv1126_calc_drv_reg_and_bit()
1529 *reg += (bank->bank_num - 1) * RV1126_DRV_BANK_STRIDE; in rv1126_calc_drv_reg_and_bit()
1550 struct rockchip_pinctrl *info = bank->drvdata; in rv1126_calc_schmitt_reg_and_bit()
1553 if (bank->bank_num == 0) { in rv1126_calc_schmitt_reg_and_bit()
1555 *regmap = info->regmap_base; in rv1126_calc_schmitt_reg_and_bit()
1557 *reg -= (((31 - pin_num) / RV1126_SCHMITT_PINS_PER_GRF_REG + 1) * 4); in rv1126_calc_schmitt_reg_and_bit()
1561 *regmap = info->regmap_pmu; in rv1126_calc_schmitt_reg_and_bit()
1565 *regmap = info->regmap_base; in rv1126_calc_schmitt_reg_and_bit()
1568 *reg += (bank->bank_num - 1) * RV1126_SCHMITT_BANK_STRIDE; in rv1126_calc_schmitt_reg_and_bit()
1584 struct rockchip_pinctrl *info = bank->drvdata; in rk3308_calc_schmitt_reg_and_bit()
1586 *regmap = info->regmap_base; in rk3308_calc_schmitt_reg_and_bit()
1589 *reg += bank->bank_num * RK3308_SCHMITT_BANK_STRIDE; in rk3308_calc_schmitt_reg_and_bit()
1604 struct rockchip_pinctrl *info = bank->drvdata; in rk2928_calc_pull_reg_and_bit()
1606 *regmap = info->regmap_base; in rk2928_calc_pull_reg_and_bit()
1608 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE; in rk2928_calc_pull_reg_and_bit()
1622 struct rockchip_pinctrl *info = bank->drvdata; in rk3128_calc_pull_reg_and_bit()
1624 *regmap = info->regmap_base; in rk3128_calc_pull_reg_and_bit()
1626 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE; in rk3128_calc_pull_reg_and_bit()
1644 struct rockchip_pinctrl *info = bank->drvdata; in rk3188_calc_pull_reg_and_bit()
1647 if (bank->bank_num == 0 && pin_num < 12) { in rk3188_calc_pull_reg_and_bit()
1648 *regmap = info->regmap_pmu ? info->regmap_pmu in rk3188_calc_pull_reg_and_bit()
1649 : bank->regmap_pull; in rk3188_calc_pull_reg_and_bit()
1650 *reg = info->regmap_pmu ? RK3188_PULL_PMU_OFFSET : 0; in rk3188_calc_pull_reg_and_bit()
1655 *regmap = info->regmap_pull ? info->regmap_pull in rk3188_calc_pull_reg_and_bit()
1656 : info->regmap_base; in rk3188_calc_pull_reg_and_bit()
1657 *reg = info->regmap_pull ? 0 : RK3188_PULL_OFFSET; in rk3188_calc_pull_reg_and_bit()
1660 *reg -= 4; in rk3188_calc_pull_reg_and_bit()
1661 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3188_calc_pull_reg_and_bit()
1669 *bit = 7 - (pin_num % RK3188_PULL_PINS_PER_REG); in rk3188_calc_pull_reg_and_bit()
1681 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_calc_pull_reg_and_bit()
1684 if (bank->bank_num == 0) { in rk3288_calc_pull_reg_and_bit()
1685 *regmap = info->regmap_pmu; in rk3288_calc_pull_reg_and_bit()
1692 *regmap = info->regmap_base; in rk3288_calc_pull_reg_and_bit()
1696 *reg -= 0x10; in rk3288_calc_pull_reg_and_bit()
1697 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3288_calc_pull_reg_and_bit()
1717 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_calc_drv_reg_and_bit()
1720 if (bank->bank_num == 0) { in rk3288_calc_drv_reg_and_bit()
1721 *regmap = info->regmap_pmu; in rk3288_calc_drv_reg_and_bit()
1728 *regmap = info->regmap_base; in rk3288_calc_drv_reg_and_bit()
1732 *reg -= 0x10; in rk3288_calc_drv_reg_and_bit()
1733 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3288_calc_drv_reg_and_bit()
1749 struct rockchip_pinctrl *info = bank->drvdata; in rk3228_calc_pull_reg_and_bit()
1751 *regmap = info->regmap_base; in rk3228_calc_pull_reg_and_bit()
1753 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3228_calc_pull_reg_and_bit()
1768 struct rockchip_pinctrl *info = bank->drvdata; in rk3228_calc_drv_reg_and_bit()
1770 *regmap = info->regmap_base; in rk3228_calc_drv_reg_and_bit()
1772 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3228_calc_drv_reg_and_bit()
1787 struct rockchip_pinctrl *info = bank->drvdata; in rk3308_calc_pull_reg_and_bit()
1789 *regmap = info->regmap_base; in rk3308_calc_pull_reg_and_bit()
1791 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3308_calc_pull_reg_and_bit()
1806 struct rockchip_pinctrl *info = bank->drvdata; in rk3308_calc_drv_reg_and_bit()
1808 *regmap = info->regmap_base; in rk3308_calc_drv_reg_and_bit()
1810 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3308_calc_drv_reg_and_bit()
1826 struct rockchip_pinctrl *info = bank->drvdata; in rk3368_calc_pull_reg_and_bit()
1829 if (bank->bank_num == 0) { in rk3368_calc_pull_reg_and_bit()
1830 *regmap = info->regmap_pmu; in rk3368_calc_pull_reg_and_bit()
1837 *regmap = info->regmap_base; in rk3368_calc_pull_reg_and_bit()
1841 *reg -= 0x10; in rk3368_calc_pull_reg_and_bit()
1842 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3368_calc_pull_reg_and_bit()
1859 struct rockchip_pinctrl *info = bank->drvdata; in rk3368_calc_drv_reg_and_bit()
1862 if (bank->bank_num == 0) { in rk3368_calc_drv_reg_and_bit()
1863 *regmap = info->regmap_pmu; in rk3368_calc_drv_reg_and_bit()
1870 *regmap = info->regmap_base; in rk3368_calc_drv_reg_and_bit()
1874 *reg -= 0x10; in rk3368_calc_drv_reg_and_bit()
1875 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3368_calc_drv_reg_and_bit()
1893 struct rockchip_pinctrl *info = bank->drvdata; in rk3399_calc_pull_reg_and_bit()
1896 if ((bank->bank_num == 0) || (bank->bank_num == 1)) { in rk3399_calc_pull_reg_and_bit()
1897 *regmap = info->regmap_pmu; in rk3399_calc_pull_reg_and_bit()
1900 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3399_calc_pull_reg_and_bit()
1906 *regmap = info->regmap_base; in rk3399_calc_pull_reg_and_bit()
1910 *reg -= 0x20; in rk3399_calc_pull_reg_and_bit()
1911 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3399_calc_pull_reg_and_bit()
1925 struct rockchip_pinctrl *info = bank->drvdata; in rk3399_calc_drv_reg_and_bit()
1929 if ((bank->bank_num == 0) || (bank->bank_num == 1)) in rk3399_calc_drv_reg_and_bit()
1930 *regmap = info->regmap_pmu; in rk3399_calc_drv_reg_and_bit()
1932 *regmap = info->regmap_base; in rk3399_calc_drv_reg_and_bit()
1934 *reg = bank->drv[drv_num].offset; in rk3399_calc_drv_reg_and_bit()
1935 if ((bank->drv[drv_num].drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) || in rk3399_calc_drv_reg_and_bit()
1936 (bank->drv[drv_num].drv_type == DRV_TYPE_IO_3V3_ONLY)) in rk3399_calc_drv_reg_and_bit()
1954 struct rockchip_pinctrl *info = bank->drvdata; in rk3568_calc_pull_reg_and_bit()
1956 if (bank->bank_num == 0) { in rk3568_calc_pull_reg_and_bit()
1957 *regmap = info->regmap_pmu; in rk3568_calc_pull_reg_and_bit()
1959 *reg += bank->bank_num * RK3568_PULL_BANK_STRIDE; in rk3568_calc_pull_reg_and_bit()
1965 *regmap = info->regmap_base; in rk3568_calc_pull_reg_and_bit()
1967 *reg += (bank->bank_num - 1) * RK3568_PULL_BANK_STRIDE; in rk3568_calc_pull_reg_and_bit()
1987 struct rockchip_pinctrl *info = bank->drvdata; in rk3568_calc_drv_reg_and_bit()
1990 if (bank->bank_num == 0) { in rk3568_calc_drv_reg_and_bit()
1991 *regmap = info->regmap_pmu; in rk3568_calc_drv_reg_and_bit()
1998 *regmap = info->regmap_base; in rk3568_calc_drv_reg_and_bit()
2000 *reg += (bank->bank_num - 1) * RK3568_DRV_BANK_STRIDE; in rk3568_calc_drv_reg_and_bit()
2122 struct rockchip_pinctrl *info = bank->drvdata; in rk3588_calc_pull_reg_and_bit()
2123 u8 bank_num = bank->bank_num; in rk3588_calc_pull_reg_and_bit()
2127 for (i = ARRAY_SIZE(rk3588_p_regs) - 1; i >= 0; i--) { in rk3588_calc_pull_reg_and_bit()
2130 *regmap = info->regmap_base; in rk3588_calc_pull_reg_and_bit()
2137 return -EINVAL; in rk3588_calc_pull_reg_and_bit()
2147 struct rockchip_pinctrl *info = bank->drvdata; in rk3588_calc_drv_reg_and_bit()
2148 u8 bank_num = bank->bank_num; in rk3588_calc_drv_reg_and_bit()
2152 for (i = ARRAY_SIZE(rk3588_ds_regs) - 1; i >= 0; i--) { in rk3588_calc_drv_reg_and_bit()
2155 *regmap = info->regmap_base; in rk3588_calc_drv_reg_and_bit()
2162 return -EINVAL; in rk3588_calc_drv_reg_and_bit()
2173 struct rockchip_pinctrl *info = bank->drvdata; in rk3588_calc_schmitt_reg_and_bit()
2174 u8 bank_num = bank->bank_num; in rk3588_calc_schmitt_reg_and_bit()
2178 for (i = ARRAY_SIZE(rk3588_smt_regs) - 1; i >= 0; i--) { in rk3588_calc_schmitt_reg_and_bit()
2181 *regmap = info->regmap_base; in rk3588_calc_schmitt_reg_and_bit()
2188 return -EINVAL; in rk3588_calc_schmitt_reg_and_bit()
2192 { 2, 4, 8, 12, -1, -1, -1, -1 },
2193 { 3, 6, 9, 12, -1, -1, -1, -1 },
2194 { 5, 10, 15, 20, -1, -1, -1, -1 },
2202 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_drive_perpin()
2203 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_drive_perpin()
2204 struct device *dev = info->dev; in rockchip_get_drive_perpin()
2209 int drv_type = bank->drv[pin_num / 8].drv_type; in rockchip_get_drive_perpin()
2211 ret = ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_drive_perpin()
2225 * drive-strength offset is special, as it is in rockchip_get_drive_perpin()
2249 bit -= 16; in rockchip_get_drive_perpin()
2254 return -EINVAL; in rockchip_get_drive_perpin()
2265 return -EINVAL; in rockchip_get_drive_perpin()
2273 data &= (1 << rmask_bits) - 1; in rockchip_get_drive_perpin()
2281 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_drive_perpin()
2282 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_drive_perpin()
2283 struct device *dev = info->dev; in rockchip_set_drive_perpin()
2288 int drv_type = bank->drv[pin_num / 8].drv_type; in rockchip_set_drive_perpin()
2290 dev_dbg(dev, "setting drive of GPIO%d-%d to %d\n", in rockchip_set_drive_perpin()
2291 bank->bank_num, pin_num, strength); in rockchip_set_drive_perpin()
2293 ret = ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_drive_perpin()
2296 if (ctrl->type == RK3588) { in rockchip_set_drive_perpin()
2300 } else if (ctrl->type == RK3568) { in rockchip_set_drive_perpin()
2302 ret = (1 << (strength + 1)) - 1; in rockchip_set_drive_perpin()
2306 if (ctrl->type == RV1126) { in rockchip_set_drive_perpin()
2312 ret = -EINVAL; in rockchip_set_drive_perpin()
2338 * drive-strength offset is special, as it is spread in rockchip_set_drive_perpin()
2360 bit -= 16; in rockchip_set_drive_perpin()
2365 return -EINVAL; in rockchip_set_drive_perpin()
2375 return -EINVAL; in rockchip_set_drive_perpin()
2380 data = ((1 << rmask_bits) - 1) << (bit + 16); in rockchip_set_drive_perpin()
2406 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_pull()
2407 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_pull()
2408 struct device *dev = info->dev; in rockchip_get_pull()
2415 if (ctrl->type == RK3066B) in rockchip_get_pull()
2418 ret = ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_pull()
2426 switch (ctrl->type) { in rockchip_get_pull()
2435 case RK3288: in rockchip_get_pull()
2440 pull_type = bank->pull_type[pin_num / 8]; in rockchip_get_pull()
2442 data &= (1 << RK3188_PULL_BITS_PER_PIN) - 1; in rockchip_get_pull()
2447 return -EINVAL; in rockchip_get_pull()
2454 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_pull()
2455 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_pull()
2456 struct device *dev = info->dev; in rockchip_set_pull()
2462 dev_dbg(dev, "setting pull of GPIO%d-%d to %d\n", bank->bank_num, pin_num, pull); in rockchip_set_pull()
2465 if (ctrl->type == RK3066B) in rockchip_set_pull()
2466 return pull ? -EINVAL : 0; in rockchip_set_pull()
2468 ret = ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_pull()
2472 switch (ctrl->type) { in rockchip_set_pull()
2484 case RK3288: in rockchip_set_pull()
2490 pull_type = bank->pull_type[pin_num / 8]; in rockchip_set_pull()
2491 ret = -EINVAL; in rockchip_set_pull()
2500 * In the TRM, pull-up being 1 for everything except the GPIO0_D0-D6, in rockchip_set_pull()
2503 if (ctrl->type == RK3568 && bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) { in rockchip_set_pull()
2514 data = ((1 << RK3188_PULL_BITS_PER_PIN) - 1) << (bit + 16); in rockchip_set_pull()
2522 return -EINVAL; in rockchip_set_pull()
2538 struct rockchip_pinctrl *info = bank->drvdata; in rk3328_calc_schmitt_reg_and_bit()
2540 *regmap = info->regmap_base; in rk3328_calc_schmitt_reg_and_bit()
2543 *reg += bank->bank_num * RK3328_SCHMITT_BANK_STRIDE; in rk3328_calc_schmitt_reg_and_bit()
2561 struct rockchip_pinctrl *info = bank->drvdata; in rk3568_calc_schmitt_reg_and_bit()
2563 if (bank->bank_num == 0) { in rk3568_calc_schmitt_reg_and_bit()
2564 *regmap = info->regmap_pmu; in rk3568_calc_schmitt_reg_and_bit()
2567 *regmap = info->regmap_base; in rk3568_calc_schmitt_reg_and_bit()
2569 *reg += (bank->bank_num - 1) * RK3568_SCHMITT_BANK_STRIDE; in rk3568_calc_schmitt_reg_and_bit()
2581 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_schmitt()
2582 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_schmitt()
2588 ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_schmitt()
2597 switch (ctrl->type) { in rockchip_get_schmitt()
2599 return data & ((1 << RK3568_SCHMITT_BITS_PER_PIN) - 1); in rockchip_get_schmitt()
2610 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_schmitt()
2611 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_schmitt()
2612 struct device *dev = info->dev; in rockchip_set_schmitt()
2618 dev_dbg(dev, "setting input schmitt of GPIO%d-%d to %d\n", in rockchip_set_schmitt()
2619 bank->bank_num, pin_num, enable); in rockchip_set_schmitt()
2621 ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_schmitt()
2626 switch (ctrl->type) { in rockchip_set_schmitt()
2628 data = ((1 << RK3568_SCHMITT_BITS_PER_PIN) - 1) << (bit + 16); in rockchip_set_schmitt()
2649 return info->nfunctions; in rockchip_pmx_get_funcs_count()
2657 return info->functions[selector].name; in rockchip_pmx_get_func_name()
2666 *groups = info->functions[selector].groups; in rockchip_pmx_get_groups()
2667 *num_groups = info->functions[selector].ngroups; in rockchip_pmx_get_groups()
2676 const unsigned int *pins = info->groups[group].pins; in rockchip_pmx_set()
2677 const struct rockchip_pin_config *data = info->groups[group].data; in rockchip_pmx_set()
2678 struct device *dev = info->dev; in rockchip_pmx_set()
2683 info->functions[selector].name, info->groups[group].name); in rockchip_pmx_set()
2689 for (cnt = 0; cnt < info->groups[group].npins; cnt++) { in rockchip_pmx_set()
2691 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, in rockchip_pmx_set()
2699 for (cnt--; cnt >= 0; cnt--) in rockchip_pmx_set()
2700 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); in rockchip_pmx_set()
2717 return rockchip_set_mux(bank, offset - bank->pin_base, RK_FUNC_GPIO); in rockchip_pmx_gpio_set_direction()
2735 switch (ctrl->type) { in rockchip_pinconf_pull_valid()
2746 case RK3288: in rockchip_pinconf_pull_valid()
2765 return -ENOMEM; in rockchip_pinconf_defer_pin()
2767 cfg->pin = pin; in rockchip_pinconf_defer_pin()
2768 cfg->param = param; in rockchip_pinconf_defer_pin()
2769 cfg->arg = arg; in rockchip_pinconf_defer_pin()
2771 list_add_tail(&cfg->head, &bank->deferred_pins); in rockchip_pinconf_defer_pin()
2782 struct gpio_chip *gpio = &bank->gpio_chip; in rockchip_pinconf_set()
2795 * The lock makes sure that either gpio-probe has completed in rockchip_pinconf_set()
2798 mutex_lock(&bank->deferred_lock); in rockchip_pinconf_set()
2799 if (!gpio || !gpio->direction_output) { in rockchip_pinconf_set()
2800 rc = rockchip_pinconf_defer_pin(bank, pin - bank->pin_base, param, in rockchip_pinconf_set()
2802 mutex_unlock(&bank->deferred_lock); in rockchip_pinconf_set()
2808 mutex_unlock(&bank->deferred_lock); in rockchip_pinconf_set()
2813 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
2822 if (!rockchip_pinconf_pull_valid(info->ctrl, param)) in rockchip_pinconf_set()
2823 return -ENOTSUPP; in rockchip_pinconf_set()
2826 return -EINVAL; in rockchip_pinconf_set()
2828 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
2834 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
2837 return -EINVAL; in rockchip_pinconf_set()
2839 rc = gpio->direction_output(gpio, pin - bank->pin_base, in rockchip_pinconf_set()
2845 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
2848 return -EINVAL; in rockchip_pinconf_set()
2850 rc = gpio->direction_input(gpio, pin - bank->pin_base); in rockchip_pinconf_set()
2855 /* rk3288 is the first with per-pin drive-strength */ in rockchip_pinconf_set()
2856 if (!info->ctrl->drv_calc_reg) in rockchip_pinconf_set()
2857 return -ENOTSUPP; in rockchip_pinconf_set()
2860 pin - bank->pin_base, arg); in rockchip_pinconf_set()
2865 if (!info->ctrl->schmitt_calc_reg) in rockchip_pinconf_set()
2866 return -ENOTSUPP; in rockchip_pinconf_set()
2869 pin - bank->pin_base, arg); in rockchip_pinconf_set()
2874 return -ENOTSUPP; in rockchip_pinconf_set()
2888 struct gpio_chip *gpio = &bank->gpio_chip; in rockchip_pinconf_get()
2895 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
2896 return -EINVAL; in rockchip_pinconf_get()
2904 if (!rockchip_pinconf_pull_valid(info->ctrl, param)) in rockchip_pinconf_get()
2905 return -ENOTSUPP; in rockchip_pinconf_get()
2907 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
2908 return -EINVAL; in rockchip_pinconf_get()
2913 rc = rockchip_get_mux(bank, pin - bank->pin_base); in rockchip_pinconf_get()
2915 return -EINVAL; in rockchip_pinconf_get()
2917 if (!gpio || !gpio->get) { in rockchip_pinconf_get()
2922 rc = gpio->get(gpio, pin - bank->pin_base); in rockchip_pinconf_get()
2929 /* rk3288 is the first with per-pin drive-strength */ in rockchip_pinconf_get()
2930 if (!info->ctrl->drv_calc_reg) in rockchip_pinconf_get()
2931 return -ENOTSUPP; in rockchip_pinconf_get()
2933 rc = rockchip_get_drive_perpin(bank, pin - bank->pin_base); in rockchip_pinconf_get()
2940 if (!info->ctrl->schmitt_calc_reg) in rockchip_pinconf_get()
2941 return -ENOTSUPP; in rockchip_pinconf_get()
2943 rc = rockchip_get_schmitt(bank, pin - bank->pin_base); in rockchip_pinconf_get()
2950 return -ENOTSUPP; in rockchip_pinconf_get()
2966 { .compatible = "rockchip,gpio-bank" },
2967 { .compatible = "rockchip,rk3188-gpio-bank0" },
2980 info->nfunctions++; in rockchip_pinctrl_child_count()
2981 info->ngroups += of_get_child_count(child); in rockchip_pinctrl_child_count()
2990 struct device *dev = info->dev; in rockchip_pinctrl_parse_groups()
3001 grp->name = np->name; in rockchip_pinctrl_parse_groups()
3011 return dev_err_probe(dev, -EINVAL, "wrong pins number or pins and configs should be by 4\n"); in rockchip_pinctrl_parse_groups()
3013 grp->npins = size / 4; in rockchip_pinctrl_parse_groups()
3015 grp->pins = devm_kcalloc(dev, grp->npins, sizeof(*grp->pins), GFP_KERNEL); in rockchip_pinctrl_parse_groups()
3016 grp->data = devm_kcalloc(dev, grp->npins, sizeof(*grp->data), GFP_KERNEL); in rockchip_pinctrl_parse_groups()
3017 if (!grp->pins || !grp->data) in rockchip_pinctrl_parse_groups()
3018 return -ENOMEM; in rockchip_pinctrl_parse_groups()
3029 grp->pins[j] = bank->pin_base + be32_to_cpu(*list++); in rockchip_pinctrl_parse_groups()
3030 grp->data[j].func = be32_to_cpu(*list++); in rockchip_pinctrl_parse_groups()
3034 return -EINVAL; in rockchip_pinctrl_parse_groups()
3038 &grp->data[j].configs, &grp->data[j].nconfigs); in rockchip_pinctrl_parse_groups()
3050 struct device *dev = info->dev; in rockchip_pinctrl_parse_functions()
3060 func = &info->functions[index]; in rockchip_pinctrl_parse_functions()
3063 func->name = np->name; in rockchip_pinctrl_parse_functions()
3064 func->ngroups = of_get_child_count(np); in rockchip_pinctrl_parse_functions()
3065 if (func->ngroups <= 0) in rockchip_pinctrl_parse_functions()
3068 func->groups = devm_kcalloc(dev, func->ngroups, sizeof(*func->groups), GFP_KERNEL); in rockchip_pinctrl_parse_functions()
3069 if (!func->groups) in rockchip_pinctrl_parse_functions()
3070 return -ENOMEM; in rockchip_pinctrl_parse_functions()
3073 func->groups[i] = child->name; in rockchip_pinctrl_parse_functions()
3074 grp = &info->groups[grp_index++]; in rockchip_pinctrl_parse_functions()
3088 struct device *dev = &pdev->dev; in rockchip_pinctrl_parse_dt()
3089 struct device_node *np = dev->of_node; in rockchip_pinctrl_parse_dt()
3096 dev_dbg(dev, "nfunctions = %d\n", info->nfunctions); in rockchip_pinctrl_parse_dt()
3097 dev_dbg(dev, "ngroups = %d\n", info->ngroups); in rockchip_pinctrl_parse_dt()
3099 info->functions = devm_kcalloc(dev, info->nfunctions, sizeof(*info->functions), GFP_KERNEL); in rockchip_pinctrl_parse_dt()
3100 if (!info->functions) in rockchip_pinctrl_parse_dt()
3101 return -ENOMEM; in rockchip_pinctrl_parse_dt()
3103 info->groups = devm_kcalloc(dev, info->ngroups, sizeof(*info->groups), GFP_KERNEL); in rockchip_pinctrl_parse_dt()
3104 if (!info->groups) in rockchip_pinctrl_parse_dt()
3105 return -ENOMEM; in rockchip_pinctrl_parse_dt()
3127 struct pinctrl_desc *ctrldesc = &info->pctl; in rockchip_pinctrl_register()
3130 struct device *dev = &pdev->dev; in rockchip_pinctrl_register()
3135 ctrldesc->name = "rockchip-pinctrl"; in rockchip_pinctrl_register()
3136 ctrldesc->owner = THIS_MODULE; in rockchip_pinctrl_register()
3137 ctrldesc->pctlops = &rockchip_pctrl_ops; in rockchip_pinctrl_register()
3138 ctrldesc->pmxops = &rockchip_pmx_ops; in rockchip_pinctrl_register()
3139 ctrldesc->confops = &rockchip_pinconf_ops; in rockchip_pinctrl_register()
3141 pindesc = devm_kcalloc(dev, info->ctrl->nr_pins, sizeof(*pindesc), GFP_KERNEL); in rockchip_pinctrl_register()
3143 return -ENOMEM; in rockchip_pinctrl_register()
3145 ctrldesc->pins = pindesc; in rockchip_pinctrl_register()
3146 ctrldesc->npins = info->ctrl->nr_pins; in rockchip_pinctrl_register()
3149 for (bank = 0, k = 0; bank < info->ctrl->nr_banks; bank++) { in rockchip_pinctrl_register()
3150 pin_bank = &info->ctrl->pin_banks[bank]; in rockchip_pinctrl_register()
3152 pin_names = devm_kasprintf_strarray(dev, pin_bank->name, pin_bank->nr_pins); in rockchip_pinctrl_register()
3156 for (pin = 0; pin < pin_bank->nr_pins; pin++, k++) { in rockchip_pinctrl_register()
3157 pdesc->number = k; in rockchip_pinctrl_register()
3158 pdesc->name = pin_names[pin]; in rockchip_pinctrl_register()
3162 INIT_LIST_HEAD(&pin_bank->deferred_pins); in rockchip_pinctrl_register()
3163 mutex_init(&pin_bank->deferred_lock); in rockchip_pinctrl_register()
3170 info->pctl_dev = devm_pinctrl_register(dev, ctrldesc, info); in rockchip_pinctrl_register()
3171 if (IS_ERR(info->pctl_dev)) in rockchip_pinctrl_register()
3172 return dev_err_probe(dev, PTR_ERR(info->pctl_dev), "could not register pinctrl driver\n"); in rockchip_pinctrl_register()
3184 struct device *dev = &pdev->dev; in rockchip_pinctrl_get_soc_data()
3185 struct device_node *node = dev->of_node; in rockchip_pinctrl_get_soc_data()
3192 ctrl = (struct rockchip_pin_ctrl *)match->data; in rockchip_pinctrl_get_soc_data()
3194 grf_offs = ctrl->grf_mux_offset; in rockchip_pinctrl_get_soc_data()
3195 pmu_offs = ctrl->pmu_mux_offset; in rockchip_pinctrl_get_soc_data()
3196 drv_pmu_offs = ctrl->pmu_drv_offset; in rockchip_pinctrl_get_soc_data()
3197 drv_grf_offs = ctrl->grf_drv_offset; in rockchip_pinctrl_get_soc_data()
3198 bank = ctrl->pin_banks; in rockchip_pinctrl_get_soc_data()
3199 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_pinctrl_get_soc_data()
3202 raw_spin_lock_init(&bank->slock); in rockchip_pinctrl_get_soc_data()
3203 bank->drvdata = d; in rockchip_pinctrl_get_soc_data()
3204 bank->pin_base = ctrl->nr_pins; in rockchip_pinctrl_get_soc_data()
3205 ctrl->nr_pins += bank->nr_pins; in rockchip_pinctrl_get_soc_data()
3209 struct rockchip_iomux *iom = &bank->iomux[j]; in rockchip_pinctrl_get_soc_data()
3210 struct rockchip_drv *drv = &bank->drv[j]; in rockchip_pinctrl_get_soc_data()
3213 if (bank_pins >= bank->nr_pins) in rockchip_pinctrl_get_soc_data()
3217 if (iom->offset >= 0) { in rockchip_pinctrl_get_soc_data()
3218 if ((iom->type & IOMUX_SOURCE_PMU) || in rockchip_pinctrl_get_soc_data()
3219 (iom->type & IOMUX_L_SOURCE_PMU)) in rockchip_pinctrl_get_soc_data()
3220 pmu_offs = iom->offset; in rockchip_pinctrl_get_soc_data()
3222 grf_offs = iom->offset; in rockchip_pinctrl_get_soc_data()
3224 iom->offset = ((iom->type & IOMUX_SOURCE_PMU) || in rockchip_pinctrl_get_soc_data()
3225 (iom->type & IOMUX_L_SOURCE_PMU)) ? in rockchip_pinctrl_get_soc_data()
3230 if (drv->offset >= 0) { in rockchip_pinctrl_get_soc_data()
3231 if (iom->type & IOMUX_SOURCE_PMU) in rockchip_pinctrl_get_soc_data()
3232 drv_pmu_offs = drv->offset; in rockchip_pinctrl_get_soc_data()
3234 drv_grf_offs = drv->offset; in rockchip_pinctrl_get_soc_data()
3236 drv->offset = (iom->type & IOMUX_SOURCE_PMU) ? in rockchip_pinctrl_get_soc_data()
3241 i, j, iom->offset, drv->offset); in rockchip_pinctrl_get_soc_data()
3247 inc = (iom->type & (IOMUX_WIDTH_4BIT | in rockchip_pinctrl_get_soc_data()
3250 if ((iom->type & IOMUX_SOURCE_PMU) || (iom->type & IOMUX_L_SOURCE_PMU)) in rockchip_pinctrl_get_soc_data()
3257 * 3bit drive-strenth'es are spread over two registers. in rockchip_pinctrl_get_soc_data()
3259 if ((drv->drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) || in rockchip_pinctrl_get_soc_data()
3260 (drv->drv_type == DRV_TYPE_IO_3V3_ONLY)) in rockchip_pinctrl_get_soc_data()
3265 if (iom->type & IOMUX_SOURCE_PMU) in rockchip_pinctrl_get_soc_data()
3273 /* calculate the per-bank recalced_mask */ in rockchip_pinctrl_get_soc_data()
3274 for (j = 0; j < ctrl->niomux_recalced; j++) { in rockchip_pinctrl_get_soc_data()
3277 if (ctrl->iomux_recalced[j].num == bank->bank_num) { in rockchip_pinctrl_get_soc_data()
3278 pin = ctrl->iomux_recalced[j].pin; in rockchip_pinctrl_get_soc_data()
3279 bank->recalced_mask |= BIT(pin); in rockchip_pinctrl_get_soc_data()
3283 /* calculate the per-bank route_mask */ in rockchip_pinctrl_get_soc_data()
3284 for (j = 0; j < ctrl->niomux_routes; j++) { in rockchip_pinctrl_get_soc_data()
3287 if (ctrl->iomux_routes[j].bank_num == bank->bank_num) { in rockchip_pinctrl_get_soc_data()
3288 pin = ctrl->iomux_routes[j].pin; in rockchip_pinctrl_get_soc_data()
3289 bank->route_mask |= BIT(pin); in rockchip_pinctrl_get_soc_data()
3305 int ret = pinctrl_force_sleep(info->pctl_dev); in rockchip_pinctrl_suspend()
3311 * RK3288 GPIO6_C6 mux would be modified by Maskrom when resume, so save in rockchip_pinctrl_suspend()
3314 if (info->ctrl->type == RK3288) { in rockchip_pinctrl_suspend()
3315 ret = regmap_read(info->regmap_base, RK3288_GRF_GPIO6C_IOMUX, in rockchip_pinctrl_suspend()
3318 pinctrl_force_default(info->pctl_dev); in rockchip_pinctrl_suspend()
3331 if (info->ctrl->type == RK3288) { in rockchip_pinctrl_resume()
3332 ret = regmap_write(info->regmap_base, RK3288_GRF_GPIO6C_IOMUX, in rockchip_pinctrl_resume()
3339 return pinctrl_force_default(info->pctl_dev); in rockchip_pinctrl_resume()
3348 struct device *dev = &pdev->dev; in rockchip_pinctrl_probe()
3349 struct device_node *np = dev->of_node, *node; in rockchip_pinctrl_probe()
3355 if (!dev->of_node) in rockchip_pinctrl_probe()
3356 return dev_err_probe(dev, -ENODEV, "device tree node not found\n"); in rockchip_pinctrl_probe()
3360 return -ENOMEM; in rockchip_pinctrl_probe()
3362 info->dev = dev; in rockchip_pinctrl_probe()
3366 return dev_err_probe(dev, -EINVAL, "driver data not available\n"); in rockchip_pinctrl_probe()
3367 info->ctrl = ctrl; in rockchip_pinctrl_probe()
3371 info->regmap_base = syscon_node_to_regmap(node); in rockchip_pinctrl_probe()
3373 if (IS_ERR(info->regmap_base)) in rockchip_pinctrl_probe()
3374 return PTR_ERR(info->regmap_base); in rockchip_pinctrl_probe()
3380 rockchip_regmap_config.max_register = resource_size(res) - 4; in rockchip_pinctrl_probe()
3382 info->regmap_base = in rockchip_pinctrl_probe()
3385 /* to check for the old dt-bindings */ in rockchip_pinctrl_probe()
3386 info->reg_size = resource_size(res); in rockchip_pinctrl_probe()
3389 if (ctrl->type == RK3188 && info->reg_size < 0x200) { in rockchip_pinctrl_probe()
3394 rockchip_regmap_config.max_register = resource_size(res) - 4; in rockchip_pinctrl_probe()
3395 rockchip_regmap_config.name = "rockchip,pinctrl-pull"; in rockchip_pinctrl_probe()
3396 info->regmap_pull = in rockchip_pinctrl_probe()
3404 info->regmap_pmu = syscon_node_to_regmap(node); in rockchip_pinctrl_probe()
3406 if (IS_ERR(info->regmap_pmu)) in rockchip_pinctrl_probe()
3407 return PTR_ERR(info->regmap_pmu); in rockchip_pinctrl_probe()
3416 ret = of_platform_populate(np, NULL, NULL, &pdev->dev); in rockchip_pinctrl_probe()
3430 of_platform_depopulate(&pdev->dev); in rockchip_pinctrl_remove()
3432 for (i = 0; i < info->ctrl->nr_banks; i++) { in rockchip_pinctrl_remove()
3433 bank = &info->ctrl->pin_banks[i]; in rockchip_pinctrl_remove()
3435 mutex_lock(&bank->deferred_lock); in rockchip_pinctrl_remove()
3436 while (!list_empty(&bank->deferred_pins)) { in rockchip_pinctrl_remove()
3437 cfg = list_first_entry(&bank->deferred_pins, in rockchip_pinctrl_remove()
3439 list_del(&cfg->head); in rockchip_pinctrl_remove()
3442 mutex_unlock(&bank->deferred_lock); in rockchip_pinctrl_remove()
3474 .label = "PX30-GPIO",
3498 .label = "RV1108-GPIO",
3538 .label = "RV1126-GPIO",
3561 .label = "RK2928-GPIO",
3576 .label = "RK3036-GPIO",
3594 .label = "RK3066a-GPIO",
3610 .label = "RK3066b-GPIO",
3625 .label = "RK3128-GPIO",
3645 .label = "RK3188-GPIO",
3663 .label = "RK3228-GPIO",
3664 .type = RK3288,
3707 .label = "RK3288-GPIO",
3708 .type = RK3288,
3743 .label = "RK3308-GPIO",
3772 .label = "RK3328-GPIO",
3773 .type = RK3288,
3798 .label = "RK3368-GPIO",
3818 -1,
3819 -1,
3862 .label = "RK3399-GPIO",
3900 .label = "RK3568-GPIO",
3929 .label = "RK3588-GPIO",
3937 { .compatible = "rockchip,px30-pinctrl",
3939 { .compatible = "rockchip,rv1108-pinctrl",
3941 { .compatible = "rockchip,rv1126-pinctrl",
3943 { .compatible = "rockchip,rk2928-pinctrl",
3945 { .compatible = "rockchip,rk3036-pinctrl",
3947 { .compatible = "rockchip,rk3066a-pinctrl",
3949 { .compatible = "rockchip,rk3066b-pinctrl",
3951 { .compatible = "rockchip,rk3128-pinctrl",
3953 { .compatible = "rockchip,rk3188-pinctrl",
3955 { .compatible = "rockchip,rk3228-pinctrl",
3957 { .compatible = "rockchip,rk3288-pinctrl",
3959 { .compatible = "rockchip,rk3308-pinctrl",
3961 { .compatible = "rockchip,rk3328-pinctrl",
3963 { .compatible = "rockchip,rk3368-pinctrl",
3965 { .compatible = "rockchip,rk3399-pinctrl",
3967 { .compatible = "rockchip,rk3568-pinctrl",
3969 { .compatible = "rockchip,rk3588-pinctrl",
3978 .name = "rockchip-pinctrl",
3998 MODULE_ALIAS("platform:pinctrl-rockchip");