52  * Encode variants of iomux registers into a type variable
67 		.iomux		= {			\
80 		.iomux		= {					\
93 		.iomux		= {					\
114 		.iomux		= {					\
133 		.iomux		= {					\
158 		.iomux		= {					\
174 		.iomux		= {					\
198 		.iomux		= {					\
1056 	if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {  in rockchip_get_mux()
1061 	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)  in rockchip_get_mux()
1064 	if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)  in rockchip_get_mux()
1066 	else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)  in rockchip_get_mux()
1072 	mux_type = bank->iomux[iomux_num].type;  in rockchip_get_mux()
1073 	reg = bank->iomux[iomux_num].offset;  in rockchip_get_mux()
1130 	if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {  in rockchip_verify_mux()
1135 	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) {  in rockchip_verify_mux()
1173 	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)  in rockchip_set_mux()
1178 	if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)  in rockchip_set_mux()
1180 	else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)  in rockchip_set_mux()
1186 	mux_type = bank->iomux[iomux_num].type;  in rockchip_set_mux()
1187 	reg = bank->iomux[iomux_num].offset;  in rockchip_set_mux()
3207 		/* calculate iomux and drv offsets */  in rockchip_pinctrl_get_soc_data()
3209 			struct rockchip_iomux *iom = &bank->iomux[j];  in rockchip_pinctrl_get_soc_data()
3216 			/* preset iomux offset value, set new start value */  in rockchip_pinctrl_get_soc_data()
3223 			} else { /* set current iomux offset */  in rockchip_pinctrl_get_soc_data()
3240 			dev_dbg(dev, "bank %d, iomux %d has iom_offset 0x%x drv_offset 0x%x\n",  in rockchip_pinctrl_get_soc_data()
3244 			 * Increase offset according to iomux width.  in rockchip_pinctrl_get_soc_data()
3245 			 * 4bit iomux'es are spread over two registers.  in rockchip_pinctrl_get_soc_data()