Lines Matching +full:pctl +full:- +full:regmap
1 // SPDX-License-Identifier: GPL-2.0-only
7 * Based on pinctrl-pic32.c
18 #include <linux/pinctrl/pinconf-generic.h>
23 #include <linux/regmap.h>
26 #include "pinctrl-utils.h"
32 /* OX810 Regmap Offsets */
42 /* OX820 Regmap Offsets */
88 struct regmap *regmap; member
101 struct oxnas_pinctrl *pctl; member
517 static inline struct oxnas_gpio_bank *pctl_to_bank(struct oxnas_pinctrl *pctl, in pctl_to_bank() argument
520 return &pctl->gpio_banks[pin / PINS_PER_BANK]; in pctl_to_bank()
525 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_pinctrl_get_groups_count() local
527 return pctl->ngroups; in oxnas_pinctrl_get_groups_count()
533 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_pinctrl_get_group_name() local
535 return pctl->groups[group].name; in oxnas_pinctrl_get_group_name()
543 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_pinctrl_get_group_pins() local
545 *pins = &pctl->groups[group].pin; in oxnas_pinctrl_get_group_pins()
561 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_pinmux_get_functions_count() local
563 return pctl->nfunctions; in oxnas_pinmux_get_functions_count()
569 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_pinmux_get_function_name() local
571 return pctl->functions[func].name; in oxnas_pinmux_get_function_name()
579 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_pinmux_get_function_groups() local
581 *groups = pctl->functions[func].groups; in oxnas_pinmux_get_function_groups()
582 *num_groups = pctl->functions[func].ngroups; in oxnas_pinmux_get_function_groups()
590 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_ox810se_pinmux_enable() local
591 const struct oxnas_pin_group *pg = &pctl->groups[group]; in oxnas_ox810se_pinmux_enable()
592 const struct oxnas_function *pf = &pctl->functions[func]; in oxnas_ox810se_pinmux_enable()
593 const char *fname = pf->name; in oxnas_ox810se_pinmux_enable()
594 struct oxnas_desc_function *functions = pg->functions; in oxnas_ox810se_pinmux_enable()
595 u32 mask = BIT(pg->pin); in oxnas_ox810se_pinmux_enable()
597 while (functions->name) { in oxnas_ox810se_pinmux_enable()
598 if (!strcmp(functions->name, fname)) { in oxnas_ox810se_pinmux_enable()
599 dev_dbg(pctl->dev, in oxnas_ox810se_pinmux_enable()
601 fname, pg->bank, pg->pin, in oxnas_ox810se_pinmux_enable()
602 functions->fct, mask); in oxnas_ox810se_pinmux_enable()
604 regmap_write_bits(pctl->regmap, in oxnas_ox810se_pinmux_enable()
605 (pg->bank ? in oxnas_ox810se_pinmux_enable()
609 (functions->fct == 1 ? in oxnas_ox810se_pinmux_enable()
611 regmap_write_bits(pctl->regmap, in oxnas_ox810se_pinmux_enable()
612 (pg->bank ? in oxnas_ox810se_pinmux_enable()
616 (functions->fct == 2 ? in oxnas_ox810se_pinmux_enable()
618 regmap_write_bits(pctl->regmap, in oxnas_ox810se_pinmux_enable()
619 (pg->bank ? in oxnas_ox810se_pinmux_enable()
623 (functions->fct == 3 ? in oxnas_ox810se_pinmux_enable()
632 dev_err(pctl->dev, "cannot mux pin %u to function %u\n", group, func); in oxnas_ox810se_pinmux_enable()
634 return -EINVAL; in oxnas_ox810se_pinmux_enable()
640 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_ox820_pinmux_enable() local
641 const struct oxnas_pin_group *pg = &pctl->groups[group]; in oxnas_ox820_pinmux_enable()
642 const struct oxnas_function *pf = &pctl->functions[func]; in oxnas_ox820_pinmux_enable()
643 const char *fname = pf->name; in oxnas_ox820_pinmux_enable()
644 struct oxnas_desc_function *functions = pg->functions; in oxnas_ox820_pinmux_enable()
645 unsigned int offset = (pg->bank ? PINMUX_820_BANK_OFFSET : 0); in oxnas_ox820_pinmux_enable()
646 u32 mask = BIT(pg->pin); in oxnas_ox820_pinmux_enable()
648 while (functions->name) { in oxnas_ox820_pinmux_enable()
649 if (!strcmp(functions->name, fname)) { in oxnas_ox820_pinmux_enable()
650 dev_dbg(pctl->dev, in oxnas_ox820_pinmux_enable()
652 fname, pg->bank, pg->pin, in oxnas_ox820_pinmux_enable()
653 functions->fct, mask); in oxnas_ox820_pinmux_enable()
655 regmap_write_bits(pctl->regmap, in oxnas_ox820_pinmux_enable()
658 (functions->fct == 1 ? in oxnas_ox820_pinmux_enable()
660 regmap_write_bits(pctl->regmap, in oxnas_ox820_pinmux_enable()
663 (functions->fct == 2 ? in oxnas_ox820_pinmux_enable()
665 regmap_write_bits(pctl->regmap, in oxnas_ox820_pinmux_enable()
668 (functions->fct == 3 ? in oxnas_ox820_pinmux_enable()
670 regmap_write_bits(pctl->regmap, in oxnas_ox820_pinmux_enable()
673 (functions->fct == 4 ? in oxnas_ox820_pinmux_enable()
675 regmap_write_bits(pctl->regmap, in oxnas_ox820_pinmux_enable()
678 (functions->fct == 5 ? in oxnas_ox820_pinmux_enable()
687 dev_err(pctl->dev, "cannot mux pin %u to function %u\n", group, func); in oxnas_ox820_pinmux_enable()
689 return -EINVAL; in oxnas_ox820_pinmux_enable()
696 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_ox810se_gpio_request_enable() local
697 struct oxnas_gpio_bank *bank = gpiochip_get_data(range->gc); in oxnas_ox810se_gpio_request_enable()
698 u32 mask = BIT(offset - bank->gpio_chip.base); in oxnas_ox810se_gpio_request_enable()
700 dev_dbg(pctl->dev, "requesting gpio %d in bank %d (id %d) with mask 0x%x\n", in oxnas_ox810se_gpio_request_enable()
701 offset, bank->gpio_chip.base, bank->id, mask); in oxnas_ox810se_gpio_request_enable()
703 regmap_write_bits(pctl->regmap, in oxnas_ox810se_gpio_request_enable()
704 (bank->id ? in oxnas_ox810se_gpio_request_enable()
708 regmap_write_bits(pctl->regmap, in oxnas_ox810se_gpio_request_enable()
709 (bank->id ? in oxnas_ox810se_gpio_request_enable()
713 regmap_write_bits(pctl->regmap, in oxnas_ox810se_gpio_request_enable()
714 (bank->id ? in oxnas_ox810se_gpio_request_enable()
726 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_ox820_gpio_request_enable() local
727 struct oxnas_gpio_bank *bank = gpiochip_get_data(range->gc); in oxnas_ox820_gpio_request_enable()
728 unsigned int bank_offset = (bank->id ? PINMUX_820_BANK_OFFSET : 0); in oxnas_ox820_gpio_request_enable()
729 u32 mask = BIT(offset - bank->gpio_chip.base); in oxnas_ox820_gpio_request_enable()
731 dev_dbg(pctl->dev, "requesting gpio %d in bank %d (id %d) with mask 0x%x\n", in oxnas_ox820_gpio_request_enable()
732 offset, bank->gpio_chip.base, bank->id, mask); in oxnas_ox820_gpio_request_enable()
734 regmap_write_bits(pctl->regmap, in oxnas_ox820_gpio_request_enable()
737 regmap_write_bits(pctl->regmap, in oxnas_ox820_gpio_request_enable()
740 regmap_write_bits(pctl->regmap, in oxnas_ox820_gpio_request_enable()
743 regmap_write_bits(pctl->regmap, in oxnas_ox820_gpio_request_enable()
746 regmap_write_bits(pctl->regmap, in oxnas_ox820_gpio_request_enable()
759 if (readl_relaxed(bank->reg_base + OUTPUT_EN) & mask) in oxnas_gpio_get_direction()
771 writel_relaxed(mask, bank->reg_base + OUTPUT_EN_CLEAR); in oxnas_gpio_direction_input()
781 return (readl_relaxed(bank->reg_base + INPUT_VALUE) & mask) != 0; in oxnas_gpio_get()
791 writel_relaxed(mask, bank->reg_base + OUTPUT_SET); in oxnas_gpio_set()
793 writel_relaxed(mask, bank->reg_base + OUTPUT_CLEAR); in oxnas_gpio_set()
803 writel_relaxed(mask, bank->reg_base + OUTPUT_EN_SET); in oxnas_gpio_direction_output()
812 struct gpio_chip *chip = range->gc; in oxnas_gpio_set_direction()
843 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_ox810se_pinconf_get() local
844 struct oxnas_gpio_bank *bank = pctl_to_bank(pctl, pin); in oxnas_ox810se_pinconf_get()
846 u32 mask = BIT(pin - bank->gpio_chip.base); in oxnas_ox810se_pinconf_get()
852 ret = regmap_read(pctl->regmap, in oxnas_ox810se_pinconf_get()
853 (bank->id ? in oxnas_ox810se_pinconf_get()
863 return -ENOTSUPP; in oxnas_ox810se_pinconf_get()
874 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_ox820_pinconf_get() local
875 struct oxnas_gpio_bank *bank = pctl_to_bank(pctl, pin); in oxnas_ox820_pinconf_get()
877 unsigned int bank_offset = (bank->id ? PINMUX_820_BANK_OFFSET : 0); in oxnas_ox820_pinconf_get()
878 u32 mask = BIT(pin - bank->gpio_chip.base); in oxnas_ox820_pinconf_get()
884 ret = regmap_read(pctl->regmap, in oxnas_ox820_pinconf_get()
893 return -ENOTSUPP; in oxnas_ox820_pinconf_get()
905 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_ox810se_pinconf_set() local
906 struct oxnas_gpio_bank *bank = pctl_to_bank(pctl, pin); in oxnas_ox810se_pinconf_set()
909 u32 offset = pin - bank->gpio_chip.base; in oxnas_ox810se_pinconf_set()
912 dev_dbg(pctl->dev, "setting pin %d bank %d mask 0x%x\n", in oxnas_ox810se_pinconf_set()
913 pin, bank->gpio_chip.base, mask); in oxnas_ox810se_pinconf_set()
920 dev_dbg(pctl->dev, " pullup\n"); in oxnas_ox810se_pinconf_set()
921 regmap_write_bits(pctl->regmap, in oxnas_ox810se_pinconf_set()
922 (bank->id ? in oxnas_ox810se_pinconf_set()
928 dev_err(pctl->dev, "Property %u not supported\n", in oxnas_ox810se_pinconf_set()
930 return -ENOTSUPP; in oxnas_ox810se_pinconf_set()
941 struct oxnas_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in oxnas_ox820_pinconf_set() local
942 struct oxnas_gpio_bank *bank = pctl_to_bank(pctl, pin); in oxnas_ox820_pinconf_set()
943 unsigned int bank_offset = (bank->id ? PINMUX_820_BANK_OFFSET : 0); in oxnas_ox820_pinconf_set()
946 u32 offset = pin - bank->gpio_chip.base; in oxnas_ox820_pinconf_set()
949 dev_dbg(pctl->dev, "setting pin %d bank %d mask 0x%x\n", in oxnas_ox820_pinconf_set()
950 pin, bank->gpio_chip.base, mask); in oxnas_ox820_pinconf_set()
957 dev_dbg(pctl->dev, " pullup\n"); in oxnas_ox820_pinconf_set()
958 regmap_write_bits(pctl->regmap, in oxnas_ox820_pinconf_set()
963 dev_err(pctl->dev, "Property %u not supported\n", in oxnas_ox820_pinconf_set()
965 return -ENOTSUPP; in oxnas_ox820_pinconf_set()
988 u32 mask = BIT(data->hwirq); in oxnas_gpio_irq_ack()
990 writel(mask, bank->reg_base + IRQ_PENDING); in oxnas_gpio_irq_ack()
998 u32 mask = BIT(data->hwirq); in oxnas_gpio_irq_mask()
1001 writel(readl(bank->reg_base + RE_IRQ_ENABLE) & ~mask, in oxnas_gpio_irq_mask()
1002 bank->reg_base + RE_IRQ_ENABLE); in oxnas_gpio_irq_mask()
1005 writel(readl(bank->reg_base + FE_IRQ_ENABLE) & ~mask, in oxnas_gpio_irq_mask()
1006 bank->reg_base + FE_IRQ_ENABLE); in oxnas_gpio_irq_mask()
1014 u32 mask = BIT(data->hwirq); in oxnas_gpio_irq_unmask()
1017 writel(readl(bank->reg_base + RE_IRQ_ENABLE) | mask, in oxnas_gpio_irq_unmask()
1018 bank->reg_base + RE_IRQ_ENABLE); in oxnas_gpio_irq_unmask()
1021 writel(readl(bank->reg_base + FE_IRQ_ENABLE) | mask, in oxnas_gpio_irq_unmask()
1022 bank->reg_base + FE_IRQ_ENABLE); in oxnas_gpio_irq_unmask()
1029 oxnas_gpio_direction_input(chip, data->hwirq); in oxnas_gpio_irq_startup()
1038 return -EINVAL; in oxnas_gpio_irq_set_type()
1055 stat = readl(bank->reg_base + IRQ_PENDING); in oxnas_gpio_irq_handler()
1058 generic_handle_domain_irq(gc->irq.domain, pin); in oxnas_gpio_irq_handler()
1104 .name = "oxnas-pinctrl",
1123 .name = "oxnas-pinctrl",
1134 .pctl = &ox810se_pinctrl,
1139 .pctl = &ox820_pinctrl,
1143 { .compatible = "oxsemi,ox810se-pinctrl",
1146 { .compatible = "oxsemi,ox820-pinctrl",
1156 struct oxnas_pinctrl *pctl; in oxnas_pinctrl_probe() local
1158 id = of_match_node(oxnas_pinctrl_of_match, pdev->dev.of_node); in oxnas_pinctrl_probe()
1160 return -ENODEV; in oxnas_pinctrl_probe()
1162 data = id->data; in oxnas_pinctrl_probe()
1163 if (!data || !data->pctl || !data->desc) in oxnas_pinctrl_probe()
1164 return -EINVAL; in oxnas_pinctrl_probe()
1166 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); in oxnas_pinctrl_probe()
1167 if (!pctl) in oxnas_pinctrl_probe()
1168 return -ENOMEM; in oxnas_pinctrl_probe()
1169 pctl->dev = &pdev->dev; in oxnas_pinctrl_probe()
1170 dev_set_drvdata(&pdev->dev, pctl); in oxnas_pinctrl_probe()
1172 pctl->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in oxnas_pinctrl_probe()
1173 "oxsemi,sys-ctrl"); in oxnas_pinctrl_probe()
1174 if (IS_ERR(pctl->regmap)) { in oxnas_pinctrl_probe()
1175 dev_err(&pdev->dev, "failed to get sys ctrl regmap\n"); in oxnas_pinctrl_probe()
1176 return -ENODEV; in oxnas_pinctrl_probe()
1179 pctl->functions = data->pctl->functions; in oxnas_pinctrl_probe()
1180 pctl->nfunctions = data->pctl->nfunctions; in oxnas_pinctrl_probe()
1181 pctl->groups = data->pctl->groups; in oxnas_pinctrl_probe()
1182 pctl->ngroups = data->pctl->ngroups; in oxnas_pinctrl_probe()
1183 pctl->gpio_banks = data->pctl->gpio_banks; in oxnas_pinctrl_probe()
1184 pctl->nbanks = data->pctl->nbanks; in oxnas_pinctrl_probe()
1186 pctl->pctldev = pinctrl_register(data->desc, &pdev->dev, pctl); in oxnas_pinctrl_probe()
1187 if (IS_ERR(pctl->pctldev)) { in oxnas_pinctrl_probe()
1188 dev_err(&pdev->dev, "Failed to register pinctrl device\n"); in oxnas_pinctrl_probe()
1189 return PTR_ERR(pctl->pctldev); in oxnas_pinctrl_probe()
1197 struct device_node *np = pdev->dev.of_node; in oxnas_gpio_probe()
1204 if (of_parse_phandle_with_fixed_args(np, "gpio-ranges", in oxnas_gpio_probe()
1206 dev_err(&pdev->dev, "gpio-ranges property not found\n"); in oxnas_gpio_probe()
1207 return -EINVAL; in oxnas_gpio_probe()
1214 dev_err(&pdev->dev, "invalid gpio-ranges base arg\n"); in oxnas_gpio_probe()
1215 return -EINVAL; in oxnas_gpio_probe()
1219 dev_err(&pdev->dev, "invalid gpio-ranges count arg\n"); in oxnas_gpio_probe()
1220 return -EINVAL; in oxnas_gpio_probe()
1225 bank->reg_base = devm_platform_ioremap_resource(pdev, 0); in oxnas_gpio_probe()
1226 if (IS_ERR(bank->reg_base)) in oxnas_gpio_probe()
1227 return PTR_ERR(bank->reg_base); in oxnas_gpio_probe()
1233 bank->id = id; in oxnas_gpio_probe()
1234 bank->gpio_chip.parent = &pdev->dev; in oxnas_gpio_probe()
1235 bank->gpio_chip.ngpio = ngpios; in oxnas_gpio_probe()
1236 girq = &bank->gpio_chip.irq; in oxnas_gpio_probe()
1237 girq->chip = &bank->irq_chip; in oxnas_gpio_probe()
1238 girq->parent_handler = oxnas_gpio_irq_handler; in oxnas_gpio_probe()
1239 girq->num_parents = 1; in oxnas_gpio_probe()
1240 girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents), in oxnas_gpio_probe()
1242 if (!girq->parents) in oxnas_gpio_probe()
1243 return -ENOMEM; in oxnas_gpio_probe()
1244 girq->parents[0] = irq; in oxnas_gpio_probe()
1245 girq->default_type = IRQ_TYPE_NONE; in oxnas_gpio_probe()
1246 girq->handler = handle_level_irq; in oxnas_gpio_probe()
1248 ret = gpiochip_add_data(&bank->gpio_chip, bank); in oxnas_gpio_probe()
1250 dev_err(&pdev->dev, "Failed to add GPIO chip %u: %d\n", in oxnas_gpio_probe()
1260 .name = "oxnas-pinctrl",
1268 { .compatible = "oxsemi,ox810se-gpio", },
1269 { .compatible = "oxsemi,ox820-gpio", },
1275 .name = "oxnas-gpio",